rt5645.c 73 KB

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  1. /*
  2. * rt5645.c -- RT5645 ALSA SoC audio codec driver
  3. *
  4. * Copyright 2013 Realtek Semiconductor Corp.
  5. * Author: Bard Liao <bardliao@realtek.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/moduleparam.h>
  13. #include <linux/init.h>
  14. #include <linux/delay.h>
  15. #include <linux/pm.h>
  16. #include <linux/i2c.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/gpio.h>
  20. #include <sound/core.h>
  21. #include <sound/pcm.h>
  22. #include <sound/pcm_params.h>
  23. #include <sound/jack.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include <sound/initval.h>
  27. #include <sound/tlv.h>
  28. #include "rl6231.h"
  29. #include "rt5645.h"
  30. #define RT5645_DEVICE_ID 0x6308
  31. #define RT5645_PR_RANGE_BASE (0xff + 1)
  32. #define RT5645_PR_SPACING 0x100
  33. #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
  34. static const struct regmap_range_cfg rt5645_ranges[] = {
  35. {
  36. .name = "PR",
  37. .range_min = RT5645_PR_BASE,
  38. .range_max = RT5645_PR_BASE + 0xf8,
  39. .selector_reg = RT5645_PRIV_INDEX,
  40. .selector_mask = 0xff,
  41. .selector_shift = 0x0,
  42. .window_start = RT5645_PRIV_DATA,
  43. .window_len = 0x1,
  44. },
  45. };
  46. static const struct reg_default init_list[] = {
  47. {RT5645_PR_BASE + 0x3d, 0x3600},
  48. {RT5645_PR_BASE + 0x1c, 0xfd20},
  49. {RT5645_PR_BASE + 0x20, 0x611f},
  50. {RT5645_PR_BASE + 0x21, 0x4040},
  51. {RT5645_PR_BASE + 0x23, 0x0004},
  52. };
  53. #define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list)
  54. static const struct reg_default rt5645_reg[] = {
  55. { 0x00, 0x0000 },
  56. { 0x01, 0xc8c8 },
  57. { 0x02, 0xc8c8 },
  58. { 0x03, 0xc8c8 },
  59. { 0x0a, 0x0002 },
  60. { 0x0b, 0x2827 },
  61. { 0x0c, 0xe000 },
  62. { 0x0d, 0x0000 },
  63. { 0x0e, 0x0000 },
  64. { 0x0f, 0x0808 },
  65. { 0x14, 0x3333 },
  66. { 0x16, 0x4b00 },
  67. { 0x18, 0x018b },
  68. { 0x19, 0xafaf },
  69. { 0x1a, 0xafaf },
  70. { 0x1b, 0x0001 },
  71. { 0x1c, 0x2f2f },
  72. { 0x1d, 0x2f2f },
  73. { 0x1e, 0x0000 },
  74. { 0x20, 0x0000 },
  75. { 0x27, 0x7060 },
  76. { 0x28, 0x7070 },
  77. { 0x29, 0x8080 },
  78. { 0x2a, 0x5656 },
  79. { 0x2b, 0x5454 },
  80. { 0x2c, 0xaaa0 },
  81. { 0x2f, 0x1002 },
  82. { 0x31, 0x5000 },
  83. { 0x32, 0x0000 },
  84. { 0x33, 0x0000 },
  85. { 0x34, 0x0000 },
  86. { 0x35, 0x0000 },
  87. { 0x3b, 0x0000 },
  88. { 0x3c, 0x007f },
  89. { 0x3d, 0x0000 },
  90. { 0x3e, 0x007f },
  91. { 0x3f, 0x0000 },
  92. { 0x40, 0x001f },
  93. { 0x41, 0x0000 },
  94. { 0x42, 0x001f },
  95. { 0x45, 0x6000 },
  96. { 0x46, 0x003e },
  97. { 0x47, 0x003e },
  98. { 0x48, 0xf807 },
  99. { 0x4a, 0x0004 },
  100. { 0x4d, 0x0000 },
  101. { 0x4e, 0x0000 },
  102. { 0x4f, 0x01ff },
  103. { 0x50, 0x0000 },
  104. { 0x51, 0x0000 },
  105. { 0x52, 0x01ff },
  106. { 0x53, 0xf000 },
  107. { 0x56, 0x0111 },
  108. { 0x57, 0x0064 },
  109. { 0x58, 0xef0e },
  110. { 0x59, 0xf0f0 },
  111. { 0x5a, 0xef0e },
  112. { 0x5b, 0xf0f0 },
  113. { 0x5c, 0xef0e },
  114. { 0x5d, 0xf0f0 },
  115. { 0x5e, 0xf000 },
  116. { 0x5f, 0x0000 },
  117. { 0x61, 0x0300 },
  118. { 0x62, 0x0000 },
  119. { 0x63, 0x00c2 },
  120. { 0x64, 0x0000 },
  121. { 0x65, 0x0000 },
  122. { 0x66, 0x0000 },
  123. { 0x6a, 0x0000 },
  124. { 0x6c, 0x0aaa },
  125. { 0x70, 0x8000 },
  126. { 0x71, 0x8000 },
  127. { 0x72, 0x8000 },
  128. { 0x73, 0x7770 },
  129. { 0x74, 0x3e00 },
  130. { 0x75, 0x2409 },
  131. { 0x76, 0x000a },
  132. { 0x77, 0x0c00 },
  133. { 0x78, 0x0000 },
  134. { 0x79, 0x0123 },
  135. { 0x80, 0x0000 },
  136. { 0x81, 0x0000 },
  137. { 0x82, 0x0000 },
  138. { 0x83, 0x0000 },
  139. { 0x84, 0x0000 },
  140. { 0x85, 0x0000 },
  141. { 0x8a, 0x0000 },
  142. { 0x8e, 0x0004 },
  143. { 0x8f, 0x1100 },
  144. { 0x90, 0x0646 },
  145. { 0x91, 0x0c06 },
  146. { 0x93, 0x0000 },
  147. { 0x94, 0x0200 },
  148. { 0x95, 0x0000 },
  149. { 0x9a, 0x2184 },
  150. { 0x9b, 0x010a },
  151. { 0x9c, 0x0aea },
  152. { 0x9d, 0x000c },
  153. { 0x9e, 0x0400 },
  154. { 0xa0, 0xa0a8 },
  155. { 0xa1, 0x0059 },
  156. { 0xa2, 0x0001 },
  157. { 0xae, 0x6000 },
  158. { 0xaf, 0x0000 },
  159. { 0xb0, 0x6000 },
  160. { 0xb1, 0x0000 },
  161. { 0xb2, 0x0000 },
  162. { 0xb3, 0x001f },
  163. { 0xb4, 0x020c },
  164. { 0xb5, 0x1f00 },
  165. { 0xb6, 0x0000 },
  166. { 0xbb, 0x0000 },
  167. { 0xbc, 0x0000 },
  168. { 0xbd, 0x0000 },
  169. { 0xbe, 0x0000 },
  170. { 0xbf, 0x3100 },
  171. { 0xc0, 0x0000 },
  172. { 0xc1, 0x0000 },
  173. { 0xc2, 0x0000 },
  174. { 0xc3, 0x2000 },
  175. { 0xcd, 0x0000 },
  176. { 0xce, 0x0000 },
  177. { 0xcf, 0x1813 },
  178. { 0xd0, 0x0690 },
  179. { 0xd1, 0x1c17 },
  180. { 0xd3, 0xb320 },
  181. { 0xd4, 0x0000 },
  182. { 0xd6, 0x0400 },
  183. { 0xd9, 0x0809 },
  184. { 0xda, 0x0000 },
  185. { 0xdb, 0x0003 },
  186. { 0xdc, 0x0049 },
  187. { 0xdd, 0x001b },
  188. { 0xe6, 0x8000 },
  189. { 0xe7, 0x0200 },
  190. { 0xec, 0xb300 },
  191. { 0xed, 0x0000 },
  192. { 0xf0, 0x001f },
  193. { 0xf1, 0x020c },
  194. { 0xf2, 0x1f00 },
  195. { 0xf3, 0x0000 },
  196. { 0xf4, 0x4000 },
  197. { 0xf8, 0x0000 },
  198. { 0xf9, 0x0000 },
  199. { 0xfa, 0x2060 },
  200. { 0xfb, 0x4040 },
  201. { 0xfc, 0x0000 },
  202. { 0xfd, 0x0002 },
  203. { 0xfe, 0x10ec },
  204. { 0xff, 0x6308 },
  205. };
  206. static int rt5645_reset(struct snd_soc_codec *codec)
  207. {
  208. return snd_soc_write(codec, RT5645_RESET, 0);
  209. }
  210. static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
  211. {
  212. int i;
  213. for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
  214. if (reg >= rt5645_ranges[i].range_min &&
  215. reg <= rt5645_ranges[i].range_max) {
  216. return true;
  217. }
  218. }
  219. switch (reg) {
  220. case RT5645_RESET:
  221. case RT5645_PRIV_DATA:
  222. case RT5645_IN1_CTRL1:
  223. case RT5645_IN1_CTRL2:
  224. case RT5645_IN1_CTRL3:
  225. case RT5645_A_JD_CTRL1:
  226. case RT5645_ADC_EQ_CTRL1:
  227. case RT5645_EQ_CTRL1:
  228. case RT5645_ALC_CTRL_1:
  229. case RT5645_IRQ_CTRL2:
  230. case RT5645_IRQ_CTRL3:
  231. case RT5645_INT_IRQ_ST:
  232. case RT5645_IL_CMD:
  233. case RT5645_VENDOR_ID:
  234. case RT5645_VENDOR_ID1:
  235. case RT5645_VENDOR_ID2:
  236. return true;
  237. default:
  238. return false;
  239. }
  240. }
  241. static bool rt5645_readable_register(struct device *dev, unsigned int reg)
  242. {
  243. int i;
  244. for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
  245. if (reg >= rt5645_ranges[i].range_min &&
  246. reg <= rt5645_ranges[i].range_max) {
  247. return true;
  248. }
  249. }
  250. switch (reg) {
  251. case RT5645_RESET:
  252. case RT5645_SPK_VOL:
  253. case RT5645_HP_VOL:
  254. case RT5645_LOUT1:
  255. case RT5645_IN1_CTRL1:
  256. case RT5645_IN1_CTRL2:
  257. case RT5645_IN1_CTRL3:
  258. case RT5645_IN2_CTRL:
  259. case RT5645_INL1_INR1_VOL:
  260. case RT5645_SPK_FUNC_LIM:
  261. case RT5645_ADJ_HPF_CTRL:
  262. case RT5645_DAC1_DIG_VOL:
  263. case RT5645_DAC2_DIG_VOL:
  264. case RT5645_DAC_CTRL:
  265. case RT5645_STO1_ADC_DIG_VOL:
  266. case RT5645_MONO_ADC_DIG_VOL:
  267. case RT5645_ADC_BST_VOL1:
  268. case RT5645_ADC_BST_VOL2:
  269. case RT5645_STO1_ADC_MIXER:
  270. case RT5645_MONO_ADC_MIXER:
  271. case RT5645_AD_DA_MIXER:
  272. case RT5645_STO_DAC_MIXER:
  273. case RT5645_MONO_DAC_MIXER:
  274. case RT5645_DIG_MIXER:
  275. case RT5645_DIG_INF1_DATA:
  276. case RT5645_PDM_OUT_CTRL:
  277. case RT5645_REC_L1_MIXER:
  278. case RT5645_REC_L2_MIXER:
  279. case RT5645_REC_R1_MIXER:
  280. case RT5645_REC_R2_MIXER:
  281. case RT5645_HPMIXL_CTRL:
  282. case RT5645_HPOMIXL_CTRL:
  283. case RT5645_HPMIXR_CTRL:
  284. case RT5645_HPOMIXR_CTRL:
  285. case RT5645_HPO_MIXER:
  286. case RT5645_SPK_L_MIXER:
  287. case RT5645_SPK_R_MIXER:
  288. case RT5645_SPO_MIXER:
  289. case RT5645_SPO_CLSD_RATIO:
  290. case RT5645_OUT_L1_MIXER:
  291. case RT5645_OUT_R1_MIXER:
  292. case RT5645_OUT_L_GAIN1:
  293. case RT5645_OUT_L_GAIN2:
  294. case RT5645_OUT_R_GAIN1:
  295. case RT5645_OUT_R_GAIN2:
  296. case RT5645_LOUT_MIXER:
  297. case RT5645_HAPTIC_CTRL1:
  298. case RT5645_HAPTIC_CTRL2:
  299. case RT5645_HAPTIC_CTRL3:
  300. case RT5645_HAPTIC_CTRL4:
  301. case RT5645_HAPTIC_CTRL5:
  302. case RT5645_HAPTIC_CTRL6:
  303. case RT5645_HAPTIC_CTRL7:
  304. case RT5645_HAPTIC_CTRL8:
  305. case RT5645_HAPTIC_CTRL9:
  306. case RT5645_HAPTIC_CTRL10:
  307. case RT5645_PWR_DIG1:
  308. case RT5645_PWR_DIG2:
  309. case RT5645_PWR_ANLG1:
  310. case RT5645_PWR_ANLG2:
  311. case RT5645_PWR_MIXER:
  312. case RT5645_PWR_VOL:
  313. case RT5645_PRIV_INDEX:
  314. case RT5645_PRIV_DATA:
  315. case RT5645_I2S1_SDP:
  316. case RT5645_I2S2_SDP:
  317. case RT5645_ADDA_CLK1:
  318. case RT5645_ADDA_CLK2:
  319. case RT5645_DMIC_CTRL1:
  320. case RT5645_DMIC_CTRL2:
  321. case RT5645_TDM_CTRL_1:
  322. case RT5645_TDM_CTRL_2:
  323. case RT5645_TDM_CTRL_3:
  324. case RT5645_GLB_CLK:
  325. case RT5645_PLL_CTRL1:
  326. case RT5645_PLL_CTRL2:
  327. case RT5645_ASRC_1:
  328. case RT5645_ASRC_2:
  329. case RT5645_ASRC_3:
  330. case RT5645_ASRC_4:
  331. case RT5645_DEPOP_M1:
  332. case RT5645_DEPOP_M2:
  333. case RT5645_DEPOP_M3:
  334. case RT5645_MICBIAS:
  335. case RT5645_A_JD_CTRL1:
  336. case RT5645_VAD_CTRL4:
  337. case RT5645_CLSD_OUT_CTRL:
  338. case RT5645_ADC_EQ_CTRL1:
  339. case RT5645_ADC_EQ_CTRL2:
  340. case RT5645_EQ_CTRL1:
  341. case RT5645_EQ_CTRL2:
  342. case RT5645_ALC_CTRL_1:
  343. case RT5645_ALC_CTRL_2:
  344. case RT5645_ALC_CTRL_3:
  345. case RT5645_ALC_CTRL_4:
  346. case RT5645_ALC_CTRL_5:
  347. case RT5645_JD_CTRL:
  348. case RT5645_IRQ_CTRL1:
  349. case RT5645_IRQ_CTRL2:
  350. case RT5645_IRQ_CTRL3:
  351. case RT5645_INT_IRQ_ST:
  352. case RT5645_GPIO_CTRL1:
  353. case RT5645_GPIO_CTRL2:
  354. case RT5645_GPIO_CTRL3:
  355. case RT5645_BASS_BACK:
  356. case RT5645_MP3_PLUS1:
  357. case RT5645_MP3_PLUS2:
  358. case RT5645_ADJ_HPF1:
  359. case RT5645_ADJ_HPF2:
  360. case RT5645_HP_CALIB_AMP_DET:
  361. case RT5645_SV_ZCD1:
  362. case RT5645_SV_ZCD2:
  363. case RT5645_IL_CMD:
  364. case RT5645_IL_CMD2:
  365. case RT5645_IL_CMD3:
  366. case RT5645_DRC1_HL_CTRL1:
  367. case RT5645_DRC2_HL_CTRL1:
  368. case RT5645_ADC_MONO_HP_CTRL1:
  369. case RT5645_ADC_MONO_HP_CTRL2:
  370. case RT5645_DRC2_CTRL1:
  371. case RT5645_DRC2_CTRL2:
  372. case RT5645_DRC2_CTRL3:
  373. case RT5645_DRC2_CTRL4:
  374. case RT5645_DRC2_CTRL5:
  375. case RT5645_JD_CTRL3:
  376. case RT5645_JD_CTRL4:
  377. case RT5645_GEN_CTRL1:
  378. case RT5645_GEN_CTRL2:
  379. case RT5645_GEN_CTRL3:
  380. case RT5645_VENDOR_ID:
  381. case RT5645_VENDOR_ID1:
  382. case RT5645_VENDOR_ID2:
  383. return true;
  384. default:
  385. return false;
  386. }
  387. }
  388. static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
  389. static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
  390. static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
  391. static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
  392. static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
  393. /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
  394. static unsigned int bst_tlv[] = {
  395. TLV_DB_RANGE_HEAD(7),
  396. 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
  397. 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
  398. 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
  399. 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
  400. 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
  401. 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
  402. 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
  403. };
  404. static const char * const rt5645_tdm_data_swap_select[] = {
  405. "L/R", "R/L", "L/L", "R/R"
  406. };
  407. static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
  408. RT5645_TDM_CTRL_1, 6, rt5645_tdm_data_swap_select);
  409. static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
  410. RT5645_TDM_CTRL_1, 4, rt5645_tdm_data_swap_select);
  411. static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
  412. RT5645_TDM_CTRL_1, 2, rt5645_tdm_data_swap_select);
  413. static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot6_7_enum,
  414. RT5645_TDM_CTRL_1, 0, rt5645_tdm_data_swap_select);
  415. static const char * const rt5645_tdm_adc_data_select[] = {
  416. "1/2/R", "2/1/R", "R/1/2", "R/2/1"
  417. };
  418. static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_sel_enum,
  419. RT5645_TDM_CTRL_1, 8,
  420. rt5645_tdm_adc_data_select);
  421. static const struct snd_kcontrol_new rt5645_snd_controls[] = {
  422. /* Speaker Output Volume */
  423. SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
  424. RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
  425. SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
  426. RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
  427. /* Headphone Output Volume */
  428. SOC_DOUBLE("HP Channel Switch", RT5645_HP_VOL,
  429. RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
  430. SOC_DOUBLE_TLV("HP Playback Volume", RT5645_HP_VOL,
  431. RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
  432. /* OUTPUT Control */
  433. SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
  434. RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
  435. SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
  436. RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
  437. SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
  438. RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
  439. /* DAC Digital Volume */
  440. SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
  441. RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
  442. SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
  443. RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
  444. SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
  445. RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
  446. /* IN1/IN2 Control */
  447. SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
  448. RT5645_BST_SFT1, 8, 0, bst_tlv),
  449. SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
  450. RT5645_BST_SFT2, 8, 0, bst_tlv),
  451. /* INL/INR Volume Control */
  452. SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
  453. RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
  454. /* ADC Digital Volume Control */
  455. SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
  456. RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
  457. SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
  458. RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
  459. SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
  460. RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
  461. SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
  462. RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
  463. /* ADC Boost Volume Control */
  464. SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1,
  465. RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
  466. adc_bst_tlv),
  467. SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1,
  468. RT5645_STO2_ADC_L_BST_SFT, RT5645_STO2_ADC_R_BST_SFT, 3, 0,
  469. adc_bst_tlv),
  470. /* I2S2 function select */
  471. SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
  472. 1, 1),
  473. /* TDM */
  474. SOC_ENUM("TDM Adc Slot0 1 Data", rt5645_tdm_adc_slot0_1_enum),
  475. SOC_ENUM("TDM Adc Slot2 3 Data", rt5645_tdm_adc_slot2_3_enum),
  476. SOC_ENUM("TDM Adc Slot4 5 Data", rt5645_tdm_adc_slot4_5_enum),
  477. SOC_ENUM("TDM Adc Slot6 7 Data", rt5645_tdm_adc_slot6_7_enum),
  478. SOC_ENUM("TDM IF1 ADC DATA Sel", rt5645_tdm_adc_sel_enum),
  479. SOC_SINGLE("TDM IF1_DAC1_L Sel", RT5645_TDM_CTRL_3, 12, 7, 0),
  480. SOC_SINGLE("TDM IF1_DAC1_R Sel", RT5645_TDM_CTRL_3, 8, 7, 0),
  481. SOC_SINGLE("TDM IF1_DAC2_L Sel", RT5645_TDM_CTRL_3, 4, 7, 0),
  482. SOC_SINGLE("TDM IF1_DAC2_R Sel", RT5645_TDM_CTRL_3, 0, 7, 0),
  483. };
  484. /**
  485. * set_dmic_clk - Set parameter of dmic.
  486. *
  487. * @w: DAPM widget.
  488. * @kcontrol: The kcontrol of this widget.
  489. * @event: Event id.
  490. *
  491. */
  492. static int set_dmic_clk(struct snd_soc_dapm_widget *w,
  493. struct snd_kcontrol *kcontrol, int event)
  494. {
  495. struct snd_soc_codec *codec = w->codec;
  496. struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
  497. int idx = -EINVAL;
  498. idx = rl6231_calc_dmic_clk(rt5645->sysclk);
  499. if (idx < 0)
  500. dev_err(codec->dev, "Failed to set DMIC clock\n");
  501. else
  502. snd_soc_update_bits(codec, RT5645_DMIC_CTRL1,
  503. RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
  504. return idx;
  505. }
  506. static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
  507. struct snd_soc_dapm_widget *sink)
  508. {
  509. unsigned int val;
  510. val = snd_soc_read(source->codec, RT5645_GLB_CLK);
  511. val &= RT5645_SCLK_SRC_MASK;
  512. if (val == RT5645_SCLK_SRC_PLL1)
  513. return 1;
  514. else
  515. return 0;
  516. }
  517. /* Digital Mixer */
  518. static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
  519. SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
  520. RT5645_M_ADC_L1_SFT, 1, 1),
  521. SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
  522. RT5645_M_ADC_L2_SFT, 1, 1),
  523. };
  524. static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
  525. SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
  526. RT5645_M_ADC_R1_SFT, 1, 1),
  527. SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
  528. RT5645_M_ADC_R2_SFT, 1, 1),
  529. };
  530. static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
  531. SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
  532. RT5645_M_MONO_ADC_L1_SFT, 1, 1),
  533. SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
  534. RT5645_M_MONO_ADC_L2_SFT, 1, 1),
  535. };
  536. static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
  537. SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
  538. RT5645_M_MONO_ADC_R1_SFT, 1, 1),
  539. SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
  540. RT5645_M_MONO_ADC_R2_SFT, 1, 1),
  541. };
  542. static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
  543. SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
  544. RT5645_M_ADCMIX_L_SFT, 1, 1),
  545. SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
  546. RT5645_M_DAC1_L_SFT, 1, 1),
  547. };
  548. static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
  549. SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
  550. RT5645_M_ADCMIX_R_SFT, 1, 1),
  551. SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
  552. RT5645_M_DAC1_R_SFT, 1, 1),
  553. };
  554. static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
  555. SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
  556. RT5645_M_DAC_L1_SFT, 1, 1),
  557. SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
  558. RT5645_M_DAC_L2_SFT, 1, 1),
  559. SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
  560. RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
  561. };
  562. static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
  563. SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
  564. RT5645_M_DAC_R1_SFT, 1, 1),
  565. SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
  566. RT5645_M_DAC_R2_SFT, 1, 1),
  567. SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
  568. RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
  569. };
  570. static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
  571. SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
  572. RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
  573. SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
  574. RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
  575. SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
  576. RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
  577. };
  578. static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
  579. SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
  580. RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
  581. SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
  582. RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
  583. SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
  584. RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
  585. };
  586. static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
  587. SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
  588. RT5645_M_STO_L_DAC_L_SFT, 1, 1),
  589. SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
  590. RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
  591. SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
  592. RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
  593. };
  594. static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
  595. SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
  596. RT5645_M_STO_R_DAC_R_SFT, 1, 1),
  597. SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
  598. RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
  599. SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
  600. RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
  601. };
  602. /* Analog Input Mixer */
  603. static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
  604. SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
  605. RT5645_M_HP_L_RM_L_SFT, 1, 1),
  606. SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
  607. RT5645_M_IN_L_RM_L_SFT, 1, 1),
  608. SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
  609. RT5645_M_BST2_RM_L_SFT, 1, 1),
  610. SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
  611. RT5645_M_BST1_RM_L_SFT, 1, 1),
  612. SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
  613. RT5645_M_OM_L_RM_L_SFT, 1, 1),
  614. };
  615. static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
  616. SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
  617. RT5645_M_HP_R_RM_R_SFT, 1, 1),
  618. SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
  619. RT5645_M_IN_R_RM_R_SFT, 1, 1),
  620. SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
  621. RT5645_M_BST2_RM_R_SFT, 1, 1),
  622. SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
  623. RT5645_M_BST1_RM_R_SFT, 1, 1),
  624. SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
  625. RT5645_M_OM_R_RM_R_SFT, 1, 1),
  626. };
  627. static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
  628. SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
  629. RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
  630. SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
  631. RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
  632. SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
  633. RT5645_M_IN_L_SM_L_SFT, 1, 1),
  634. SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
  635. RT5645_M_BST1_L_SM_L_SFT, 1, 1),
  636. };
  637. static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
  638. SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
  639. RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
  640. SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
  641. RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
  642. SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
  643. RT5645_M_IN_R_SM_R_SFT, 1, 1),
  644. SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
  645. RT5645_M_BST2_R_SM_R_SFT, 1, 1),
  646. };
  647. static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
  648. SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
  649. RT5645_M_BST1_OM_L_SFT, 1, 1),
  650. SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
  651. RT5645_M_IN_L_OM_L_SFT, 1, 1),
  652. SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
  653. RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
  654. SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
  655. RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
  656. };
  657. static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
  658. SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
  659. RT5645_M_BST2_OM_R_SFT, 1, 1),
  660. SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
  661. RT5645_M_IN_R_OM_R_SFT, 1, 1),
  662. SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
  663. RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
  664. SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
  665. RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
  666. };
  667. static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
  668. SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
  669. RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
  670. SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
  671. RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
  672. SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
  673. RT5645_M_SV_R_SPM_L_SFT, 1, 1),
  674. SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
  675. RT5645_M_SV_L_SPM_L_SFT, 1, 1),
  676. };
  677. static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
  678. SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
  679. RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
  680. SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
  681. RT5645_M_SV_R_SPM_R_SFT, 1, 1),
  682. };
  683. static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
  684. SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
  685. RT5645_M_DAC1_HM_SFT, 1, 1),
  686. SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
  687. RT5645_M_HPVOL_HM_SFT, 1, 1),
  688. };
  689. static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
  690. SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
  691. RT5645_M_DAC1_HV_SFT, 1, 1),
  692. SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
  693. RT5645_M_DAC2_HV_SFT, 1, 1),
  694. SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
  695. RT5645_M_IN_HV_SFT, 1, 1),
  696. SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
  697. RT5645_M_BST1_HV_SFT, 1, 1),
  698. };
  699. static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
  700. SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
  701. RT5645_M_DAC1_HV_SFT, 1, 1),
  702. SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
  703. RT5645_M_DAC2_HV_SFT, 1, 1),
  704. SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
  705. RT5645_M_IN_HV_SFT, 1, 1),
  706. SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
  707. RT5645_M_BST2_HV_SFT, 1, 1),
  708. };
  709. static const struct snd_kcontrol_new rt5645_lout_mix[] = {
  710. SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
  711. RT5645_M_DAC_L1_LM_SFT, 1, 1),
  712. SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
  713. RT5645_M_DAC_R1_LM_SFT, 1, 1),
  714. SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
  715. RT5645_M_OV_L_LM_SFT, 1, 1),
  716. SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
  717. RT5645_M_OV_R_LM_SFT, 1, 1),
  718. };
  719. /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
  720. static const char * const rt5645_dac1_src[] = {
  721. "IF1 DAC", "IF2 DAC", "IF3 DAC"
  722. };
  723. static SOC_ENUM_SINGLE_DECL(
  724. rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
  725. RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
  726. static const struct snd_kcontrol_new rt5645_dac1l_mux =
  727. SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
  728. static SOC_ENUM_SINGLE_DECL(
  729. rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
  730. RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
  731. static const struct snd_kcontrol_new rt5645_dac1r_mux =
  732. SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
  733. /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
  734. static const char * const rt5645_dac12_src[] = {
  735. "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
  736. };
  737. static SOC_ENUM_SINGLE_DECL(
  738. rt5645_dac2l_enum, RT5645_DAC_CTRL,
  739. RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
  740. static const struct snd_kcontrol_new rt5645_dac_l2_mux =
  741. SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
  742. static const char * const rt5645_dacr2_src[] = {
  743. "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
  744. };
  745. static SOC_ENUM_SINGLE_DECL(
  746. rt5645_dac2r_enum, RT5645_DAC_CTRL,
  747. RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
  748. static const struct snd_kcontrol_new rt5645_dac_r2_mux =
  749. SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
  750. /* INL/R source */
  751. static const char * const rt5645_inl_src[] = {
  752. "IN2P", "MonoP"
  753. };
  754. static SOC_ENUM_SINGLE_DECL(
  755. rt5645_inl_enum, RT5645_INL1_INR1_VOL,
  756. RT5645_INL_SEL_SFT, rt5645_inl_src);
  757. static const struct snd_kcontrol_new rt5645_inl_mux =
  758. SOC_DAPM_ENUM("INL source", rt5645_inl_enum);
  759. static const char * const rt5645_inr_src[] = {
  760. "IN2N", "MonoN"
  761. };
  762. static SOC_ENUM_SINGLE_DECL(
  763. rt5645_inr_enum, RT5645_INL1_INR1_VOL,
  764. RT5645_INR_SEL_SFT, rt5645_inr_src);
  765. static const struct snd_kcontrol_new rt5645_inr_mux =
  766. SOC_DAPM_ENUM("INR source", rt5645_inr_enum);
  767. /* Stereo1 ADC source */
  768. /* MX-27 [12] */
  769. static const char * const rt5645_stereo_adc1_src[] = {
  770. "DAC MIX", "ADC"
  771. };
  772. static SOC_ENUM_SINGLE_DECL(
  773. rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
  774. RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
  775. static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
  776. SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
  777. /* MX-27 [11] */
  778. static const char * const rt5645_stereo_adc2_src[] = {
  779. "DAC MIX", "DMIC"
  780. };
  781. static SOC_ENUM_SINGLE_DECL(
  782. rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
  783. RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
  784. static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
  785. SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
  786. /* MX-27 [8] */
  787. static const char * const rt5645_stereo_dmic_src[] = {
  788. "DMIC1", "DMIC2"
  789. };
  790. static SOC_ENUM_SINGLE_DECL(
  791. rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
  792. RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
  793. static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
  794. SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
  795. /* Mono ADC source */
  796. /* MX-28 [12] */
  797. static const char * const rt5645_mono_adc_l1_src[] = {
  798. "Mono DAC MIXL", "ADC"
  799. };
  800. static SOC_ENUM_SINGLE_DECL(
  801. rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
  802. RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
  803. static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
  804. SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
  805. /* MX-28 [11] */
  806. static const char * const rt5645_mono_adc_l2_src[] = {
  807. "Mono DAC MIXL", "DMIC"
  808. };
  809. static SOC_ENUM_SINGLE_DECL(
  810. rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
  811. RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
  812. static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
  813. SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
  814. /* MX-28 [8] */
  815. static const char * const rt5645_mono_dmic_src[] = {
  816. "DMIC1", "DMIC2"
  817. };
  818. static SOC_ENUM_SINGLE_DECL(
  819. rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
  820. RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
  821. static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
  822. SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
  823. /* MX-28 [1:0] */
  824. static SOC_ENUM_SINGLE_DECL(
  825. rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
  826. RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
  827. static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
  828. SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
  829. /* MX-28 [4] */
  830. static const char * const rt5645_mono_adc_r1_src[] = {
  831. "Mono DAC MIXR", "ADC"
  832. };
  833. static SOC_ENUM_SINGLE_DECL(
  834. rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
  835. RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
  836. static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
  837. SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
  838. /* MX-28 [3] */
  839. static const char * const rt5645_mono_adc_r2_src[] = {
  840. "Mono DAC MIXR", "DMIC"
  841. };
  842. static SOC_ENUM_SINGLE_DECL(
  843. rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
  844. RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
  845. static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
  846. SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
  847. /* MX-77 [9:8] */
  848. static const char * const rt5645_if1_adc_in_src[] = {
  849. "IF_ADC1", "IF_ADC2", "VAD_ADC"
  850. };
  851. static SOC_ENUM_SINGLE_DECL(
  852. rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
  853. RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
  854. static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
  855. SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
  856. /* MX-2F [13:12] */
  857. static const char * const rt5645_if2_adc_in_src[] = {
  858. "IF_ADC1", "IF_ADC2", "VAD_ADC"
  859. };
  860. static SOC_ENUM_SINGLE_DECL(
  861. rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
  862. RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
  863. static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
  864. SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
  865. /* MX-2F [1:0] */
  866. static const char * const rt5645_if3_adc_in_src[] = {
  867. "IF_ADC1", "IF_ADC2", "VAD_ADC"
  868. };
  869. static SOC_ENUM_SINGLE_DECL(
  870. rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA,
  871. RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src);
  872. static const struct snd_kcontrol_new rt5645_if3_adc_in_mux =
  873. SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum);
  874. /* MX-31 [15] [13] [11] [9] */
  875. static const char * const rt5645_pdm_src[] = {
  876. "Mono DAC", "Stereo DAC"
  877. };
  878. static SOC_ENUM_SINGLE_DECL(
  879. rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
  880. RT5645_PDM1_L_SFT, rt5645_pdm_src);
  881. static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
  882. SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
  883. static SOC_ENUM_SINGLE_DECL(
  884. rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
  885. RT5645_PDM1_R_SFT, rt5645_pdm_src);
  886. static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
  887. SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
  888. /* MX-9D [9:8] */
  889. static const char * const rt5645_vad_adc_src[] = {
  890. "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
  891. };
  892. static SOC_ENUM_SINGLE_DECL(
  893. rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
  894. RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
  895. static const struct snd_kcontrol_new rt5645_vad_adc_mux =
  896. SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
  897. static const struct snd_kcontrol_new spk_l_vol_control =
  898. SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
  899. RT5645_L_MUTE_SFT, 1, 1);
  900. static const struct snd_kcontrol_new spk_r_vol_control =
  901. SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
  902. RT5645_R_MUTE_SFT, 1, 1);
  903. static const struct snd_kcontrol_new hp_l_vol_control =
  904. SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
  905. RT5645_L_MUTE_SFT, 1, 1);
  906. static const struct snd_kcontrol_new hp_r_vol_control =
  907. SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
  908. RT5645_R_MUTE_SFT, 1, 1);
  909. static const struct snd_kcontrol_new pdm1_l_vol_control =
  910. SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
  911. RT5645_M_PDM1_L, 1, 1);
  912. static const struct snd_kcontrol_new pdm1_r_vol_control =
  913. SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
  914. RT5645_M_PDM1_R, 1, 1);
  915. static void hp_amp_power(struct snd_soc_codec *codec, int on)
  916. {
  917. static int hp_amp_power_count;
  918. struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
  919. if (on) {
  920. if (hp_amp_power_count <= 0) {
  921. /* depop parameters */
  922. snd_soc_update_bits(codec, RT5645_DEPOP_M2,
  923. RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
  924. snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
  925. regmap_write(rt5645->regmap, RT5645_PR_BASE +
  926. RT5645_HP_DCC_INT1, 0x9f01);
  927. mdelay(150);
  928. /* headphone amp power on */
  929. snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
  930. RT5645_PWR_FV1 | RT5645_PWR_FV2 , 0);
  931. snd_soc_update_bits(codec, RT5645_PWR_VOL,
  932. RT5645_PWR_HV_L | RT5645_PWR_HV_R,
  933. RT5645_PWR_HV_L | RT5645_PWR_HV_R);
  934. snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
  935. RT5645_PWR_HP_L | RT5645_PWR_HP_R |
  936. RT5645_PWR_HA,
  937. RT5645_PWR_HP_L | RT5645_PWR_HP_R |
  938. RT5645_PWR_HA);
  939. mdelay(5);
  940. snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
  941. RT5645_PWR_FV1 | RT5645_PWR_FV2,
  942. RT5645_PWR_FV1 | RT5645_PWR_FV2);
  943. snd_soc_update_bits(codec, RT5645_DEPOP_M1,
  944. RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
  945. RT5645_HP_CO_EN | RT5645_HP_SG_EN);
  946. regmap_write(rt5645->regmap, RT5645_PR_BASE +
  947. 0x14, 0x1aaa);
  948. regmap_write(rt5645->regmap, RT5645_PR_BASE +
  949. 0x24, 0x0430);
  950. }
  951. hp_amp_power_count++;
  952. } else {
  953. hp_amp_power_count--;
  954. if (hp_amp_power_count <= 0) {
  955. snd_soc_update_bits(codec, RT5645_DEPOP_M1,
  956. RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
  957. RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
  958. RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
  959. /* headphone amp power down */
  960. snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000);
  961. snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
  962. RT5645_PWR_HP_L | RT5645_PWR_HP_R |
  963. RT5645_PWR_HA, 0);
  964. }
  965. }
  966. }
  967. static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
  968. struct snd_kcontrol *kcontrol, int event)
  969. {
  970. struct snd_soc_codec *codec = w->codec;
  971. struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
  972. switch (event) {
  973. case SND_SOC_DAPM_POST_PMU:
  974. hp_amp_power(codec, 1);
  975. /* headphone unmute sequence */
  976. snd_soc_update_bits(codec, RT5645_DEPOP_M3, RT5645_CP_FQ1_MASK |
  977. RT5645_CP_FQ2_MASK | RT5645_CP_FQ3_MASK,
  978. (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
  979. (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
  980. (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
  981. regmap_write(rt5645->regmap,
  982. RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
  983. snd_soc_update_bits(codec, RT5645_DEPOP_M1,
  984. RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
  985. snd_soc_update_bits(codec, RT5645_DEPOP_M1,
  986. RT5645_RSTN_MASK, RT5645_RSTN_EN);
  987. snd_soc_update_bits(codec, RT5645_DEPOP_M1,
  988. RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
  989. RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
  990. RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
  991. msleep(40);
  992. snd_soc_update_bits(codec, RT5645_DEPOP_M1,
  993. RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
  994. RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
  995. RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
  996. break;
  997. case SND_SOC_DAPM_PRE_PMD:
  998. /* headphone mute sequence */
  999. snd_soc_update_bits(codec, RT5645_DEPOP_M3,
  1000. RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
  1001. RT5645_CP_FQ3_MASK,
  1002. (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
  1003. (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
  1004. (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
  1005. regmap_write(rt5645->regmap,
  1006. RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
  1007. snd_soc_update_bits(codec, RT5645_DEPOP_M1,
  1008. RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
  1009. snd_soc_update_bits(codec, RT5645_DEPOP_M1,
  1010. RT5645_RSTP_MASK, RT5645_RSTP_EN);
  1011. snd_soc_update_bits(codec, RT5645_DEPOP_M1,
  1012. RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
  1013. RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
  1014. RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
  1015. msleep(30);
  1016. hp_amp_power(codec, 0);
  1017. break;
  1018. default:
  1019. return 0;
  1020. }
  1021. return 0;
  1022. }
  1023. static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
  1024. struct snd_kcontrol *kcontrol, int event)
  1025. {
  1026. struct snd_soc_codec *codec = w->codec;
  1027. switch (event) {
  1028. case SND_SOC_DAPM_POST_PMU:
  1029. snd_soc_update_bits(codec, RT5645_PWR_DIG1,
  1030. RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
  1031. RT5645_PWR_CLS_D_L,
  1032. RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
  1033. RT5645_PWR_CLS_D_L);
  1034. break;
  1035. case SND_SOC_DAPM_PRE_PMD:
  1036. snd_soc_update_bits(codec, RT5645_PWR_DIG1,
  1037. RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
  1038. RT5645_PWR_CLS_D_L, 0);
  1039. break;
  1040. default:
  1041. return 0;
  1042. }
  1043. return 0;
  1044. }
  1045. static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
  1046. struct snd_kcontrol *kcontrol, int event)
  1047. {
  1048. struct snd_soc_codec *codec = w->codec;
  1049. switch (event) {
  1050. case SND_SOC_DAPM_POST_PMU:
  1051. hp_amp_power(codec, 1);
  1052. snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
  1053. RT5645_PWR_LM, RT5645_PWR_LM);
  1054. snd_soc_update_bits(codec, RT5645_LOUT1,
  1055. RT5645_L_MUTE | RT5645_R_MUTE, 0);
  1056. break;
  1057. case SND_SOC_DAPM_PRE_PMD:
  1058. snd_soc_update_bits(codec, RT5645_LOUT1,
  1059. RT5645_L_MUTE | RT5645_R_MUTE,
  1060. RT5645_L_MUTE | RT5645_R_MUTE);
  1061. snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
  1062. RT5645_PWR_LM, 0);
  1063. hp_amp_power(codec, 0);
  1064. break;
  1065. default:
  1066. return 0;
  1067. }
  1068. return 0;
  1069. }
  1070. static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
  1071. struct snd_kcontrol *kcontrol, int event)
  1072. {
  1073. struct snd_soc_codec *codec = w->codec;
  1074. switch (event) {
  1075. case SND_SOC_DAPM_POST_PMU:
  1076. snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
  1077. RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
  1078. break;
  1079. case SND_SOC_DAPM_PRE_PMD:
  1080. snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
  1081. RT5645_PWR_BST2_P, 0);
  1082. break;
  1083. default:
  1084. return 0;
  1085. }
  1086. return 0;
  1087. }
  1088. static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
  1089. SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
  1090. RT5645_PWR_LDO2_BIT, 0, NULL, 0),
  1091. SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
  1092. RT5645_PWR_PLL_BIT, 0, NULL, 0),
  1093. SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
  1094. RT5645_PWR_JD1_BIT, 0, NULL, 0),
  1095. SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
  1096. RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
  1097. /* Input Side */
  1098. /* micbias */
  1099. SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2,
  1100. RT5645_PWR_MB1_BIT, 0),
  1101. SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2,
  1102. RT5645_PWR_MB2_BIT, 0),
  1103. /* Input Lines */
  1104. SND_SOC_DAPM_INPUT("DMIC L1"),
  1105. SND_SOC_DAPM_INPUT("DMIC R1"),
  1106. SND_SOC_DAPM_INPUT("DMIC L2"),
  1107. SND_SOC_DAPM_INPUT("DMIC R2"),
  1108. SND_SOC_DAPM_INPUT("IN1P"),
  1109. SND_SOC_DAPM_INPUT("IN1N"),
  1110. SND_SOC_DAPM_INPUT("IN2P"),
  1111. SND_SOC_DAPM_INPUT("IN2N"),
  1112. SND_SOC_DAPM_INPUT("Haptic Generator"),
  1113. SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1114. SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1115. SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
  1116. set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
  1117. SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
  1118. RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
  1119. SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
  1120. RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
  1121. /* Boost */
  1122. SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
  1123. RT5645_PWR_BST1_BIT, 0, NULL, 0),
  1124. SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
  1125. RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
  1126. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
  1127. /* Input Volume */
  1128. SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
  1129. RT5645_PWR_IN_L_BIT, 0, NULL, 0),
  1130. SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
  1131. RT5645_PWR_IN_R_BIT, 0, NULL, 0),
  1132. /* REC Mixer */
  1133. SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
  1134. 0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
  1135. SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
  1136. 0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
  1137. /* ADCs */
  1138. SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
  1139. SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
  1140. SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
  1141. RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
  1142. SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
  1143. RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
  1144. /* ADC Mux */
  1145. SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
  1146. &rt5645_sto1_dmic_mux),
  1147. SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
  1148. &rt5645_sto_adc2_mux),
  1149. SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
  1150. &rt5645_sto_adc2_mux),
  1151. SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
  1152. &rt5645_sto_adc1_mux),
  1153. SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
  1154. &rt5645_sto_adc1_mux),
  1155. SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
  1156. &rt5645_mono_dmic_l_mux),
  1157. SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
  1158. &rt5645_mono_dmic_r_mux),
  1159. SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
  1160. &rt5645_mono_adc_l2_mux),
  1161. SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
  1162. &rt5645_mono_adc_l1_mux),
  1163. SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
  1164. &rt5645_mono_adc_r1_mux),
  1165. SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
  1166. &rt5645_mono_adc_r2_mux),
  1167. /* ADC Mixer */
  1168. SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
  1169. RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
  1170. SND_SOC_DAPM_SUPPLY_S("adc stereo2 filter", 1, RT5645_PWR_DIG2,
  1171. RT5645_PWR_ADC_S2F_BIT, 0, NULL, 0),
  1172. SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
  1173. rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
  1174. NULL, 0),
  1175. SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
  1176. rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
  1177. NULL, 0),
  1178. SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
  1179. RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
  1180. SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
  1181. rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
  1182. NULL, 0),
  1183. SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
  1184. RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
  1185. SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
  1186. rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
  1187. NULL, 0),
  1188. /* ADC PGA */
  1189. SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
  1190. SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
  1191. SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
  1192. SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1193. SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1194. SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1195. SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1196. SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1197. SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
  1198. SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
  1199. /* IF1 2 Mux */
  1200. SND_SOC_DAPM_MUX("IF1 ADC Mux", SND_SOC_NOPM,
  1201. 0, 0, &rt5645_if1_adc_in_mux),
  1202. SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
  1203. 0, 0, &rt5645_if2_adc_in_mux),
  1204. /* Digital Interface */
  1205. SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
  1206. RT5645_PWR_I2S1_BIT, 0, NULL, 0),
  1207. SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1208. SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1209. SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1210. SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1211. SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1212. SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1213. SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1214. SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1215. SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1216. SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
  1217. RT5645_PWR_I2S2_BIT, 0, NULL, 0),
  1218. SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1219. SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
  1220. SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
  1221. SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
  1222. /* Digital Interface Select */
  1223. SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
  1224. 0, 0, &rt5645_vad_adc_mux),
  1225. /* Audio Interface */
  1226. SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
  1227. SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
  1228. SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
  1229. SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
  1230. /* Output Side */
  1231. /* DAC mixer before sound effect */
  1232. SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
  1233. rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
  1234. SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
  1235. rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
  1236. /* DAC2 channel Mux */
  1237. SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
  1238. SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
  1239. SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
  1240. RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
  1241. SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
  1242. RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
  1243. SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
  1244. SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
  1245. /* DAC Mixer */
  1246. SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
  1247. RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
  1248. SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
  1249. RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
  1250. SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
  1251. RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
  1252. SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
  1253. rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
  1254. SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
  1255. rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
  1256. SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
  1257. rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
  1258. SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
  1259. rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
  1260. SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
  1261. rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
  1262. SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
  1263. rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
  1264. /* DACs */
  1265. SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
  1266. 0),
  1267. SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
  1268. 0),
  1269. SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
  1270. 0),
  1271. SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
  1272. 0),
  1273. /* OUT Mixer */
  1274. SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
  1275. 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
  1276. SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
  1277. 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
  1278. SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
  1279. 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
  1280. SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
  1281. 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
  1282. /* Ouput Volume */
  1283. SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
  1284. &spk_l_vol_control),
  1285. SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
  1286. &spk_r_vol_control),
  1287. SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
  1288. 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
  1289. SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
  1290. 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
  1291. SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
  1292. RT5645_PWR_HM_L_BIT, 0, NULL, 0),
  1293. SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
  1294. RT5645_PWR_HM_R_BIT, 0, NULL, 0),
  1295. SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
  1296. SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
  1297. SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
  1298. SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
  1299. SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
  1300. /* HPO/LOUT/Mono Mixer */
  1301. SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
  1302. ARRAY_SIZE(rt5645_spo_l_mix)),
  1303. SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
  1304. ARRAY_SIZE(rt5645_spo_r_mix)),
  1305. SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
  1306. ARRAY_SIZE(rt5645_hpo_mix)),
  1307. SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
  1308. ARRAY_SIZE(rt5645_lout_mix)),
  1309. SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
  1310. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
  1311. SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
  1312. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
  1313. SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
  1314. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
  1315. /* PDM */
  1316. SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
  1317. 0, NULL, 0),
  1318. SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
  1319. SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
  1320. SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
  1321. SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
  1322. /* Output Lines */
  1323. SND_SOC_DAPM_OUTPUT("HPOL"),
  1324. SND_SOC_DAPM_OUTPUT("HPOR"),
  1325. SND_SOC_DAPM_OUTPUT("LOUTL"),
  1326. SND_SOC_DAPM_OUTPUT("LOUTR"),
  1327. SND_SOC_DAPM_OUTPUT("PDM1L"),
  1328. SND_SOC_DAPM_OUTPUT("PDM1R"),
  1329. SND_SOC_DAPM_OUTPUT("SPOL"),
  1330. SND_SOC_DAPM_OUTPUT("SPOR"),
  1331. };
  1332. static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
  1333. { "IN1P", NULL, "LDO2" },
  1334. { "IN2P", NULL, "LDO2" },
  1335. { "DMIC1", NULL, "DMIC L1" },
  1336. { "DMIC1", NULL, "DMIC R1" },
  1337. { "DMIC2", NULL, "DMIC L2" },
  1338. { "DMIC2", NULL, "DMIC R2" },
  1339. { "BST1", NULL, "IN1P" },
  1340. { "BST1", NULL, "IN1N" },
  1341. { "BST1", NULL, "JD Power" },
  1342. { "BST1", NULL, "Mic Det Power" },
  1343. { "BST2", NULL, "IN2P" },
  1344. { "BST2", NULL, "IN2N" },
  1345. { "INL VOL", NULL, "IN2P" },
  1346. { "INR VOL", NULL, "IN2N" },
  1347. { "RECMIXL", "HPOL Switch", "HPOL" },
  1348. { "RECMIXL", "INL Switch", "INL VOL" },
  1349. { "RECMIXL", "BST2 Switch", "BST2" },
  1350. { "RECMIXL", "BST1 Switch", "BST1" },
  1351. { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
  1352. { "RECMIXR", "HPOR Switch", "HPOR" },
  1353. { "RECMIXR", "INR Switch", "INR VOL" },
  1354. { "RECMIXR", "BST2 Switch", "BST2" },
  1355. { "RECMIXR", "BST1 Switch", "BST1" },
  1356. { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
  1357. { "ADC L", NULL, "RECMIXL" },
  1358. { "ADC L", NULL, "ADC L power" },
  1359. { "ADC R", NULL, "RECMIXR" },
  1360. { "ADC R", NULL, "ADC R power" },
  1361. {"DMIC L1", NULL, "DMIC CLK"},
  1362. {"DMIC L1", NULL, "DMIC1 Power"},
  1363. {"DMIC R1", NULL, "DMIC CLK"},
  1364. {"DMIC R1", NULL, "DMIC1 Power"},
  1365. {"DMIC L2", NULL, "DMIC CLK"},
  1366. {"DMIC L2", NULL, "DMIC2 Power"},
  1367. {"DMIC R2", NULL, "DMIC CLK"},
  1368. {"DMIC R2", NULL, "DMIC2 Power"},
  1369. { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
  1370. { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
  1371. { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
  1372. { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
  1373. { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
  1374. { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
  1375. { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
  1376. { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
  1377. { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
  1378. { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
  1379. { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
  1380. { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
  1381. { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
  1382. { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
  1383. { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
  1384. { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
  1385. { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
  1386. { "Mono ADC L1 Mux", "ADC", "ADC L" },
  1387. { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
  1388. { "Mono ADC R1 Mux", "ADC", "ADC R" },
  1389. { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
  1390. { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
  1391. { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
  1392. { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
  1393. { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
  1394. { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
  1395. { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
  1396. { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
  1397. { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
  1398. { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
  1399. { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
  1400. { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
  1401. { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
  1402. { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
  1403. { "Mono ADC MIXL", NULL, "adc mono left filter" },
  1404. { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
  1405. { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
  1406. { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
  1407. { "Mono ADC MIXR", NULL, "adc mono right filter" },
  1408. { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
  1409. { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
  1410. { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
  1411. { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
  1412. { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
  1413. { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
  1414. { "IF_ADC2", NULL, "Mono ADC MIXL" },
  1415. { "IF_ADC2", NULL, "Mono ADC MIXR" },
  1416. { "VAD_ADC", NULL, "VAD ADC Mux" },
  1417. { "IF1 ADC Mux", "IF_ADC1", "IF_ADC1" },
  1418. { "IF1 ADC Mux", "IF_ADC2", "IF_ADC2" },
  1419. { "IF1 ADC Mux", "VAD_ADC", "VAD_ADC" },
  1420. { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
  1421. { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
  1422. { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
  1423. { "IF1 ADC", NULL, "I2S1" },
  1424. { "IF1 ADC", NULL, "IF1 ADC Mux" },
  1425. { "IF2 ADC", NULL, "I2S2" },
  1426. { "IF2 ADC", NULL, "IF2 ADC Mux" },
  1427. { "AIF1TX", NULL, "IF1 ADC" },
  1428. { "AIF1TX", NULL, "IF2 ADC" },
  1429. { "AIF2TX", NULL, "IF2 ADC" },
  1430. { "IF1 DAC1", NULL, "AIF1RX" },
  1431. { "IF1 DAC2", NULL, "AIF1RX" },
  1432. { "IF2 DAC", NULL, "AIF2RX" },
  1433. { "IF1 DAC1", NULL, "I2S1" },
  1434. { "IF1 DAC2", NULL, "I2S1" },
  1435. { "IF2 DAC", NULL, "I2S2" },
  1436. { "IF1 DAC2 L", NULL, "IF1 DAC2" },
  1437. { "IF1 DAC2 R", NULL, "IF1 DAC2" },
  1438. { "IF1 DAC1 L", NULL, "IF1 DAC1" },
  1439. { "IF1 DAC1 R", NULL, "IF1 DAC1" },
  1440. { "IF2 DAC L", NULL, "IF2 DAC" },
  1441. { "IF2 DAC R", NULL, "IF2 DAC" },
  1442. { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
  1443. { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
  1444. { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
  1445. { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
  1446. { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
  1447. { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
  1448. { "DAC1 MIXL", NULL, "dac stereo1 filter" },
  1449. { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
  1450. { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
  1451. { "DAC1 MIXR", NULL, "dac stereo1 filter" },
  1452. { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
  1453. { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
  1454. { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
  1455. { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
  1456. { "DAC L2 Volume", NULL, "DAC L2 Mux" },
  1457. { "DAC L2 Volume", NULL, "dac mono left filter" },
  1458. { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
  1459. { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
  1460. { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
  1461. { "DAC R2 Mux", "Haptic", "Haptic Generator" },
  1462. { "DAC R2 Volume", NULL, "DAC R2 Mux" },
  1463. { "DAC R2 Volume", NULL, "dac mono right filter" },
  1464. { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
  1465. { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
  1466. { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
  1467. { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
  1468. { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
  1469. { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
  1470. { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
  1471. { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
  1472. { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
  1473. { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
  1474. { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
  1475. { "Mono DAC MIXL", NULL, "dac mono left filter" },
  1476. { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
  1477. { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
  1478. { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
  1479. { "Mono DAC MIXR", NULL, "dac mono right filter" },
  1480. { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
  1481. { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
  1482. { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
  1483. { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
  1484. { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
  1485. { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
  1486. { "DAC L1", NULL, "Stereo DAC MIXL" },
  1487. { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
  1488. { "DAC R1", NULL, "Stereo DAC MIXR" },
  1489. { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
  1490. { "DAC L2", NULL, "Mono DAC MIXL" },
  1491. { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
  1492. { "DAC R2", NULL, "Mono DAC MIXR" },
  1493. { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
  1494. { "SPK MIXL", "BST1 Switch", "BST1" },
  1495. { "SPK MIXL", "INL Switch", "INL VOL" },
  1496. { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
  1497. { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
  1498. { "SPK MIXR", "BST2 Switch", "BST2" },
  1499. { "SPK MIXR", "INR Switch", "INR VOL" },
  1500. { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
  1501. { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
  1502. { "OUT MIXL", "BST1 Switch", "BST1" },
  1503. { "OUT MIXL", "INL Switch", "INL VOL" },
  1504. { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
  1505. { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
  1506. { "OUT MIXR", "BST2 Switch", "BST2" },
  1507. { "OUT MIXR", "INR Switch", "INR VOL" },
  1508. { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
  1509. { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
  1510. { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
  1511. { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
  1512. { "HPOVOL MIXL", "INL Switch", "INL VOL" },
  1513. { "HPOVOL MIXL", "BST1 Switch", "BST1" },
  1514. { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
  1515. { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
  1516. { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
  1517. { "HPOVOL MIXR", "INR Switch", "INR VOL" },
  1518. { "HPOVOL MIXR", "BST2 Switch", "BST2" },
  1519. { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
  1520. { "DAC 2", NULL, "DAC L2" },
  1521. { "DAC 2", NULL, "DAC R2" },
  1522. { "DAC 1", NULL, "DAC L1" },
  1523. { "DAC 1", NULL, "DAC R1" },
  1524. { "HPOVOL L", "Switch", "HPOVOL MIXL" },
  1525. { "HPOVOL R", "Switch", "HPOVOL MIXR" },
  1526. { "HPOVOL", NULL, "HPOVOL L" },
  1527. { "HPOVOL", NULL, "HPOVOL R" },
  1528. { "HPO MIX", "DAC1 Switch", "DAC 1" },
  1529. { "HPO MIX", "HPVOL Switch", "HPOVOL" },
  1530. { "SPKVOL L", "Switch", "SPK MIXL" },
  1531. { "SPKVOL R", "Switch", "SPK MIXR" },
  1532. { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
  1533. { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
  1534. { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
  1535. { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
  1536. { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
  1537. { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
  1538. { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
  1539. { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
  1540. { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
  1541. { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
  1542. { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
  1543. { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
  1544. { "PDM1 L Mux", NULL, "PDM1 Power" },
  1545. { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
  1546. { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
  1547. { "PDM1 R Mux", NULL, "PDM1 Power" },
  1548. { "HP amp", NULL, "HPO MIX" },
  1549. { "HP amp", NULL, "JD Power" },
  1550. { "HP amp", NULL, "Mic Det Power" },
  1551. { "HP amp", NULL, "LDO2" },
  1552. { "HPOL", NULL, "HP amp" },
  1553. { "HPOR", NULL, "HP amp" },
  1554. { "LOUT amp", NULL, "LOUT MIX" },
  1555. { "LOUTL", NULL, "LOUT amp" },
  1556. { "LOUTR", NULL, "LOUT amp" },
  1557. { "PDM1 L", "Switch", "PDM1 L Mux" },
  1558. { "PDM1 R", "Switch", "PDM1 R Mux" },
  1559. { "PDM1L", NULL, "PDM1 L" },
  1560. { "PDM1R", NULL, "PDM1 R" },
  1561. { "SPK amp", NULL, "SPOL MIX" },
  1562. { "SPK amp", NULL, "SPOR MIX" },
  1563. { "SPOL", NULL, "SPK amp" },
  1564. { "SPOR", NULL, "SPK amp" },
  1565. };
  1566. static int rt5645_hw_params(struct snd_pcm_substream *substream,
  1567. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  1568. {
  1569. struct snd_soc_codec *codec = dai->codec;
  1570. struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
  1571. unsigned int val_len = 0, val_clk, mask_clk;
  1572. int pre_div, bclk_ms, frame_size;
  1573. rt5645->lrck[dai->id] = params_rate(params);
  1574. pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
  1575. if (pre_div < 0) {
  1576. dev_err(codec->dev, "Unsupported clock setting\n");
  1577. return -EINVAL;
  1578. }
  1579. frame_size = snd_soc_params_to_frame_size(params);
  1580. if (frame_size < 0) {
  1581. dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
  1582. return -EINVAL;
  1583. }
  1584. bclk_ms = frame_size > 32;
  1585. rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
  1586. dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
  1587. rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
  1588. dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
  1589. bclk_ms, pre_div, dai->id);
  1590. switch (params_width(params)) {
  1591. case 16:
  1592. break;
  1593. case 20:
  1594. val_len |= RT5645_I2S_DL_20;
  1595. break;
  1596. case 24:
  1597. val_len |= RT5645_I2S_DL_24;
  1598. break;
  1599. case 8:
  1600. val_len |= RT5645_I2S_DL_8;
  1601. break;
  1602. default:
  1603. return -EINVAL;
  1604. }
  1605. switch (dai->id) {
  1606. case RT5645_AIF1:
  1607. mask_clk = RT5645_I2S_BCLK_MS1_MASK | RT5645_I2S_PD1_MASK;
  1608. val_clk = bclk_ms << RT5645_I2S_BCLK_MS1_SFT |
  1609. pre_div << RT5645_I2S_PD1_SFT;
  1610. snd_soc_update_bits(codec, RT5645_I2S1_SDP,
  1611. RT5645_I2S_DL_MASK, val_len);
  1612. snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
  1613. break;
  1614. case RT5645_AIF2:
  1615. mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
  1616. val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
  1617. pre_div << RT5645_I2S_PD2_SFT;
  1618. snd_soc_update_bits(codec, RT5645_I2S2_SDP,
  1619. RT5645_I2S_DL_MASK, val_len);
  1620. snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
  1621. break;
  1622. default:
  1623. dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
  1624. return -EINVAL;
  1625. }
  1626. return 0;
  1627. }
  1628. static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  1629. {
  1630. struct snd_soc_codec *codec = dai->codec;
  1631. struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
  1632. unsigned int reg_val = 0;
  1633. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1634. case SND_SOC_DAIFMT_CBM_CFM:
  1635. rt5645->master[dai->id] = 1;
  1636. break;
  1637. case SND_SOC_DAIFMT_CBS_CFS:
  1638. reg_val |= RT5645_I2S_MS_S;
  1639. rt5645->master[dai->id] = 0;
  1640. break;
  1641. default:
  1642. return -EINVAL;
  1643. }
  1644. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  1645. case SND_SOC_DAIFMT_NB_NF:
  1646. break;
  1647. case SND_SOC_DAIFMT_IB_NF:
  1648. reg_val |= RT5645_I2S_BP_INV;
  1649. break;
  1650. default:
  1651. return -EINVAL;
  1652. }
  1653. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  1654. case SND_SOC_DAIFMT_I2S:
  1655. break;
  1656. case SND_SOC_DAIFMT_LEFT_J:
  1657. reg_val |= RT5645_I2S_DF_LEFT;
  1658. break;
  1659. case SND_SOC_DAIFMT_DSP_A:
  1660. reg_val |= RT5645_I2S_DF_PCM_A;
  1661. break;
  1662. case SND_SOC_DAIFMT_DSP_B:
  1663. reg_val |= RT5645_I2S_DF_PCM_B;
  1664. break;
  1665. default:
  1666. return -EINVAL;
  1667. }
  1668. switch (dai->id) {
  1669. case RT5645_AIF1:
  1670. snd_soc_update_bits(codec, RT5645_I2S1_SDP,
  1671. RT5645_I2S_MS_MASK | RT5645_I2S_BP_MASK |
  1672. RT5645_I2S_DF_MASK, reg_val);
  1673. break;
  1674. case RT5645_AIF2:
  1675. snd_soc_update_bits(codec, RT5645_I2S2_SDP,
  1676. RT5645_I2S_MS_MASK | RT5645_I2S_BP_MASK |
  1677. RT5645_I2S_DF_MASK, reg_val);
  1678. break;
  1679. default:
  1680. dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
  1681. return -EINVAL;
  1682. }
  1683. return 0;
  1684. }
  1685. static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
  1686. int clk_id, unsigned int freq, int dir)
  1687. {
  1688. struct snd_soc_codec *codec = dai->codec;
  1689. struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
  1690. unsigned int reg_val = 0;
  1691. if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
  1692. return 0;
  1693. switch (clk_id) {
  1694. case RT5645_SCLK_S_MCLK:
  1695. reg_val |= RT5645_SCLK_SRC_MCLK;
  1696. break;
  1697. case RT5645_SCLK_S_PLL1:
  1698. reg_val |= RT5645_SCLK_SRC_PLL1;
  1699. break;
  1700. case RT5645_SCLK_S_RCCLK:
  1701. reg_val |= RT5645_SCLK_SRC_RCCLK;
  1702. break;
  1703. default:
  1704. dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
  1705. return -EINVAL;
  1706. }
  1707. snd_soc_update_bits(codec, RT5645_GLB_CLK,
  1708. RT5645_SCLK_SRC_MASK, reg_val);
  1709. rt5645->sysclk = freq;
  1710. rt5645->sysclk_src = clk_id;
  1711. dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
  1712. return 0;
  1713. }
  1714. static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
  1715. unsigned int freq_in, unsigned int freq_out)
  1716. {
  1717. struct snd_soc_codec *codec = dai->codec;
  1718. struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
  1719. struct rl6231_pll_code pll_code;
  1720. int ret;
  1721. if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
  1722. freq_out == rt5645->pll_out)
  1723. return 0;
  1724. if (!freq_in || !freq_out) {
  1725. dev_dbg(codec->dev, "PLL disabled\n");
  1726. rt5645->pll_in = 0;
  1727. rt5645->pll_out = 0;
  1728. snd_soc_update_bits(codec, RT5645_GLB_CLK,
  1729. RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
  1730. return 0;
  1731. }
  1732. switch (source) {
  1733. case RT5645_PLL1_S_MCLK:
  1734. snd_soc_update_bits(codec, RT5645_GLB_CLK,
  1735. RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
  1736. break;
  1737. case RT5645_PLL1_S_BCLK1:
  1738. case RT5645_PLL1_S_BCLK2:
  1739. switch (dai->id) {
  1740. case RT5645_AIF1:
  1741. snd_soc_update_bits(codec, RT5645_GLB_CLK,
  1742. RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
  1743. break;
  1744. case RT5645_AIF2:
  1745. snd_soc_update_bits(codec, RT5645_GLB_CLK,
  1746. RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
  1747. break;
  1748. default:
  1749. dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
  1750. return -EINVAL;
  1751. }
  1752. break;
  1753. default:
  1754. dev_err(codec->dev, "Unknown PLL source %d\n", source);
  1755. return -EINVAL;
  1756. }
  1757. ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
  1758. if (ret < 0) {
  1759. dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
  1760. return ret;
  1761. }
  1762. dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
  1763. pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
  1764. pll_code.n_code, pll_code.k_code);
  1765. snd_soc_write(codec, RT5645_PLL_CTRL1,
  1766. pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
  1767. snd_soc_write(codec, RT5645_PLL_CTRL2,
  1768. (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
  1769. pll_code.m_bp << RT5645_PLL_M_BP_SFT);
  1770. rt5645->pll_in = freq_in;
  1771. rt5645->pll_out = freq_out;
  1772. rt5645->pll_src = source;
  1773. return 0;
  1774. }
  1775. static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
  1776. unsigned int rx_mask, int slots, int slot_width)
  1777. {
  1778. struct snd_soc_codec *codec = dai->codec;
  1779. unsigned int val = 0;
  1780. if (rx_mask || tx_mask)
  1781. val |= (1 << 14);
  1782. switch (slots) {
  1783. case 4:
  1784. val |= (1 << 12);
  1785. break;
  1786. case 6:
  1787. val |= (2 << 12);
  1788. break;
  1789. case 8:
  1790. val |= (3 << 12);
  1791. break;
  1792. case 2:
  1793. default:
  1794. break;
  1795. }
  1796. switch (slot_width) {
  1797. case 20:
  1798. val |= (1 << 10);
  1799. break;
  1800. case 24:
  1801. val |= (2 << 10);
  1802. break;
  1803. case 32:
  1804. val |= (3 << 10);
  1805. break;
  1806. case 16:
  1807. default:
  1808. break;
  1809. }
  1810. snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, 0x7c00, val);
  1811. return 0;
  1812. }
  1813. static int rt5645_set_bias_level(struct snd_soc_codec *codec,
  1814. enum snd_soc_bias_level level)
  1815. {
  1816. switch (level) {
  1817. case SND_SOC_BIAS_STANDBY:
  1818. if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
  1819. snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
  1820. RT5645_PWR_VREF1 | RT5645_PWR_MB |
  1821. RT5645_PWR_BG | RT5645_PWR_VREF2,
  1822. RT5645_PWR_VREF1 | RT5645_PWR_MB |
  1823. RT5645_PWR_BG | RT5645_PWR_VREF2);
  1824. mdelay(10);
  1825. snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
  1826. RT5645_PWR_FV1 | RT5645_PWR_FV2,
  1827. RT5645_PWR_FV1 | RT5645_PWR_FV2);
  1828. snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
  1829. RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
  1830. }
  1831. break;
  1832. case SND_SOC_BIAS_OFF:
  1833. snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100);
  1834. snd_soc_write(codec, RT5645_GEN_CTRL1, 0x0128);
  1835. snd_soc_write(codec, RT5645_PWR_DIG1, 0x0000);
  1836. snd_soc_write(codec, RT5645_PWR_DIG2, 0x0000);
  1837. snd_soc_write(codec, RT5645_PWR_VOL, 0x0000);
  1838. snd_soc_write(codec, RT5645_PWR_MIXER, 0x0000);
  1839. snd_soc_write(codec, RT5645_PWR_ANLG1, 0x0000);
  1840. snd_soc_write(codec, RT5645_PWR_ANLG2, 0x0000);
  1841. break;
  1842. default:
  1843. break;
  1844. }
  1845. codec->dapm.bias_level = level;
  1846. return 0;
  1847. }
  1848. static int rt5645_jack_detect(struct snd_soc_codec *codec,
  1849. struct snd_soc_jack *jack)
  1850. {
  1851. struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
  1852. int gpio_state, jack_type = 0;
  1853. unsigned int val;
  1854. gpio_state = gpio_get_value(rt5645->pdata.hp_det_gpio);
  1855. dev_dbg(codec->dev, "gpio = %d(%d)\n", rt5645->pdata.hp_det_gpio,
  1856. gpio_state);
  1857. if ((rt5645->pdata.gpio_hp_det_active_high && gpio_state) ||
  1858. (!rt5645->pdata.gpio_hp_det_active_high && !gpio_state)) {
  1859. snd_soc_dapm_force_enable_pin(&codec->dapm, "micbias1");
  1860. snd_soc_dapm_force_enable_pin(&codec->dapm, "micbias2");
  1861. snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2");
  1862. snd_soc_dapm_force_enable_pin(&codec->dapm, "Mic Det Power");
  1863. snd_soc_dapm_sync(&codec->dapm);
  1864. snd_soc_write(codec, RT5645_IN1_CTRL1, 0x0006);
  1865. snd_soc_write(codec, RT5645_JD_CTRL3, 0x00b0);
  1866. snd_soc_update_bits(codec, RT5645_IN1_CTRL2,
  1867. RT5645_CBJ_MN_JD, 0);
  1868. snd_soc_update_bits(codec, RT5645_IN1_CTRL2,
  1869. RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
  1870. msleep(400);
  1871. val = snd_soc_read(codec, RT5645_IN1_CTRL3) & 0x7;
  1872. dev_dbg(codec->dev, "val = %d\n", val);
  1873. if (val == 1 || val == 2)
  1874. jack_type = SND_JACK_HEADSET;
  1875. else
  1876. jack_type = SND_JACK_HEADPHONE;
  1877. snd_soc_dapm_disable_pin(&codec->dapm, "micbias1");
  1878. snd_soc_dapm_disable_pin(&codec->dapm, "micbias2");
  1879. snd_soc_dapm_disable_pin(&codec->dapm, "LDO2");
  1880. snd_soc_dapm_disable_pin(&codec->dapm, "Mic Det Power");
  1881. snd_soc_dapm_sync(&codec->dapm);
  1882. }
  1883. snd_soc_jack_report(rt5645->jack, jack_type, SND_JACK_HEADSET);
  1884. return 0;
  1885. }
  1886. int rt5645_set_jack_detect(struct snd_soc_codec *codec,
  1887. struct snd_soc_jack *jack)
  1888. {
  1889. struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
  1890. rt5645->jack = jack;
  1891. rt5645_jack_detect(codec, rt5645->jack);
  1892. return 0;
  1893. }
  1894. EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
  1895. static irqreturn_t rt5645_irq(int irq, void *data)
  1896. {
  1897. struct rt5645_priv *rt5645 = data;
  1898. rt5645_jack_detect(rt5645->codec, rt5645->jack);
  1899. return IRQ_HANDLED;
  1900. }
  1901. static int rt5645_probe(struct snd_soc_codec *codec)
  1902. {
  1903. struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
  1904. rt5645->codec = codec;
  1905. rt5645_set_bias_level(codec, SND_SOC_BIAS_OFF);
  1906. snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200);
  1907. return 0;
  1908. }
  1909. static int rt5645_remove(struct snd_soc_codec *codec)
  1910. {
  1911. rt5645_reset(codec);
  1912. return 0;
  1913. }
  1914. #ifdef CONFIG_PM
  1915. static int rt5645_suspend(struct snd_soc_codec *codec)
  1916. {
  1917. struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
  1918. regcache_cache_only(rt5645->regmap, true);
  1919. regcache_mark_dirty(rt5645->regmap);
  1920. return 0;
  1921. }
  1922. static int rt5645_resume(struct snd_soc_codec *codec)
  1923. {
  1924. struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
  1925. regcache_cache_only(rt5645->regmap, false);
  1926. regcache_sync(rt5645->regmap);
  1927. return 0;
  1928. }
  1929. #else
  1930. #define rt5645_suspend NULL
  1931. #define rt5645_resume NULL
  1932. #endif
  1933. #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
  1934. #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  1935. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
  1936. static struct snd_soc_dai_ops rt5645_aif_dai_ops = {
  1937. .hw_params = rt5645_hw_params,
  1938. .set_fmt = rt5645_set_dai_fmt,
  1939. .set_sysclk = rt5645_set_dai_sysclk,
  1940. .set_tdm_slot = rt5645_set_tdm_slot,
  1941. .set_pll = rt5645_set_dai_pll,
  1942. };
  1943. static struct snd_soc_dai_driver rt5645_dai[] = {
  1944. {
  1945. .name = "rt5645-aif1",
  1946. .id = RT5645_AIF1,
  1947. .playback = {
  1948. .stream_name = "AIF1 Playback",
  1949. .channels_min = 1,
  1950. .channels_max = 2,
  1951. .rates = RT5645_STEREO_RATES,
  1952. .formats = RT5645_FORMATS,
  1953. },
  1954. .capture = {
  1955. .stream_name = "AIF1 Capture",
  1956. .channels_min = 1,
  1957. .channels_max = 2,
  1958. .rates = RT5645_STEREO_RATES,
  1959. .formats = RT5645_FORMATS,
  1960. },
  1961. .ops = &rt5645_aif_dai_ops,
  1962. },
  1963. {
  1964. .name = "rt5645-aif2",
  1965. .id = RT5645_AIF2,
  1966. .playback = {
  1967. .stream_name = "AIF2 Playback",
  1968. .channels_min = 1,
  1969. .channels_max = 2,
  1970. .rates = RT5645_STEREO_RATES,
  1971. .formats = RT5645_FORMATS,
  1972. },
  1973. .capture = {
  1974. .stream_name = "AIF2 Capture",
  1975. .channels_min = 1,
  1976. .channels_max = 2,
  1977. .rates = RT5645_STEREO_RATES,
  1978. .formats = RT5645_FORMATS,
  1979. },
  1980. .ops = &rt5645_aif_dai_ops,
  1981. },
  1982. };
  1983. static struct snd_soc_codec_driver soc_codec_dev_rt5645 = {
  1984. .probe = rt5645_probe,
  1985. .remove = rt5645_remove,
  1986. .suspend = rt5645_suspend,
  1987. .resume = rt5645_resume,
  1988. .set_bias_level = rt5645_set_bias_level,
  1989. .idle_bias_off = true,
  1990. .controls = rt5645_snd_controls,
  1991. .num_controls = ARRAY_SIZE(rt5645_snd_controls),
  1992. .dapm_widgets = rt5645_dapm_widgets,
  1993. .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets),
  1994. .dapm_routes = rt5645_dapm_routes,
  1995. .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes),
  1996. };
  1997. static const struct regmap_config rt5645_regmap = {
  1998. .reg_bits = 8,
  1999. .val_bits = 16,
  2000. .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
  2001. RT5645_PR_SPACING),
  2002. .volatile_reg = rt5645_volatile_register,
  2003. .readable_reg = rt5645_readable_register,
  2004. .cache_type = REGCACHE_RBTREE,
  2005. .reg_defaults = rt5645_reg,
  2006. .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
  2007. .ranges = rt5645_ranges,
  2008. .num_ranges = ARRAY_SIZE(rt5645_ranges),
  2009. };
  2010. static const struct i2c_device_id rt5645_i2c_id[] = {
  2011. { "rt5645", 0 },
  2012. { }
  2013. };
  2014. MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
  2015. static int rt5645_i2c_probe(struct i2c_client *i2c,
  2016. const struct i2c_device_id *id)
  2017. {
  2018. struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
  2019. struct rt5645_priv *rt5645;
  2020. int ret;
  2021. unsigned int val;
  2022. rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
  2023. GFP_KERNEL);
  2024. if (rt5645 == NULL)
  2025. return -ENOMEM;
  2026. rt5645->i2c = i2c;
  2027. i2c_set_clientdata(i2c, rt5645);
  2028. if (pdata)
  2029. rt5645->pdata = *pdata;
  2030. rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
  2031. if (IS_ERR(rt5645->regmap)) {
  2032. ret = PTR_ERR(rt5645->regmap);
  2033. dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
  2034. ret);
  2035. return ret;
  2036. }
  2037. regmap_read(rt5645->regmap, RT5645_VENDOR_ID2, &val);
  2038. if (val != RT5645_DEVICE_ID) {
  2039. dev_err(&i2c->dev,
  2040. "Device with ID register %x is not rt5645\n", val);
  2041. return -ENODEV;
  2042. }
  2043. regmap_write(rt5645->regmap, RT5645_RESET, 0);
  2044. ret = regmap_register_patch(rt5645->regmap, init_list,
  2045. ARRAY_SIZE(init_list));
  2046. if (ret != 0)
  2047. dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
  2048. if (rt5645->pdata.in2_diff)
  2049. regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
  2050. RT5645_IN_DF2, RT5645_IN_DF2);
  2051. if (rt5645->pdata.dmic_en) {
  2052. regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
  2053. RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
  2054. switch (rt5645->pdata.dmic1_data_pin) {
  2055. case RT5645_DMIC_DATA_IN2N:
  2056. regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
  2057. RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
  2058. break;
  2059. case RT5645_DMIC_DATA_GPIO5:
  2060. regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
  2061. RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
  2062. regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
  2063. RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
  2064. break;
  2065. case RT5645_DMIC_DATA_GPIO11:
  2066. regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
  2067. RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
  2068. regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
  2069. RT5645_GP11_PIN_MASK,
  2070. RT5645_GP11_PIN_DMIC1_SDA);
  2071. break;
  2072. default:
  2073. break;
  2074. }
  2075. switch (rt5645->pdata.dmic2_data_pin) {
  2076. case RT5645_DMIC_DATA_IN2P:
  2077. regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
  2078. RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
  2079. break;
  2080. case RT5645_DMIC_DATA_GPIO6:
  2081. regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
  2082. RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
  2083. regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
  2084. RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
  2085. break;
  2086. case RT5645_DMIC_DATA_GPIO10:
  2087. regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
  2088. RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
  2089. regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
  2090. RT5645_GP10_PIN_MASK,
  2091. RT5645_GP10_PIN_DMIC2_SDA);
  2092. break;
  2093. case RT5645_DMIC_DATA_GPIO12:
  2094. regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
  2095. RT5645_DMIC_1_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
  2096. regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
  2097. RT5645_GP12_PIN_MASK,
  2098. RT5645_GP12_PIN_DMIC2_SDA);
  2099. break;
  2100. default:
  2101. break;
  2102. }
  2103. }
  2104. if (rt5645->i2c->irq) {
  2105. ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
  2106. IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
  2107. | IRQF_ONESHOT, "rt5645", rt5645);
  2108. if (ret)
  2109. dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
  2110. }
  2111. if (gpio_is_valid(rt5645->pdata.hp_det_gpio)) {
  2112. ret = gpio_request(rt5645->pdata.hp_det_gpio, "rt5645");
  2113. if (ret)
  2114. dev_err(&i2c->dev, "Fail gpio_request hp_det_gpio\n");
  2115. ret = gpio_direction_input(rt5645->pdata.hp_det_gpio);
  2116. if (ret)
  2117. dev_err(&i2c->dev, "Fail gpio_direction hp_det_gpio\n");
  2118. }
  2119. return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645,
  2120. rt5645_dai, ARRAY_SIZE(rt5645_dai));
  2121. }
  2122. static int rt5645_i2c_remove(struct i2c_client *i2c)
  2123. {
  2124. struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
  2125. if (i2c->irq)
  2126. free_irq(i2c->irq, rt5645);
  2127. if (gpio_is_valid(rt5645->pdata.hp_det_gpio))
  2128. gpio_free(rt5645->pdata.hp_det_gpio);
  2129. snd_soc_unregister_codec(&i2c->dev);
  2130. return 0;
  2131. }
  2132. static struct i2c_driver rt5645_i2c_driver = {
  2133. .driver = {
  2134. .name = "rt5645",
  2135. .owner = THIS_MODULE,
  2136. },
  2137. .probe = rt5645_i2c_probe,
  2138. .remove = rt5645_i2c_remove,
  2139. .id_table = rt5645_i2c_id,
  2140. };
  2141. module_i2c_driver(rt5645_i2c_driver);
  2142. MODULE_DESCRIPTION("ASoC RT5645 driver");
  2143. MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
  2144. MODULE_LICENSE("GPL v2");