twl4030.c 67 KB

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  1. /*
  2. * ALSA SoC TWL4030 codec driver
  3. *
  4. * Author: Steve Sakoman, <steve@sakoman.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18. * 02110-1301 USA
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/init.h>
  24. #include <linux/delay.h>
  25. #include <linux/pm.h>
  26. #include <linux/i2c.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/of.h>
  29. #include <linux/of_gpio.h>
  30. #include <linux/i2c/twl.h>
  31. #include <linux/slab.h>
  32. #include <linux/gpio.h>
  33. #include <sound/core.h>
  34. #include <sound/pcm.h>
  35. #include <sound/pcm_params.h>
  36. #include <sound/soc.h>
  37. #include <sound/initval.h>
  38. #include <sound/tlv.h>
  39. /* Register descriptions are here */
  40. #include <linux/mfd/twl4030-audio.h>
  41. /* TWL4030 PMBR1 Register */
  42. #define TWL4030_PMBR1_REG 0x0D
  43. /* TWL4030 PMBR1 Register GPIO6 mux bits */
  44. #define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2)
  45. #define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1)
  46. /* codec private data */
  47. struct twl4030_priv {
  48. unsigned int codec_powered;
  49. /* reference counts of AIF/APLL users */
  50. unsigned int apll_enabled;
  51. struct snd_pcm_substream *master_substream;
  52. struct snd_pcm_substream *slave_substream;
  53. unsigned int configured;
  54. unsigned int rate;
  55. unsigned int sample_bits;
  56. unsigned int channels;
  57. unsigned int sysclk;
  58. /* Output (with associated amp) states */
  59. u8 hsl_enabled, hsr_enabled;
  60. u8 earpiece_enabled;
  61. u8 predrivel_enabled, predriver_enabled;
  62. u8 carkitl_enabled, carkitr_enabled;
  63. u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
  64. struct twl4030_codec_data *pdata;
  65. };
  66. static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030)
  67. {
  68. int i;
  69. u8 byte;
  70. for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) {
  71. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i);
  72. twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte;
  73. }
  74. }
  75. static unsigned int twl4030_read(struct snd_soc_codec *codec, unsigned int reg)
  76. {
  77. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  78. u8 value = 0;
  79. if (reg >= TWL4030_CACHEREGNUM)
  80. return -EIO;
  81. switch (reg) {
  82. case TWL4030_REG_EAR_CTL:
  83. case TWL4030_REG_PREDL_CTL:
  84. case TWL4030_REG_PREDR_CTL:
  85. case TWL4030_REG_PRECKL_CTL:
  86. case TWL4030_REG_PRECKR_CTL:
  87. case TWL4030_REG_HS_GAIN_SET:
  88. value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL];
  89. break;
  90. default:
  91. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
  92. break;
  93. }
  94. return value;
  95. }
  96. static bool twl4030_can_write_to_chip(struct twl4030_priv *twl4030,
  97. unsigned int reg)
  98. {
  99. bool write_to_reg = false;
  100. /* Decide if the given register can be written */
  101. switch (reg) {
  102. case TWL4030_REG_EAR_CTL:
  103. if (twl4030->earpiece_enabled)
  104. write_to_reg = true;
  105. break;
  106. case TWL4030_REG_PREDL_CTL:
  107. if (twl4030->predrivel_enabled)
  108. write_to_reg = true;
  109. break;
  110. case TWL4030_REG_PREDR_CTL:
  111. if (twl4030->predriver_enabled)
  112. write_to_reg = true;
  113. break;
  114. case TWL4030_REG_PRECKL_CTL:
  115. if (twl4030->carkitl_enabled)
  116. write_to_reg = true;
  117. break;
  118. case TWL4030_REG_PRECKR_CTL:
  119. if (twl4030->carkitr_enabled)
  120. write_to_reg = true;
  121. break;
  122. case TWL4030_REG_HS_GAIN_SET:
  123. if (twl4030->hsl_enabled || twl4030->hsr_enabled)
  124. write_to_reg = true;
  125. break;
  126. default:
  127. /* All other register can be written */
  128. write_to_reg = true;
  129. break;
  130. }
  131. return write_to_reg;
  132. }
  133. static int twl4030_write(struct snd_soc_codec *codec, unsigned int reg,
  134. unsigned int value)
  135. {
  136. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  137. /* Update the ctl cache */
  138. switch (reg) {
  139. case TWL4030_REG_EAR_CTL:
  140. case TWL4030_REG_PREDL_CTL:
  141. case TWL4030_REG_PREDR_CTL:
  142. case TWL4030_REG_PRECKL_CTL:
  143. case TWL4030_REG_PRECKR_CTL:
  144. case TWL4030_REG_HS_GAIN_SET:
  145. twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value;
  146. break;
  147. default:
  148. break;
  149. }
  150. if (twl4030_can_write_to_chip(twl4030, reg))
  151. return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
  152. return 0;
  153. }
  154. static inline void twl4030_wait_ms(int time)
  155. {
  156. if (time < 60) {
  157. time *= 1000;
  158. usleep_range(time, time + 500);
  159. } else {
  160. msleep(time);
  161. }
  162. }
  163. static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
  164. {
  165. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  166. int mode;
  167. if (enable == twl4030->codec_powered)
  168. return;
  169. if (enable)
  170. mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
  171. else
  172. mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
  173. if (mode >= 0)
  174. twl4030->codec_powered = enable;
  175. /* REVISIT: this delay is present in TI sample drivers */
  176. /* but there seems to be no TRM requirement for it */
  177. udelay(10);
  178. }
  179. static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata,
  180. struct device_node *node)
  181. {
  182. int value;
  183. of_property_read_u32(node, "ti,digimic_delay",
  184. &pdata->digimic_delay);
  185. of_property_read_u32(node, "ti,ramp_delay_value",
  186. &pdata->ramp_delay_value);
  187. of_property_read_u32(node, "ti,offset_cncl_path",
  188. &pdata->offset_cncl_path);
  189. if (!of_property_read_u32(node, "ti,hs_extmute", &value))
  190. pdata->hs_extmute = value;
  191. pdata->hs_extmute_gpio = of_get_named_gpio(node,
  192. "ti,hs_extmute_gpio", 0);
  193. if (gpio_is_valid(pdata->hs_extmute_gpio))
  194. pdata->hs_extmute = 1;
  195. }
  196. static struct twl4030_codec_data *twl4030_get_pdata(struct snd_soc_codec *codec)
  197. {
  198. struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
  199. struct device_node *twl4030_codec_node = NULL;
  200. twl4030_codec_node = of_find_node_by_name(codec->dev->parent->of_node,
  201. "codec");
  202. if (!pdata && twl4030_codec_node) {
  203. pdata = devm_kzalloc(codec->dev,
  204. sizeof(struct twl4030_codec_data),
  205. GFP_KERNEL);
  206. if (!pdata) {
  207. dev_err(codec->dev, "Can not allocate memory\n");
  208. return NULL;
  209. }
  210. twl4030_setup_pdata_of(pdata, twl4030_codec_node);
  211. }
  212. return pdata;
  213. }
  214. static void twl4030_init_chip(struct snd_soc_codec *codec)
  215. {
  216. struct twl4030_codec_data *pdata;
  217. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  218. u8 reg, byte;
  219. int i = 0;
  220. pdata = twl4030_get_pdata(codec);
  221. if (pdata && pdata->hs_extmute) {
  222. if (gpio_is_valid(pdata->hs_extmute_gpio)) {
  223. int ret;
  224. if (!pdata->hs_extmute_gpio)
  225. dev_warn(codec->dev,
  226. "Extmute GPIO is 0 is this correct?\n");
  227. ret = gpio_request_one(pdata->hs_extmute_gpio,
  228. GPIOF_OUT_INIT_LOW,
  229. "hs_extmute");
  230. if (ret) {
  231. dev_err(codec->dev,
  232. "Failed to get hs_extmute GPIO\n");
  233. pdata->hs_extmute_gpio = -1;
  234. }
  235. } else {
  236. u8 pin_mux;
  237. /* Set TWL4030 GPIO6 as EXTMUTE signal */
  238. twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux,
  239. TWL4030_PMBR1_REG);
  240. pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03);
  241. pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02);
  242. twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux,
  243. TWL4030_PMBR1_REG);
  244. }
  245. }
  246. /* Initialize the local ctl register cache */
  247. tw4030_init_ctl_cache(twl4030);
  248. /* anti-pop when changing analog gain */
  249. reg = twl4030_read(codec, TWL4030_REG_MISC_SET_1);
  250. twl4030_write(codec, TWL4030_REG_MISC_SET_1,
  251. reg | TWL4030_SMOOTH_ANAVOL_EN);
  252. twl4030_write(codec, TWL4030_REG_OPTION,
  253. TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
  254. TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
  255. /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
  256. twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
  257. /* Machine dependent setup */
  258. if (!pdata)
  259. return;
  260. twl4030->pdata = pdata;
  261. reg = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
  262. reg &= ~TWL4030_RAMP_DELAY;
  263. reg |= (pdata->ramp_delay_value << 2);
  264. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, reg);
  265. /* initiate offset cancellation */
  266. twl4030_codec_enable(codec, 1);
  267. reg = twl4030_read(codec, TWL4030_REG_ANAMICL);
  268. reg &= ~TWL4030_OFFSET_CNCL_SEL;
  269. reg |= pdata->offset_cncl_path;
  270. twl4030_write(codec, TWL4030_REG_ANAMICL,
  271. reg | TWL4030_CNCL_OFFSET_START);
  272. /*
  273. * Wait for offset cancellation to complete.
  274. * Since this takes a while, do not slam the i2c.
  275. * Start polling the status after ~20ms.
  276. */
  277. msleep(20);
  278. do {
  279. usleep_range(1000, 2000);
  280. twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true);
  281. twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
  282. TWL4030_REG_ANAMICL);
  283. twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false);
  284. } while ((i++ < 100) &&
  285. ((byte & TWL4030_CNCL_OFFSET_START) ==
  286. TWL4030_CNCL_OFFSET_START));
  287. twl4030_codec_enable(codec, 0);
  288. }
  289. static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
  290. {
  291. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  292. if (enable) {
  293. twl4030->apll_enabled++;
  294. if (twl4030->apll_enabled == 1)
  295. twl4030_audio_enable_resource(
  296. TWL4030_AUDIO_RES_APLL);
  297. } else {
  298. twl4030->apll_enabled--;
  299. if (!twl4030->apll_enabled)
  300. twl4030_audio_disable_resource(
  301. TWL4030_AUDIO_RES_APLL);
  302. }
  303. }
  304. /* Earpiece */
  305. static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
  306. SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
  307. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
  308. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
  309. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
  310. };
  311. /* PreDrive Left */
  312. static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
  313. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
  314. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
  315. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
  316. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
  317. };
  318. /* PreDrive Right */
  319. static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
  320. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
  321. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
  322. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
  323. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
  324. };
  325. /* Headset Left */
  326. static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
  327. SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
  328. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
  329. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
  330. };
  331. /* Headset Right */
  332. static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
  333. SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
  334. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
  335. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
  336. };
  337. /* Carkit Left */
  338. static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
  339. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
  340. SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
  341. SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
  342. };
  343. /* Carkit Right */
  344. static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
  345. SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
  346. SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
  347. SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
  348. };
  349. /* Handsfree Left */
  350. static const char *twl4030_handsfreel_texts[] =
  351. {"Voice", "AudioL1", "AudioL2", "AudioR2"};
  352. static SOC_ENUM_SINGLE_DECL(twl4030_handsfreel_enum,
  353. TWL4030_REG_HFL_CTL, 0,
  354. twl4030_handsfreel_texts);
  355. static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
  356. SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
  357. /* Handsfree Left virtual mute */
  358. static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
  359. SOC_DAPM_SINGLE_VIRT("Switch", 1);
  360. /* Handsfree Right */
  361. static const char *twl4030_handsfreer_texts[] =
  362. {"Voice", "AudioR1", "AudioR2", "AudioL2"};
  363. static SOC_ENUM_SINGLE_DECL(twl4030_handsfreer_enum,
  364. TWL4030_REG_HFR_CTL, 0,
  365. twl4030_handsfreer_texts);
  366. static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
  367. SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
  368. /* Handsfree Right virtual mute */
  369. static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
  370. SOC_DAPM_SINGLE_VIRT("Switch", 1);
  371. /* Vibra */
  372. /* Vibra audio path selection */
  373. static const char *twl4030_vibra_texts[] =
  374. {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
  375. static SOC_ENUM_SINGLE_DECL(twl4030_vibra_enum,
  376. TWL4030_REG_VIBRA_CTL, 2,
  377. twl4030_vibra_texts);
  378. static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
  379. SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
  380. /* Vibra path selection: local vibrator (PWM) or audio driven */
  381. static const char *twl4030_vibrapath_texts[] =
  382. {"Local vibrator", "Audio"};
  383. static SOC_ENUM_SINGLE_DECL(twl4030_vibrapath_enum,
  384. TWL4030_REG_VIBRA_CTL, 4,
  385. twl4030_vibrapath_texts);
  386. static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
  387. SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
  388. /* Left analog microphone selection */
  389. static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
  390. SOC_DAPM_SINGLE("Main Mic Capture Switch",
  391. TWL4030_REG_ANAMICL, 0, 1, 0),
  392. SOC_DAPM_SINGLE("Headset Mic Capture Switch",
  393. TWL4030_REG_ANAMICL, 1, 1, 0),
  394. SOC_DAPM_SINGLE("AUXL Capture Switch",
  395. TWL4030_REG_ANAMICL, 2, 1, 0),
  396. SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
  397. TWL4030_REG_ANAMICL, 3, 1, 0),
  398. };
  399. /* Right analog microphone selection */
  400. static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
  401. SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
  402. SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
  403. };
  404. /* TX1 L/R Analog/Digital microphone selection */
  405. static const char *twl4030_micpathtx1_texts[] =
  406. {"Analog", "Digimic0"};
  407. static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx1_enum,
  408. TWL4030_REG_ADCMICSEL, 0,
  409. twl4030_micpathtx1_texts);
  410. static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
  411. SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
  412. /* TX2 L/R Analog/Digital microphone selection */
  413. static const char *twl4030_micpathtx2_texts[] =
  414. {"Analog", "Digimic1"};
  415. static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx2_enum,
  416. TWL4030_REG_ADCMICSEL, 2,
  417. twl4030_micpathtx2_texts);
  418. static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
  419. SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
  420. /* Analog bypass for AudioR1 */
  421. static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
  422. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
  423. /* Analog bypass for AudioL1 */
  424. static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
  425. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
  426. /* Analog bypass for AudioR2 */
  427. static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
  428. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
  429. /* Analog bypass for AudioL2 */
  430. static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
  431. SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
  432. /* Analog bypass for Voice */
  433. static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
  434. SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
  435. /* Digital bypass gain, mute instead of -30dB */
  436. static const unsigned int twl4030_dapm_dbypass_tlv[] = {
  437. TLV_DB_RANGE_HEAD(3),
  438. 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
  439. 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
  440. 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
  441. };
  442. /* Digital bypass left (TX1L -> RX2L) */
  443. static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
  444. SOC_DAPM_SINGLE_TLV("Volume",
  445. TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
  446. twl4030_dapm_dbypass_tlv);
  447. /* Digital bypass right (TX1R -> RX2R) */
  448. static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
  449. SOC_DAPM_SINGLE_TLV("Volume",
  450. TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
  451. twl4030_dapm_dbypass_tlv);
  452. /*
  453. * Voice Sidetone GAIN volume control:
  454. * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
  455. */
  456. static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
  457. /* Digital bypass voice: sidetone (VUL -> VDL)*/
  458. static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
  459. SOC_DAPM_SINGLE_TLV("Volume",
  460. TWL4030_REG_VSTPGA, 0, 0x29, 0,
  461. twl4030_dapm_dbypassv_tlv);
  462. /*
  463. * Output PGA builder:
  464. * Handle the muting and unmuting of the given output (turning off the
  465. * amplifier associated with the output pin)
  466. * On mute bypass the reg_cache and write 0 to the register
  467. * On unmute: restore the register content from the reg_cache
  468. * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
  469. */
  470. #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
  471. static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
  472. struct snd_kcontrol *kcontrol, int event) \
  473. { \
  474. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
  475. \
  476. switch (event) { \
  477. case SND_SOC_DAPM_POST_PMU: \
  478. twl4030->pin_name##_enabled = 1; \
  479. twl4030_write(w->codec, reg, twl4030_read(w->codec, reg)); \
  480. break; \
  481. case SND_SOC_DAPM_POST_PMD: \
  482. twl4030->pin_name##_enabled = 0; \
  483. twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg); \
  484. break; \
  485. } \
  486. return 0; \
  487. }
  488. TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
  489. TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
  490. TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
  491. TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
  492. TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
  493. static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
  494. {
  495. unsigned char hs_ctl;
  496. hs_ctl = twl4030_read(codec, reg);
  497. if (ramp) {
  498. /* HF ramp-up */
  499. hs_ctl |= TWL4030_HF_CTL_REF_EN;
  500. twl4030_write(codec, reg, hs_ctl);
  501. udelay(10);
  502. hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
  503. twl4030_write(codec, reg, hs_ctl);
  504. udelay(40);
  505. hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
  506. hs_ctl |= TWL4030_HF_CTL_HB_EN;
  507. twl4030_write(codec, reg, hs_ctl);
  508. } else {
  509. /* HF ramp-down */
  510. hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
  511. hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
  512. twl4030_write(codec, reg, hs_ctl);
  513. hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
  514. twl4030_write(codec, reg, hs_ctl);
  515. udelay(40);
  516. hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
  517. twl4030_write(codec, reg, hs_ctl);
  518. }
  519. }
  520. static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
  521. struct snd_kcontrol *kcontrol, int event)
  522. {
  523. switch (event) {
  524. case SND_SOC_DAPM_POST_PMU:
  525. handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
  526. break;
  527. case SND_SOC_DAPM_POST_PMD:
  528. handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
  529. break;
  530. }
  531. return 0;
  532. }
  533. static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
  534. struct snd_kcontrol *kcontrol, int event)
  535. {
  536. switch (event) {
  537. case SND_SOC_DAPM_POST_PMU:
  538. handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
  539. break;
  540. case SND_SOC_DAPM_POST_PMD:
  541. handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
  542. break;
  543. }
  544. return 0;
  545. }
  546. static int vibramux_event(struct snd_soc_dapm_widget *w,
  547. struct snd_kcontrol *kcontrol, int event)
  548. {
  549. twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
  550. return 0;
  551. }
  552. static int apll_event(struct snd_soc_dapm_widget *w,
  553. struct snd_kcontrol *kcontrol, int event)
  554. {
  555. switch (event) {
  556. case SND_SOC_DAPM_PRE_PMU:
  557. twl4030_apll_enable(w->codec, 1);
  558. break;
  559. case SND_SOC_DAPM_POST_PMD:
  560. twl4030_apll_enable(w->codec, 0);
  561. break;
  562. }
  563. return 0;
  564. }
  565. static int aif_event(struct snd_soc_dapm_widget *w,
  566. struct snd_kcontrol *kcontrol, int event)
  567. {
  568. u8 audio_if;
  569. audio_if = twl4030_read(w->codec, TWL4030_REG_AUDIO_IF);
  570. switch (event) {
  571. case SND_SOC_DAPM_PRE_PMU:
  572. /* Enable AIF */
  573. /* enable the PLL before we use it to clock the DAI */
  574. twl4030_apll_enable(w->codec, 1);
  575. twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
  576. audio_if | TWL4030_AIF_EN);
  577. break;
  578. case SND_SOC_DAPM_POST_PMD:
  579. /* disable the DAI before we stop it's source PLL */
  580. twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
  581. audio_if & ~TWL4030_AIF_EN);
  582. twl4030_apll_enable(w->codec, 0);
  583. break;
  584. }
  585. return 0;
  586. }
  587. static void headset_ramp(struct snd_soc_codec *codec, int ramp)
  588. {
  589. unsigned char hs_gain, hs_pop;
  590. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  591. struct twl4030_codec_data *pdata = twl4030->pdata;
  592. /* Base values for ramp delay calculation: 2^19 - 2^26 */
  593. unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
  594. 8388608, 16777216, 33554432, 67108864};
  595. unsigned int delay;
  596. hs_gain = twl4030_read(codec, TWL4030_REG_HS_GAIN_SET);
  597. hs_pop = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
  598. delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
  599. twl4030->sysclk) + 1;
  600. /* Enable external mute control, this dramatically reduces
  601. * the pop-noise */
  602. if (pdata && pdata->hs_extmute) {
  603. if (gpio_is_valid(pdata->hs_extmute_gpio)) {
  604. gpio_set_value(pdata->hs_extmute_gpio, 1);
  605. } else {
  606. hs_pop |= TWL4030_EXTMUTE;
  607. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  608. }
  609. }
  610. if (ramp) {
  611. /* Headset ramp-up according to the TRM */
  612. hs_pop |= TWL4030_VMID_EN;
  613. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  614. /* Actually write to the register */
  615. twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain,
  616. TWL4030_REG_HS_GAIN_SET);
  617. hs_pop |= TWL4030_RAMP_EN;
  618. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  619. /* Wait ramp delay time + 1, so the VMID can settle */
  620. twl4030_wait_ms(delay);
  621. } else {
  622. /* Headset ramp-down _not_ according to
  623. * the TRM, but in a way that it is working */
  624. hs_pop &= ~TWL4030_RAMP_EN;
  625. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  626. /* Wait ramp delay time + 1, so the VMID can settle */
  627. twl4030_wait_ms(delay);
  628. /* Bypass the reg_cache to mute the headset */
  629. twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f),
  630. TWL4030_REG_HS_GAIN_SET);
  631. hs_pop &= ~TWL4030_VMID_EN;
  632. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  633. }
  634. /* Disable external mute */
  635. if (pdata && pdata->hs_extmute) {
  636. if (gpio_is_valid(pdata->hs_extmute_gpio)) {
  637. gpio_set_value(pdata->hs_extmute_gpio, 0);
  638. } else {
  639. hs_pop &= ~TWL4030_EXTMUTE;
  640. twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
  641. }
  642. }
  643. }
  644. static int headsetlpga_event(struct snd_soc_dapm_widget *w,
  645. struct snd_kcontrol *kcontrol, int event)
  646. {
  647. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
  648. switch (event) {
  649. case SND_SOC_DAPM_POST_PMU:
  650. /* Do the ramp-up only once */
  651. if (!twl4030->hsr_enabled)
  652. headset_ramp(w->codec, 1);
  653. twl4030->hsl_enabled = 1;
  654. break;
  655. case SND_SOC_DAPM_POST_PMD:
  656. /* Do the ramp-down only if both headsetL/R is disabled */
  657. if (!twl4030->hsr_enabled)
  658. headset_ramp(w->codec, 0);
  659. twl4030->hsl_enabled = 0;
  660. break;
  661. }
  662. return 0;
  663. }
  664. static int headsetrpga_event(struct snd_soc_dapm_widget *w,
  665. struct snd_kcontrol *kcontrol, int event)
  666. {
  667. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
  668. switch (event) {
  669. case SND_SOC_DAPM_POST_PMU:
  670. /* Do the ramp-up only once */
  671. if (!twl4030->hsl_enabled)
  672. headset_ramp(w->codec, 1);
  673. twl4030->hsr_enabled = 1;
  674. break;
  675. case SND_SOC_DAPM_POST_PMD:
  676. /* Do the ramp-down only if both headsetL/R is disabled */
  677. if (!twl4030->hsl_enabled)
  678. headset_ramp(w->codec, 0);
  679. twl4030->hsr_enabled = 0;
  680. break;
  681. }
  682. return 0;
  683. }
  684. static int digimic_event(struct snd_soc_dapm_widget *w,
  685. struct snd_kcontrol *kcontrol, int event)
  686. {
  687. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
  688. struct twl4030_codec_data *pdata = twl4030->pdata;
  689. if (pdata && pdata->digimic_delay)
  690. twl4030_wait_ms(pdata->digimic_delay);
  691. return 0;
  692. }
  693. /*
  694. * Some of the gain controls in TWL (mostly those which are associated with
  695. * the outputs) are implemented in an interesting way:
  696. * 0x0 : Power down (mute)
  697. * 0x1 : 6dB
  698. * 0x2 : 0 dB
  699. * 0x3 : -6 dB
  700. * Inverting not going to help with these.
  701. * Custom volsw and volsw_2r get/put functions to handle these gain bits.
  702. */
  703. static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
  704. struct snd_ctl_elem_value *ucontrol)
  705. {
  706. struct soc_mixer_control *mc =
  707. (struct soc_mixer_control *)kcontrol->private_value;
  708. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  709. unsigned int reg = mc->reg;
  710. unsigned int shift = mc->shift;
  711. unsigned int rshift = mc->rshift;
  712. int max = mc->max;
  713. int mask = (1 << fls(max)) - 1;
  714. ucontrol->value.integer.value[0] =
  715. (snd_soc_read(codec, reg) >> shift) & mask;
  716. if (ucontrol->value.integer.value[0])
  717. ucontrol->value.integer.value[0] =
  718. max + 1 - ucontrol->value.integer.value[0];
  719. if (shift != rshift) {
  720. ucontrol->value.integer.value[1] =
  721. (snd_soc_read(codec, reg) >> rshift) & mask;
  722. if (ucontrol->value.integer.value[1])
  723. ucontrol->value.integer.value[1] =
  724. max + 1 - ucontrol->value.integer.value[1];
  725. }
  726. return 0;
  727. }
  728. static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
  729. struct snd_ctl_elem_value *ucontrol)
  730. {
  731. struct soc_mixer_control *mc =
  732. (struct soc_mixer_control *)kcontrol->private_value;
  733. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  734. unsigned int reg = mc->reg;
  735. unsigned int shift = mc->shift;
  736. unsigned int rshift = mc->rshift;
  737. int max = mc->max;
  738. int mask = (1 << fls(max)) - 1;
  739. unsigned short val, val2, val_mask;
  740. val = (ucontrol->value.integer.value[0] & mask);
  741. val_mask = mask << shift;
  742. if (val)
  743. val = max + 1 - val;
  744. val = val << shift;
  745. if (shift != rshift) {
  746. val2 = (ucontrol->value.integer.value[1] & mask);
  747. val_mask |= mask << rshift;
  748. if (val2)
  749. val2 = max + 1 - val2;
  750. val |= val2 << rshift;
  751. }
  752. return snd_soc_update_bits(codec, reg, val_mask, val);
  753. }
  754. static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
  755. struct snd_ctl_elem_value *ucontrol)
  756. {
  757. struct soc_mixer_control *mc =
  758. (struct soc_mixer_control *)kcontrol->private_value;
  759. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  760. unsigned int reg = mc->reg;
  761. unsigned int reg2 = mc->rreg;
  762. unsigned int shift = mc->shift;
  763. int max = mc->max;
  764. int mask = (1<<fls(max))-1;
  765. ucontrol->value.integer.value[0] =
  766. (snd_soc_read(codec, reg) >> shift) & mask;
  767. ucontrol->value.integer.value[1] =
  768. (snd_soc_read(codec, reg2) >> shift) & mask;
  769. if (ucontrol->value.integer.value[0])
  770. ucontrol->value.integer.value[0] =
  771. max + 1 - ucontrol->value.integer.value[0];
  772. if (ucontrol->value.integer.value[1])
  773. ucontrol->value.integer.value[1] =
  774. max + 1 - ucontrol->value.integer.value[1];
  775. return 0;
  776. }
  777. static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
  778. struct snd_ctl_elem_value *ucontrol)
  779. {
  780. struct soc_mixer_control *mc =
  781. (struct soc_mixer_control *)kcontrol->private_value;
  782. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  783. unsigned int reg = mc->reg;
  784. unsigned int reg2 = mc->rreg;
  785. unsigned int shift = mc->shift;
  786. int max = mc->max;
  787. int mask = (1 << fls(max)) - 1;
  788. int err;
  789. unsigned short val, val2, val_mask;
  790. val_mask = mask << shift;
  791. val = (ucontrol->value.integer.value[0] & mask);
  792. val2 = (ucontrol->value.integer.value[1] & mask);
  793. if (val)
  794. val = max + 1 - val;
  795. if (val2)
  796. val2 = max + 1 - val2;
  797. val = val << shift;
  798. val2 = val2 << shift;
  799. err = snd_soc_update_bits(codec, reg, val_mask, val);
  800. if (err < 0)
  801. return err;
  802. err = snd_soc_update_bits(codec, reg2, val_mask, val2);
  803. return err;
  804. }
  805. /* Codec operation modes */
  806. static const char *twl4030_op_modes_texts[] = {
  807. "Option 2 (voice/audio)", "Option 1 (audio)"
  808. };
  809. static SOC_ENUM_SINGLE_DECL(twl4030_op_modes_enum,
  810. TWL4030_REG_CODEC_MODE, 0,
  811. twl4030_op_modes_texts);
  812. static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
  813. struct snd_ctl_elem_value *ucontrol)
  814. {
  815. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  816. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  817. if (twl4030->configured) {
  818. dev_err(codec->dev,
  819. "operation mode cannot be changed on-the-fly\n");
  820. return -EBUSY;
  821. }
  822. return snd_soc_put_enum_double(kcontrol, ucontrol);
  823. }
  824. /*
  825. * FGAIN volume control:
  826. * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
  827. */
  828. static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
  829. /*
  830. * CGAIN volume control:
  831. * 0 dB to 12 dB in 6 dB steps
  832. * value 2 and 3 means 12 dB
  833. */
  834. static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
  835. /*
  836. * Voice Downlink GAIN volume control:
  837. * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
  838. */
  839. static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
  840. /*
  841. * Analog playback gain
  842. * -24 dB to 12 dB in 2 dB steps
  843. */
  844. static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
  845. /*
  846. * Gain controls tied to outputs
  847. * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
  848. */
  849. static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
  850. /*
  851. * Gain control for earpiece amplifier
  852. * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
  853. */
  854. static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
  855. /*
  856. * Capture gain after the ADCs
  857. * from 0 dB to 31 dB in 1 dB steps
  858. */
  859. static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
  860. /*
  861. * Gain control for input amplifiers
  862. * 0 dB to 30 dB in 6 dB steps
  863. */
  864. static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
  865. /* AVADC clock priority */
  866. static const char *twl4030_avadc_clk_priority_texts[] = {
  867. "Voice high priority", "HiFi high priority"
  868. };
  869. static SOC_ENUM_SINGLE_DECL(twl4030_avadc_clk_priority_enum,
  870. TWL4030_REG_AVADC_CTL, 2,
  871. twl4030_avadc_clk_priority_texts);
  872. static const char *twl4030_rampdelay_texts[] = {
  873. "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
  874. "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
  875. "3495/2581/1748 ms"
  876. };
  877. static SOC_ENUM_SINGLE_DECL(twl4030_rampdelay_enum,
  878. TWL4030_REG_HS_POPN_SET, 2,
  879. twl4030_rampdelay_texts);
  880. /* Vibra H-bridge direction mode */
  881. static const char *twl4030_vibradirmode_texts[] = {
  882. "Vibra H-bridge direction", "Audio data MSB",
  883. };
  884. static SOC_ENUM_SINGLE_DECL(twl4030_vibradirmode_enum,
  885. TWL4030_REG_VIBRA_CTL, 5,
  886. twl4030_vibradirmode_texts);
  887. /* Vibra H-bridge direction */
  888. static const char *twl4030_vibradir_texts[] = {
  889. "Positive polarity", "Negative polarity",
  890. };
  891. static SOC_ENUM_SINGLE_DECL(twl4030_vibradir_enum,
  892. TWL4030_REG_VIBRA_CTL, 1,
  893. twl4030_vibradir_texts);
  894. /* Digimic Left and right swapping */
  895. static const char *twl4030_digimicswap_texts[] = {
  896. "Not swapped", "Swapped",
  897. };
  898. static SOC_ENUM_SINGLE_DECL(twl4030_digimicswap_enum,
  899. TWL4030_REG_MISC_SET_1, 0,
  900. twl4030_digimicswap_texts);
  901. static const struct snd_kcontrol_new twl4030_snd_controls[] = {
  902. /* Codec operation mode control */
  903. SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
  904. snd_soc_get_enum_double,
  905. snd_soc_put_twl4030_opmode_enum_double),
  906. /* Common playback gain controls */
  907. SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
  908. TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
  909. 0, 0x3f, 0, digital_fine_tlv),
  910. SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
  911. TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
  912. 0, 0x3f, 0, digital_fine_tlv),
  913. SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
  914. TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
  915. 6, 0x2, 0, digital_coarse_tlv),
  916. SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
  917. TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
  918. 6, 0x2, 0, digital_coarse_tlv),
  919. SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
  920. TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
  921. 3, 0x12, 1, analog_tlv),
  922. SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
  923. TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
  924. 3, 0x12, 1, analog_tlv),
  925. SOC_DOUBLE_R("DAC1 Analog Playback Switch",
  926. TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
  927. 1, 1, 0),
  928. SOC_DOUBLE_R("DAC2 Analog Playback Switch",
  929. TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
  930. 1, 1, 0),
  931. /* Common voice downlink gain controls */
  932. SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
  933. TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
  934. SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
  935. TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
  936. SOC_SINGLE("DAC Voice Analog Downlink Switch",
  937. TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
  938. /* Separate output gain controls */
  939. SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
  940. TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
  941. 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
  942. snd_soc_put_volsw_r2_twl4030, output_tvl),
  943. SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
  944. TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
  945. snd_soc_put_volsw_twl4030, output_tvl),
  946. SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
  947. TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
  948. 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
  949. snd_soc_put_volsw_r2_twl4030, output_tvl),
  950. SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
  951. TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
  952. snd_soc_put_volsw_twl4030, output_ear_tvl),
  953. /* Common capture gain controls */
  954. SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
  955. TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
  956. 0, 0x1f, 0, digital_capture_tlv),
  957. SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
  958. TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
  959. 0, 0x1f, 0, digital_capture_tlv),
  960. SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
  961. 0, 3, 5, 0, input_gain_tlv),
  962. SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
  963. SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
  964. SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
  965. SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
  966. SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
  967. };
  968. static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
  969. /* Left channel inputs */
  970. SND_SOC_DAPM_INPUT("MAINMIC"),
  971. SND_SOC_DAPM_INPUT("HSMIC"),
  972. SND_SOC_DAPM_INPUT("AUXL"),
  973. SND_SOC_DAPM_INPUT("CARKITMIC"),
  974. /* Right channel inputs */
  975. SND_SOC_DAPM_INPUT("SUBMIC"),
  976. SND_SOC_DAPM_INPUT("AUXR"),
  977. /* Digital microphones (Stereo) */
  978. SND_SOC_DAPM_INPUT("DIGIMIC0"),
  979. SND_SOC_DAPM_INPUT("DIGIMIC1"),
  980. /* Outputs */
  981. SND_SOC_DAPM_OUTPUT("EARPIECE"),
  982. SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
  983. SND_SOC_DAPM_OUTPUT("PREDRIVER"),
  984. SND_SOC_DAPM_OUTPUT("HSOL"),
  985. SND_SOC_DAPM_OUTPUT("HSOR"),
  986. SND_SOC_DAPM_OUTPUT("CARKITL"),
  987. SND_SOC_DAPM_OUTPUT("CARKITR"),
  988. SND_SOC_DAPM_OUTPUT("HFL"),
  989. SND_SOC_DAPM_OUTPUT("HFR"),
  990. SND_SOC_DAPM_OUTPUT("VIBRA"),
  991. /* AIF and APLL clocks for running DAIs (including loopback) */
  992. SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
  993. SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
  994. SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
  995. /* DACs */
  996. SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0),
  997. SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0),
  998. SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0),
  999. SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0),
  1000. SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0),
  1001. SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0,
  1002. TWL4030_REG_VOICE_IF, 6, 0),
  1003. /* Analog bypasses */
  1004. SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1005. &twl4030_dapm_abypassr1_control),
  1006. SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1007. &twl4030_dapm_abypassl1_control),
  1008. SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1009. &twl4030_dapm_abypassr2_control),
  1010. SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
  1011. &twl4030_dapm_abypassl2_control),
  1012. SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
  1013. &twl4030_dapm_abypassv_control),
  1014. /* Master analog loopback switch */
  1015. SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
  1016. NULL, 0),
  1017. /* Digital bypasses */
  1018. SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
  1019. &twl4030_dapm_dbypassl_control),
  1020. SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
  1021. &twl4030_dapm_dbypassr_control),
  1022. SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
  1023. &twl4030_dapm_dbypassv_control),
  1024. /* Digital mixers, power control for the physical DACs */
  1025. SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
  1026. TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
  1027. SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
  1028. TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
  1029. SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
  1030. TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
  1031. SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
  1032. TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
  1033. SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
  1034. TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
  1035. /* Analog mixers, power control for the physical PGAs */
  1036. SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
  1037. TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
  1038. SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
  1039. TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
  1040. SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
  1041. TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
  1042. SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
  1043. TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
  1044. SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
  1045. TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
  1046. SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
  1047. SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
  1048. SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
  1049. SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
  1050. /* Output MIXER controls */
  1051. /* Earpiece */
  1052. SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
  1053. &twl4030_dapm_earpiece_controls[0],
  1054. ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
  1055. SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
  1056. 0, 0, NULL, 0, earpiecepga_event,
  1057. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1058. /* PreDrivL/R */
  1059. SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
  1060. &twl4030_dapm_predrivel_controls[0],
  1061. ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
  1062. SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
  1063. 0, 0, NULL, 0, predrivelpga_event,
  1064. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1065. SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
  1066. &twl4030_dapm_predriver_controls[0],
  1067. ARRAY_SIZE(twl4030_dapm_predriver_controls)),
  1068. SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
  1069. 0, 0, NULL, 0, predriverpga_event,
  1070. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1071. /* HeadsetL/R */
  1072. SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
  1073. &twl4030_dapm_hsol_controls[0],
  1074. ARRAY_SIZE(twl4030_dapm_hsol_controls)),
  1075. SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
  1076. 0, 0, NULL, 0, headsetlpga_event,
  1077. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1078. SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
  1079. &twl4030_dapm_hsor_controls[0],
  1080. ARRAY_SIZE(twl4030_dapm_hsor_controls)),
  1081. SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
  1082. 0, 0, NULL, 0, headsetrpga_event,
  1083. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1084. /* CarkitL/R */
  1085. SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
  1086. &twl4030_dapm_carkitl_controls[0],
  1087. ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
  1088. SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
  1089. 0, 0, NULL, 0, carkitlpga_event,
  1090. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1091. SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
  1092. &twl4030_dapm_carkitr_controls[0],
  1093. ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
  1094. SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
  1095. 0, 0, NULL, 0, carkitrpga_event,
  1096. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1097. /* Output MUX controls */
  1098. /* HandsfreeL/R */
  1099. SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
  1100. &twl4030_dapm_handsfreel_control),
  1101. SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
  1102. &twl4030_dapm_handsfreelmute_control),
  1103. SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
  1104. 0, 0, NULL, 0, handsfreelpga_event,
  1105. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1106. SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
  1107. &twl4030_dapm_handsfreer_control),
  1108. SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
  1109. &twl4030_dapm_handsfreermute_control),
  1110. SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
  1111. 0, 0, NULL, 0, handsfreerpga_event,
  1112. SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
  1113. /* Vibra */
  1114. SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
  1115. &twl4030_dapm_vibra_control, vibramux_event,
  1116. SND_SOC_DAPM_PRE_PMU),
  1117. SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
  1118. &twl4030_dapm_vibrapath_control),
  1119. /* Introducing four virtual ADC, since TWL4030 have four channel for
  1120. capture */
  1121. SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0),
  1122. SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0),
  1123. SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0),
  1124. SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0),
  1125. SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0,
  1126. TWL4030_REG_VOICE_IF, 5, 0),
  1127. /* Analog/Digital mic path selection.
  1128. TX1 Left/Right: either analog Left/Right or Digimic0
  1129. TX2 Left/Right: either analog Left/Right or Digimic1 */
  1130. SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
  1131. &twl4030_dapm_micpathtx1_control),
  1132. SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
  1133. &twl4030_dapm_micpathtx2_control),
  1134. /* Analog input mixers for the capture amplifiers */
  1135. SND_SOC_DAPM_MIXER("Analog Left",
  1136. TWL4030_REG_ANAMICL, 4, 0,
  1137. &twl4030_dapm_analoglmic_controls[0],
  1138. ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
  1139. SND_SOC_DAPM_MIXER("Analog Right",
  1140. TWL4030_REG_ANAMICR, 4, 0,
  1141. &twl4030_dapm_analogrmic_controls[0],
  1142. ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
  1143. SND_SOC_DAPM_PGA("ADC Physical Left",
  1144. TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
  1145. SND_SOC_DAPM_PGA("ADC Physical Right",
  1146. TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
  1147. SND_SOC_DAPM_PGA_E("Digimic0 Enable",
  1148. TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
  1149. digimic_event, SND_SOC_DAPM_POST_PMU),
  1150. SND_SOC_DAPM_PGA_E("Digimic1 Enable",
  1151. TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
  1152. digimic_event, SND_SOC_DAPM_POST_PMU),
  1153. SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
  1154. NULL, 0),
  1155. SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
  1156. NULL, 0),
  1157. /* Microphone bias */
  1158. SND_SOC_DAPM_SUPPLY("Mic Bias 1",
  1159. TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0),
  1160. SND_SOC_DAPM_SUPPLY("Mic Bias 2",
  1161. TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0),
  1162. SND_SOC_DAPM_SUPPLY("Headset Mic Bias",
  1163. TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0),
  1164. SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0),
  1165. };
  1166. static const struct snd_soc_dapm_route intercon[] = {
  1167. /* Stream -> DAC mapping */
  1168. {"DAC Right1", NULL, "HiFi Playback"},
  1169. {"DAC Left1", NULL, "HiFi Playback"},
  1170. {"DAC Right2", NULL, "HiFi Playback"},
  1171. {"DAC Left2", NULL, "HiFi Playback"},
  1172. {"DAC Voice", NULL, "VAIFIN"},
  1173. /* ADC -> Stream mapping */
  1174. {"HiFi Capture", NULL, "ADC Virtual Left1"},
  1175. {"HiFi Capture", NULL, "ADC Virtual Right1"},
  1176. {"HiFi Capture", NULL, "ADC Virtual Left2"},
  1177. {"HiFi Capture", NULL, "ADC Virtual Right2"},
  1178. {"VAIFOUT", NULL, "ADC Virtual Left2"},
  1179. {"VAIFOUT", NULL, "ADC Virtual Right2"},
  1180. {"VAIFOUT", NULL, "VIF Enable"},
  1181. {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
  1182. {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
  1183. {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
  1184. {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
  1185. {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
  1186. /* Supply for the digital part (APLL) */
  1187. {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
  1188. {"DAC Left1", NULL, "AIF Enable"},
  1189. {"DAC Right1", NULL, "AIF Enable"},
  1190. {"DAC Left2", NULL, "AIF Enable"},
  1191. {"DAC Right1", NULL, "AIF Enable"},
  1192. {"DAC Voice", NULL, "VIF Enable"},
  1193. {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
  1194. {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
  1195. {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
  1196. {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
  1197. {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
  1198. {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
  1199. {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
  1200. /* Internal playback routings */
  1201. /* Earpiece */
  1202. {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
  1203. {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1204. {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1205. {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1206. {"Earpiece PGA", NULL, "Earpiece Mixer"},
  1207. /* PreDrivL */
  1208. {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1209. {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1210. {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1211. {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1212. {"PredriveL PGA", NULL, "PredriveL Mixer"},
  1213. /* PreDrivR */
  1214. {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1215. {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1216. {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1217. {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1218. {"PredriveR PGA", NULL, "PredriveR Mixer"},
  1219. /* HeadsetL */
  1220. {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1221. {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1222. {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1223. {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
  1224. /* HeadsetR */
  1225. {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1226. {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1227. {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1228. {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
  1229. /* CarkitL */
  1230. {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
  1231. {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
  1232. {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
  1233. {"CarkitL PGA", NULL, "CarkitL Mixer"},
  1234. /* CarkitR */
  1235. {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
  1236. {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
  1237. {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
  1238. {"CarkitR PGA", NULL, "CarkitR Mixer"},
  1239. /* HandsfreeL */
  1240. {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
  1241. {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
  1242. {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
  1243. {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
  1244. {"HandsfreeL", "Switch", "HandsfreeL Mux"},
  1245. {"HandsfreeL PGA", NULL, "HandsfreeL"},
  1246. /* HandsfreeR */
  1247. {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
  1248. {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
  1249. {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
  1250. {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
  1251. {"HandsfreeR", "Switch", "HandsfreeR Mux"},
  1252. {"HandsfreeR PGA", NULL, "HandsfreeR"},
  1253. /* Vibra */
  1254. {"Vibra Mux", "AudioL1", "DAC Left1"},
  1255. {"Vibra Mux", "AudioR1", "DAC Right1"},
  1256. {"Vibra Mux", "AudioL2", "DAC Left2"},
  1257. {"Vibra Mux", "AudioR2", "DAC Right2"},
  1258. /* outputs */
  1259. /* Must be always connected (for AIF and APLL) */
  1260. {"Virtual HiFi OUT", NULL, "DAC Left1"},
  1261. {"Virtual HiFi OUT", NULL, "DAC Right1"},
  1262. {"Virtual HiFi OUT", NULL, "DAC Left2"},
  1263. {"Virtual HiFi OUT", NULL, "DAC Right2"},
  1264. /* Must be always connected (for APLL) */
  1265. {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
  1266. /* Physical outputs */
  1267. {"EARPIECE", NULL, "Earpiece PGA"},
  1268. {"PREDRIVEL", NULL, "PredriveL PGA"},
  1269. {"PREDRIVER", NULL, "PredriveR PGA"},
  1270. {"HSOL", NULL, "HeadsetL PGA"},
  1271. {"HSOR", NULL, "HeadsetR PGA"},
  1272. {"CARKITL", NULL, "CarkitL PGA"},
  1273. {"CARKITR", NULL, "CarkitR PGA"},
  1274. {"HFL", NULL, "HandsfreeL PGA"},
  1275. {"HFR", NULL, "HandsfreeR PGA"},
  1276. {"Vibra Route", "Audio", "Vibra Mux"},
  1277. {"VIBRA", NULL, "Vibra Route"},
  1278. /* Capture path */
  1279. /* Must be always connected (for AIF and APLL) */
  1280. {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
  1281. {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
  1282. {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
  1283. {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
  1284. /* Physical inputs */
  1285. {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
  1286. {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
  1287. {"Analog Left", "AUXL Capture Switch", "AUXL"},
  1288. {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
  1289. {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
  1290. {"Analog Right", "AUXR Capture Switch", "AUXR"},
  1291. {"ADC Physical Left", NULL, "Analog Left"},
  1292. {"ADC Physical Right", NULL, "Analog Right"},
  1293. {"Digimic0 Enable", NULL, "DIGIMIC0"},
  1294. {"Digimic1 Enable", NULL, "DIGIMIC1"},
  1295. {"DIGIMIC0", NULL, "micbias1 select"},
  1296. {"DIGIMIC1", NULL, "micbias2 select"},
  1297. /* TX1 Left capture path */
  1298. {"TX1 Capture Route", "Analog", "ADC Physical Left"},
  1299. {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
  1300. /* TX1 Right capture path */
  1301. {"TX1 Capture Route", "Analog", "ADC Physical Right"},
  1302. {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
  1303. /* TX2 Left capture path */
  1304. {"TX2 Capture Route", "Analog", "ADC Physical Left"},
  1305. {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
  1306. /* TX2 Right capture path */
  1307. {"TX2 Capture Route", "Analog", "ADC Physical Right"},
  1308. {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
  1309. {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
  1310. {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
  1311. {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
  1312. {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
  1313. {"ADC Virtual Left1", NULL, "AIF Enable"},
  1314. {"ADC Virtual Right1", NULL, "AIF Enable"},
  1315. {"ADC Virtual Left2", NULL, "AIF Enable"},
  1316. {"ADC Virtual Right2", NULL, "AIF Enable"},
  1317. /* Analog bypass routes */
  1318. {"Right1 Analog Loopback", "Switch", "Analog Right"},
  1319. {"Left1 Analog Loopback", "Switch", "Analog Left"},
  1320. {"Right2 Analog Loopback", "Switch", "Analog Right"},
  1321. {"Left2 Analog Loopback", "Switch", "Analog Left"},
  1322. {"Voice Analog Loopback", "Switch", "Analog Left"},
  1323. /* Supply for the Analog loopbacks */
  1324. {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
  1325. {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
  1326. {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
  1327. {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
  1328. {"Voice Analog Loopback", NULL, "FM Loop Enable"},
  1329. {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
  1330. {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
  1331. {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
  1332. {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
  1333. {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
  1334. /* Digital bypass routes */
  1335. {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
  1336. {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
  1337. {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
  1338. {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
  1339. {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
  1340. {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
  1341. };
  1342. static int twl4030_set_bias_level(struct snd_soc_codec *codec,
  1343. enum snd_soc_bias_level level)
  1344. {
  1345. switch (level) {
  1346. case SND_SOC_BIAS_ON:
  1347. break;
  1348. case SND_SOC_BIAS_PREPARE:
  1349. break;
  1350. case SND_SOC_BIAS_STANDBY:
  1351. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
  1352. twl4030_codec_enable(codec, 1);
  1353. break;
  1354. case SND_SOC_BIAS_OFF:
  1355. twl4030_codec_enable(codec, 0);
  1356. break;
  1357. }
  1358. codec->dapm.bias_level = level;
  1359. return 0;
  1360. }
  1361. static void twl4030_constraints(struct twl4030_priv *twl4030,
  1362. struct snd_pcm_substream *mst_substream)
  1363. {
  1364. struct snd_pcm_substream *slv_substream;
  1365. /* Pick the stream, which need to be constrained */
  1366. if (mst_substream == twl4030->master_substream)
  1367. slv_substream = twl4030->slave_substream;
  1368. else if (mst_substream == twl4030->slave_substream)
  1369. slv_substream = twl4030->master_substream;
  1370. else /* This should not happen.. */
  1371. return;
  1372. /* Set the constraints according to the already configured stream */
  1373. snd_pcm_hw_constraint_minmax(slv_substream->runtime,
  1374. SNDRV_PCM_HW_PARAM_RATE,
  1375. twl4030->rate,
  1376. twl4030->rate);
  1377. snd_pcm_hw_constraint_minmax(slv_substream->runtime,
  1378. SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
  1379. twl4030->sample_bits,
  1380. twl4030->sample_bits);
  1381. snd_pcm_hw_constraint_minmax(slv_substream->runtime,
  1382. SNDRV_PCM_HW_PARAM_CHANNELS,
  1383. twl4030->channels,
  1384. twl4030->channels);
  1385. }
  1386. /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
  1387. * capture has to be enabled/disabled. */
  1388. static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
  1389. int enable)
  1390. {
  1391. u8 reg, mask;
  1392. reg = twl4030_read(codec, TWL4030_REG_OPTION);
  1393. if (direction == SNDRV_PCM_STREAM_PLAYBACK)
  1394. mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
  1395. else
  1396. mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
  1397. if (enable)
  1398. reg |= mask;
  1399. else
  1400. reg &= ~mask;
  1401. twl4030_write(codec, TWL4030_REG_OPTION, reg);
  1402. }
  1403. static int twl4030_startup(struct snd_pcm_substream *substream,
  1404. struct snd_soc_dai *dai)
  1405. {
  1406. struct snd_soc_codec *codec = dai->codec;
  1407. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1408. if (twl4030->master_substream) {
  1409. twl4030->slave_substream = substream;
  1410. /* The DAI has one configuration for playback and capture, so
  1411. * if the DAI has been already configured then constrain this
  1412. * substream to match it. */
  1413. if (twl4030->configured)
  1414. twl4030_constraints(twl4030, twl4030->master_substream);
  1415. } else {
  1416. if (!(twl4030_read(codec, TWL4030_REG_CODEC_MODE) &
  1417. TWL4030_OPTION_1)) {
  1418. /* In option2 4 channel is not supported, set the
  1419. * constraint for the first stream for channels, the
  1420. * second stream will 'inherit' this cosntraint */
  1421. snd_pcm_hw_constraint_minmax(substream->runtime,
  1422. SNDRV_PCM_HW_PARAM_CHANNELS,
  1423. 2, 2);
  1424. }
  1425. twl4030->master_substream = substream;
  1426. }
  1427. return 0;
  1428. }
  1429. static void twl4030_shutdown(struct snd_pcm_substream *substream,
  1430. struct snd_soc_dai *dai)
  1431. {
  1432. struct snd_soc_codec *codec = dai->codec;
  1433. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1434. if (twl4030->master_substream == substream)
  1435. twl4030->master_substream = twl4030->slave_substream;
  1436. twl4030->slave_substream = NULL;
  1437. /* If all streams are closed, or the remaining stream has not yet
  1438. * been configured than set the DAI as not configured. */
  1439. if (!twl4030->master_substream)
  1440. twl4030->configured = 0;
  1441. else if (!twl4030->master_substream->runtime->channels)
  1442. twl4030->configured = 0;
  1443. /* If the closing substream had 4 channel, do the necessary cleanup */
  1444. if (substream->runtime->channels == 4)
  1445. twl4030_tdm_enable(codec, substream->stream, 0);
  1446. }
  1447. static int twl4030_hw_params(struct snd_pcm_substream *substream,
  1448. struct snd_pcm_hw_params *params,
  1449. struct snd_soc_dai *dai)
  1450. {
  1451. struct snd_soc_codec *codec = dai->codec;
  1452. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1453. u8 mode, old_mode, format, old_format;
  1454. /* If the substream has 4 channel, do the necessary setup */
  1455. if (params_channels(params) == 4) {
  1456. format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
  1457. mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE);
  1458. /* Safety check: are we in the correct operating mode and
  1459. * the interface is in TDM mode? */
  1460. if ((mode & TWL4030_OPTION_1) &&
  1461. ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
  1462. twl4030_tdm_enable(codec, substream->stream, 1);
  1463. else
  1464. return -EINVAL;
  1465. }
  1466. if (twl4030->configured)
  1467. /* Ignoring hw_params for already configured DAI */
  1468. return 0;
  1469. /* bit rate */
  1470. old_mode = twl4030_read(codec,
  1471. TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
  1472. mode = old_mode & ~TWL4030_APLL_RATE;
  1473. switch (params_rate(params)) {
  1474. case 8000:
  1475. mode |= TWL4030_APLL_RATE_8000;
  1476. break;
  1477. case 11025:
  1478. mode |= TWL4030_APLL_RATE_11025;
  1479. break;
  1480. case 12000:
  1481. mode |= TWL4030_APLL_RATE_12000;
  1482. break;
  1483. case 16000:
  1484. mode |= TWL4030_APLL_RATE_16000;
  1485. break;
  1486. case 22050:
  1487. mode |= TWL4030_APLL_RATE_22050;
  1488. break;
  1489. case 24000:
  1490. mode |= TWL4030_APLL_RATE_24000;
  1491. break;
  1492. case 32000:
  1493. mode |= TWL4030_APLL_RATE_32000;
  1494. break;
  1495. case 44100:
  1496. mode |= TWL4030_APLL_RATE_44100;
  1497. break;
  1498. case 48000:
  1499. mode |= TWL4030_APLL_RATE_48000;
  1500. break;
  1501. case 96000:
  1502. mode |= TWL4030_APLL_RATE_96000;
  1503. break;
  1504. default:
  1505. dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
  1506. params_rate(params));
  1507. return -EINVAL;
  1508. }
  1509. /* sample size */
  1510. old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
  1511. format = old_format;
  1512. format &= ~TWL4030_DATA_WIDTH;
  1513. switch (params_width(params)) {
  1514. case 16:
  1515. format |= TWL4030_DATA_WIDTH_16S_16W;
  1516. break;
  1517. case 32:
  1518. format |= TWL4030_DATA_WIDTH_32S_24W;
  1519. break;
  1520. default:
  1521. dev_err(codec->dev, "%s: unsupported bits/sample %d\n",
  1522. __func__, params_width(params));
  1523. return -EINVAL;
  1524. }
  1525. if (format != old_format || mode != old_mode) {
  1526. if (twl4030->codec_powered) {
  1527. /*
  1528. * If the codec is powered, than we need to toggle the
  1529. * codec power.
  1530. */
  1531. twl4030_codec_enable(codec, 0);
  1532. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  1533. twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
  1534. twl4030_codec_enable(codec, 1);
  1535. } else {
  1536. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  1537. twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
  1538. }
  1539. }
  1540. /* Store the important parameters for the DAI configuration and set
  1541. * the DAI as configured */
  1542. twl4030->configured = 1;
  1543. twl4030->rate = params_rate(params);
  1544. twl4030->sample_bits = hw_param_interval(params,
  1545. SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
  1546. twl4030->channels = params_channels(params);
  1547. /* If both playback and capture streams are open, and one of them
  1548. * is setting the hw parameters right now (since we are here), set
  1549. * constraints to the other stream to match the current one. */
  1550. if (twl4030->slave_substream)
  1551. twl4030_constraints(twl4030, substream);
  1552. return 0;
  1553. }
  1554. static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
  1555. unsigned int freq, int dir)
  1556. {
  1557. struct snd_soc_codec *codec = codec_dai->codec;
  1558. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1559. switch (freq) {
  1560. case 19200000:
  1561. case 26000000:
  1562. case 38400000:
  1563. break;
  1564. default:
  1565. dev_err(codec->dev, "Unsupported HFCLKIN: %u\n", freq);
  1566. return -EINVAL;
  1567. }
  1568. if ((freq / 1000) != twl4030->sysclk) {
  1569. dev_err(codec->dev,
  1570. "Mismatch in HFCLKIN: %u (configured: %u)\n",
  1571. freq, twl4030->sysclk * 1000);
  1572. return -EINVAL;
  1573. }
  1574. return 0;
  1575. }
  1576. static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
  1577. {
  1578. struct snd_soc_codec *codec = codec_dai->codec;
  1579. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1580. u8 old_format, format;
  1581. /* get format */
  1582. old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
  1583. format = old_format;
  1584. /* set master/slave audio interface */
  1585. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1586. case SND_SOC_DAIFMT_CBM_CFM:
  1587. format &= ~(TWL4030_AIF_SLAVE_EN);
  1588. format &= ~(TWL4030_CLK256FS_EN);
  1589. break;
  1590. case SND_SOC_DAIFMT_CBS_CFS:
  1591. format |= TWL4030_AIF_SLAVE_EN;
  1592. format |= TWL4030_CLK256FS_EN;
  1593. break;
  1594. default:
  1595. return -EINVAL;
  1596. }
  1597. /* interface format */
  1598. format &= ~TWL4030_AIF_FORMAT;
  1599. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  1600. case SND_SOC_DAIFMT_I2S:
  1601. format |= TWL4030_AIF_FORMAT_CODEC;
  1602. break;
  1603. case SND_SOC_DAIFMT_DSP_A:
  1604. format |= TWL4030_AIF_FORMAT_TDM;
  1605. break;
  1606. default:
  1607. return -EINVAL;
  1608. }
  1609. if (format != old_format) {
  1610. if (twl4030->codec_powered) {
  1611. /*
  1612. * If the codec is powered, than we need to toggle the
  1613. * codec power.
  1614. */
  1615. twl4030_codec_enable(codec, 0);
  1616. twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
  1617. twl4030_codec_enable(codec, 1);
  1618. } else {
  1619. twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
  1620. }
  1621. }
  1622. return 0;
  1623. }
  1624. static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
  1625. {
  1626. struct snd_soc_codec *codec = dai->codec;
  1627. u8 reg = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
  1628. if (tristate)
  1629. reg |= TWL4030_AIF_TRI_EN;
  1630. else
  1631. reg &= ~TWL4030_AIF_TRI_EN;
  1632. return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
  1633. }
  1634. /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
  1635. * (VTXL, VTXR) for uplink has to be enabled/disabled. */
  1636. static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
  1637. int enable)
  1638. {
  1639. u8 reg, mask;
  1640. reg = twl4030_read(codec, TWL4030_REG_OPTION);
  1641. if (direction == SNDRV_PCM_STREAM_PLAYBACK)
  1642. mask = TWL4030_ARXL1_VRX_EN;
  1643. else
  1644. mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
  1645. if (enable)
  1646. reg |= mask;
  1647. else
  1648. reg &= ~mask;
  1649. twl4030_write(codec, TWL4030_REG_OPTION, reg);
  1650. }
  1651. static int twl4030_voice_startup(struct snd_pcm_substream *substream,
  1652. struct snd_soc_dai *dai)
  1653. {
  1654. struct snd_soc_codec *codec = dai->codec;
  1655. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1656. u8 mode;
  1657. /* If the system master clock is not 26MHz, the voice PCM interface is
  1658. * not available.
  1659. */
  1660. if (twl4030->sysclk != 26000) {
  1661. dev_err(codec->dev,
  1662. "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
  1663. __func__, twl4030->sysclk);
  1664. return -EINVAL;
  1665. }
  1666. /* If the codec mode is not option2, the voice PCM interface is not
  1667. * available.
  1668. */
  1669. mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE)
  1670. & TWL4030_OPT_MODE;
  1671. if (mode != TWL4030_OPTION_2) {
  1672. dev_err(codec->dev, "%s: the codec mode is not option2\n",
  1673. __func__);
  1674. return -EINVAL;
  1675. }
  1676. return 0;
  1677. }
  1678. static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
  1679. struct snd_soc_dai *dai)
  1680. {
  1681. struct snd_soc_codec *codec = dai->codec;
  1682. /* Enable voice digital filters */
  1683. twl4030_voice_enable(codec, substream->stream, 0);
  1684. }
  1685. static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
  1686. struct snd_pcm_hw_params *params,
  1687. struct snd_soc_dai *dai)
  1688. {
  1689. struct snd_soc_codec *codec = dai->codec;
  1690. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1691. u8 old_mode, mode;
  1692. /* Enable voice digital filters */
  1693. twl4030_voice_enable(codec, substream->stream, 1);
  1694. /* bit rate */
  1695. old_mode = twl4030_read(codec,
  1696. TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
  1697. mode = old_mode;
  1698. switch (params_rate(params)) {
  1699. case 8000:
  1700. mode &= ~(TWL4030_SEL_16K);
  1701. break;
  1702. case 16000:
  1703. mode |= TWL4030_SEL_16K;
  1704. break;
  1705. default:
  1706. dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
  1707. params_rate(params));
  1708. return -EINVAL;
  1709. }
  1710. if (mode != old_mode) {
  1711. if (twl4030->codec_powered) {
  1712. /*
  1713. * If the codec is powered, than we need to toggle the
  1714. * codec power.
  1715. */
  1716. twl4030_codec_enable(codec, 0);
  1717. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  1718. twl4030_codec_enable(codec, 1);
  1719. } else {
  1720. twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
  1721. }
  1722. }
  1723. return 0;
  1724. }
  1725. static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  1726. int clk_id, unsigned int freq, int dir)
  1727. {
  1728. struct snd_soc_codec *codec = codec_dai->codec;
  1729. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1730. if (freq != 26000000) {
  1731. dev_err(codec->dev,
  1732. "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
  1733. __func__, freq / 1000);
  1734. return -EINVAL;
  1735. }
  1736. if ((freq / 1000) != twl4030->sysclk) {
  1737. dev_err(codec->dev,
  1738. "Mismatch in HFCLKIN: %u (configured: %u)\n",
  1739. freq, twl4030->sysclk * 1000);
  1740. return -EINVAL;
  1741. }
  1742. return 0;
  1743. }
  1744. static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
  1745. unsigned int fmt)
  1746. {
  1747. struct snd_soc_codec *codec = codec_dai->codec;
  1748. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1749. u8 old_format, format;
  1750. /* get format */
  1751. old_format = twl4030_read(codec, TWL4030_REG_VOICE_IF);
  1752. format = old_format;
  1753. /* set master/slave audio interface */
  1754. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  1755. case SND_SOC_DAIFMT_CBM_CFM:
  1756. format &= ~(TWL4030_VIF_SLAVE_EN);
  1757. break;
  1758. case SND_SOC_DAIFMT_CBS_CFS:
  1759. format |= TWL4030_VIF_SLAVE_EN;
  1760. break;
  1761. default:
  1762. return -EINVAL;
  1763. }
  1764. /* clock inversion */
  1765. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  1766. case SND_SOC_DAIFMT_IB_NF:
  1767. format &= ~(TWL4030_VIF_FORMAT);
  1768. break;
  1769. case SND_SOC_DAIFMT_NB_IF:
  1770. format |= TWL4030_VIF_FORMAT;
  1771. break;
  1772. default:
  1773. return -EINVAL;
  1774. }
  1775. if (format != old_format) {
  1776. if (twl4030->codec_powered) {
  1777. /*
  1778. * If the codec is powered, than we need to toggle the
  1779. * codec power.
  1780. */
  1781. twl4030_codec_enable(codec, 0);
  1782. twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
  1783. twl4030_codec_enable(codec, 1);
  1784. } else {
  1785. twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
  1786. }
  1787. }
  1788. return 0;
  1789. }
  1790. static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
  1791. {
  1792. struct snd_soc_codec *codec = dai->codec;
  1793. u8 reg = twl4030_read(codec, TWL4030_REG_VOICE_IF);
  1794. if (tristate)
  1795. reg |= TWL4030_VIF_TRI_EN;
  1796. else
  1797. reg &= ~TWL4030_VIF_TRI_EN;
  1798. return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
  1799. }
  1800. #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
  1801. #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1802. static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
  1803. .startup = twl4030_startup,
  1804. .shutdown = twl4030_shutdown,
  1805. .hw_params = twl4030_hw_params,
  1806. .set_sysclk = twl4030_set_dai_sysclk,
  1807. .set_fmt = twl4030_set_dai_fmt,
  1808. .set_tristate = twl4030_set_tristate,
  1809. };
  1810. static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
  1811. .startup = twl4030_voice_startup,
  1812. .shutdown = twl4030_voice_shutdown,
  1813. .hw_params = twl4030_voice_hw_params,
  1814. .set_sysclk = twl4030_voice_set_dai_sysclk,
  1815. .set_fmt = twl4030_voice_set_dai_fmt,
  1816. .set_tristate = twl4030_voice_set_tristate,
  1817. };
  1818. static struct snd_soc_dai_driver twl4030_dai[] = {
  1819. {
  1820. .name = "twl4030-hifi",
  1821. .playback = {
  1822. .stream_name = "HiFi Playback",
  1823. .channels_min = 2,
  1824. .channels_max = 4,
  1825. .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
  1826. .formats = TWL4030_FORMATS,
  1827. .sig_bits = 24,},
  1828. .capture = {
  1829. .stream_name = "HiFi Capture",
  1830. .channels_min = 2,
  1831. .channels_max = 4,
  1832. .rates = TWL4030_RATES,
  1833. .formats = TWL4030_FORMATS,
  1834. .sig_bits = 24,},
  1835. .ops = &twl4030_dai_hifi_ops,
  1836. },
  1837. {
  1838. .name = "twl4030-voice",
  1839. .playback = {
  1840. .stream_name = "Voice Playback",
  1841. .channels_min = 1,
  1842. .channels_max = 1,
  1843. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1844. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  1845. .capture = {
  1846. .stream_name = "Voice Capture",
  1847. .channels_min = 1,
  1848. .channels_max = 2,
  1849. .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
  1850. .formats = SNDRV_PCM_FMTBIT_S16_LE,},
  1851. .ops = &twl4030_dai_voice_ops,
  1852. },
  1853. };
  1854. static int twl4030_soc_probe(struct snd_soc_codec *codec)
  1855. {
  1856. struct twl4030_priv *twl4030;
  1857. twl4030 = devm_kzalloc(codec->dev, sizeof(struct twl4030_priv),
  1858. GFP_KERNEL);
  1859. if (!twl4030)
  1860. return -ENOMEM;
  1861. snd_soc_codec_set_drvdata(codec, twl4030);
  1862. /* Set the defaults, and power up the codec */
  1863. twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
  1864. twl4030_init_chip(codec);
  1865. return 0;
  1866. }
  1867. static int twl4030_soc_remove(struct snd_soc_codec *codec)
  1868. {
  1869. struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
  1870. struct twl4030_codec_data *pdata = twl4030->pdata;
  1871. twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
  1872. if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio))
  1873. gpio_free(pdata->hs_extmute_gpio);
  1874. return 0;
  1875. }
  1876. static struct snd_soc_codec_driver soc_codec_dev_twl4030 = {
  1877. .probe = twl4030_soc_probe,
  1878. .remove = twl4030_soc_remove,
  1879. .read = twl4030_read,
  1880. .write = twl4030_write,
  1881. .set_bias_level = twl4030_set_bias_level,
  1882. .idle_bias_off = true,
  1883. .controls = twl4030_snd_controls,
  1884. .num_controls = ARRAY_SIZE(twl4030_snd_controls),
  1885. .dapm_widgets = twl4030_dapm_widgets,
  1886. .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets),
  1887. .dapm_routes = intercon,
  1888. .num_dapm_routes = ARRAY_SIZE(intercon),
  1889. };
  1890. static int twl4030_codec_probe(struct platform_device *pdev)
  1891. {
  1892. return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030,
  1893. twl4030_dai, ARRAY_SIZE(twl4030_dai));
  1894. }
  1895. static int twl4030_codec_remove(struct platform_device *pdev)
  1896. {
  1897. snd_soc_unregister_codec(&pdev->dev);
  1898. return 0;
  1899. }
  1900. MODULE_ALIAS("platform:twl4030-codec");
  1901. static struct platform_driver twl4030_codec_driver = {
  1902. .probe = twl4030_codec_probe,
  1903. .remove = twl4030_codec_remove,
  1904. .driver = {
  1905. .name = "twl4030-codec",
  1906. .owner = THIS_MODULE,
  1907. },
  1908. };
  1909. module_platform_driver(twl4030_codec_driver);
  1910. MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
  1911. MODULE_AUTHOR("Steve Sakoman");
  1912. MODULE_LICENSE("GPL");