cxl.txt 14 KB

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  1. Coherent Accelerator Interface (CXL)
  2. ====================================
  3. Introduction
  4. ============
  5. The coherent accelerator interface is designed to allow the
  6. coherent connection of accelerators (FPGAs and other devices) to a
  7. POWER system. These devices need to adhere to the Coherent
  8. Accelerator Interface Architecture (CAIA).
  9. IBM refers to this as the Coherent Accelerator Processor Interface
  10. or CAPI. In the kernel it's referred to by the name CXL to avoid
  11. confusion with the ISDN CAPI subsystem.
  12. Coherent in this context means that the accelerator and CPUs can
  13. both access system memory directly and with the same effective
  14. addresses.
  15. Hardware overview
  16. =================
  17. POWER8 FPGA
  18. +----------+ +---------+
  19. | | | |
  20. | CPU | | AFU |
  21. | | | |
  22. | | | |
  23. | | | |
  24. +----------+ +---------+
  25. | PHB | | |
  26. | +------+ | PSL |
  27. | | CAPP |<------>| |
  28. +---+------+ PCIE +---------+
  29. The POWER8 chip has a Coherently Attached Processor Proxy (CAPP)
  30. unit which is part of the PCIe Host Bridge (PHB). This is managed
  31. by Linux by calls into OPAL. Linux doesn't directly program the
  32. CAPP.
  33. The FPGA (or coherently attached device) consists of two parts.
  34. The POWER Service Layer (PSL) and the Accelerator Function Unit
  35. (AFU). The AFU is used to implement specific functionality behind
  36. the PSL. The PSL, among other things, provides memory address
  37. translation services to allow each AFU direct access to userspace
  38. memory.
  39. The AFU is the core part of the accelerator (eg. the compression,
  40. crypto etc function). The kernel has no knowledge of the function
  41. of the AFU. Only userspace interacts directly with the AFU.
  42. The PSL provides the translation and interrupt services that the
  43. AFU needs. This is what the kernel interacts with. For example, if
  44. the AFU needs to read a particular effective address, it sends
  45. that address to the PSL, the PSL then translates it, fetches the
  46. data from memory and returns it to the AFU. If the PSL has a
  47. translation miss, it interrupts the kernel and the kernel services
  48. the fault. The context to which this fault is serviced is based on
  49. who owns that acceleration function.
  50. AFU Modes
  51. =========
  52. There are two programming modes supported by the AFU. Dedicated
  53. and AFU directed. AFU may support one or both modes.
  54. When using dedicated mode only one MMU context is supported. In
  55. this mode, only one userspace process can use the accelerator at
  56. time.
  57. When using AFU directed mode, up to 16K simultaneous contexts can
  58. be supported. This means up to 16K simultaneous userspace
  59. applications may use the accelerator (although specific AFUs may
  60. support fewer). In this mode, the AFU sends a 16 bit context ID
  61. with each of its requests. This tells the PSL which context is
  62. associated with each operation. If the PSL can't translate an
  63. operation, the ID can also be accessed by the kernel so it can
  64. determine the userspace context associated with an operation.
  65. MMIO space
  66. ==========
  67. A portion of the accelerator MMIO space can be directly mapped
  68. from the AFU to userspace. Either the whole space can be mapped or
  69. just a per context portion. The hardware is self describing, hence
  70. the kernel can determine the offset and size of the per context
  71. portion.
  72. Interrupts
  73. ==========
  74. AFUs may generate interrupts that are destined for userspace. These
  75. are received by the kernel as hardware interrupts and passed onto
  76. userspace by a read syscall documented below.
  77. Data storage faults and error interrupts are handled by the kernel
  78. driver.
  79. Work Element Descriptor (WED)
  80. =============================
  81. The WED is a 64-bit parameter passed to the AFU when a context is
  82. started. Its format is up to the AFU hence the kernel has no
  83. knowledge of what it represents. Typically it will be the
  84. effective address of a work queue or status block where the AFU
  85. and userspace can share control and status information.
  86. User API
  87. ========
  88. For AFUs operating in AFU directed mode, two character device
  89. files will be created. /dev/cxl/afu0.0m will correspond to a
  90. master context and /dev/cxl/afu0.0s will correspond to a slave
  91. context. Master contexts have access to the full MMIO space an
  92. AFU provides. Slave contexts have access to only the per process
  93. MMIO space an AFU provides.
  94. For AFUs operating in dedicated process mode, the driver will
  95. only create a single character device per AFU called
  96. /dev/cxl/afu0.0d. This will have access to the entire MMIO space
  97. that the AFU provides (like master contexts in AFU directed).
  98. The types described below are defined in include/uapi/misc/cxl.h
  99. The following file operations are supported on both slave and
  100. master devices.
  101. open
  102. ----
  103. Opens the device and allocates a file descriptor to be used with
  104. the rest of the API.
  105. A dedicated mode AFU only has one context and only allows the
  106. device to be opened once.
  107. An AFU directed mode AFU can have many contexts, the device can be
  108. opened once for each context that is available.
  109. When all available contexts are allocated the open call will fail
  110. and return -ENOSPC.
  111. Note: IRQs need to be allocated for each context, which may limit
  112. the number of contexts that can be created, and therefore
  113. how many times the device can be opened. The POWER8 CAPP
  114. supports 2040 IRQs and 3 are used by the kernel, so 2037 are
  115. left. If 1 IRQ is needed per context, then only 2037
  116. contexts can be allocated. If 4 IRQs are needed per context,
  117. then only 2037/4 = 509 contexts can be allocated.
  118. ioctl
  119. -----
  120. CXL_IOCTL_START_WORK:
  121. Starts the AFU context and associates it with the current
  122. process. Once this ioctl is successfully executed, all memory
  123. mapped into this process is accessible to this AFU context
  124. using the same effective addresses. No additional calls are
  125. required to map/unmap memory. The AFU memory context will be
  126. updated as userspace allocates and frees memory. This ioctl
  127. returns once the AFU context is started.
  128. Takes a pointer to a struct cxl_ioctl_start_work:
  129. struct cxl_ioctl_start_work {
  130. __u64 flags;
  131. __u64 work_element_descriptor;
  132. __u64 amr;
  133. __s16 num_interrupts;
  134. __s16 reserved1;
  135. __s32 reserved2;
  136. __u64 reserved3;
  137. __u64 reserved4;
  138. __u64 reserved5;
  139. __u64 reserved6;
  140. };
  141. flags:
  142. Indicates which optional fields in the structure are
  143. valid.
  144. work_element_descriptor:
  145. The Work Element Descriptor (WED) is a 64-bit argument
  146. defined by the AFU. Typically this is an effective
  147. address pointing to an AFU specific structure
  148. describing what work to perform.
  149. amr:
  150. Authority Mask Register (AMR), same as the powerpc
  151. AMR. This field is only used by the kernel when the
  152. corresponding CXL_START_WORK_AMR value is specified in
  153. flags. If not specified the kernel will use a default
  154. value of 0.
  155. num_interrupts:
  156. Number of userspace interrupts to request. This field
  157. is only used by the kernel when the corresponding
  158. CXL_START_WORK_NUM_IRQS value is specified in flags.
  159. If not specified the minimum number required by the
  160. AFU will be allocated. The min and max number can be
  161. obtained from sysfs.
  162. reserved fields:
  163. For ABI padding and future extensions
  164. CXL_IOCTL_GET_PROCESS_ELEMENT:
  165. Get the current context id, also known as the process element.
  166. The value is returned from the kernel as a __u32.
  167. mmap
  168. ----
  169. An AFU may have an MMIO space to facilitate communication with the
  170. AFU. If it does, the MMIO space can be accessed via mmap. The size
  171. and contents of this area are specific to the particular AFU. The
  172. size can be discovered via sysfs.
  173. In AFU directed mode, master contexts are allowed to map all of
  174. the MMIO space and slave contexts are allowed to only map the per
  175. process MMIO space associated with the context. In dedicated
  176. process mode the entire MMIO space can always be mapped.
  177. This mmap call must be done after the START_WORK ioctl.
  178. Care should be taken when accessing MMIO space. Only 32 and 64-bit
  179. accesses are supported by POWER8. Also, the AFU will be designed
  180. with a specific endianness, so all MMIO accesses should consider
  181. endianness (recommend endian(3) variants like: le64toh(),
  182. be64toh() etc). These endian issues equally apply to shared memory
  183. queues the WED may describe.
  184. read
  185. ----
  186. Reads events from the AFU. Blocks if no events are pending
  187. (unless O_NONBLOCK is supplied). Returns -EIO in the case of an
  188. unrecoverable error or if the card is removed.
  189. read() will always return an integral number of events.
  190. The buffer passed to read() must be at least 4K bytes.
  191. The result of the read will be a buffer of one or more events,
  192. each event is of type struct cxl_event, of varying size.
  193. struct cxl_event {
  194. struct cxl_event_header header;
  195. union {
  196. struct cxl_event_afu_interrupt irq;
  197. struct cxl_event_data_storage fault;
  198. struct cxl_event_afu_error afu_error;
  199. };
  200. };
  201. The struct cxl_event_header is defined as:
  202. struct cxl_event_header {
  203. __u16 type;
  204. __u16 size;
  205. __u16 process_element;
  206. __u16 reserved1;
  207. };
  208. type:
  209. This defines the type of event. The type determines how
  210. the rest of the event is structured. These types are
  211. described below and defined by enum cxl_event_type.
  212. size:
  213. This is the size of the event in bytes including the
  214. struct cxl_event_header. The start of the next event can
  215. be found at this offset from the start of the current
  216. event.
  217. process_element:
  218. Context ID of the event.
  219. reserved field:
  220. For future extensions and padding.
  221. If the event type is CXL_EVENT_AFU_INTERRUPT then the event
  222. structure is defined as:
  223. struct cxl_event_afu_interrupt {
  224. __u16 flags;
  225. __u16 irq; /* Raised AFU interrupt number */
  226. __u32 reserved1;
  227. };
  228. flags:
  229. These flags indicate which optional fields are present
  230. in this struct. Currently all fields are mandatory.
  231. irq:
  232. The IRQ number sent by the AFU.
  233. reserved field:
  234. For future extensions and padding.
  235. If the event type is CXL_EVENT_DATA_STORAGE then the event
  236. structure is defined as:
  237. struct cxl_event_data_storage {
  238. __u16 flags;
  239. __u16 reserved1;
  240. __u32 reserved2;
  241. __u64 addr;
  242. __u64 dsisr;
  243. __u64 reserved3;
  244. };
  245. flags:
  246. These flags indicate which optional fields are present in
  247. this struct. Currently all fields are mandatory.
  248. address:
  249. The address that the AFU unsuccessfully attempted to
  250. access. Valid accesses will be handled transparently by the
  251. kernel but invalid accesses will generate this event.
  252. dsisr:
  253. This field gives information on the type of fault. It is a
  254. copy of the DSISR from the PSL hardware when the address
  255. fault occurred. The form of the DSISR is as defined in the
  256. CAIA.
  257. reserved fields:
  258. For future extensions
  259. If the event type is CXL_EVENT_AFU_ERROR then the event structure
  260. is defined as:
  261. struct cxl_event_afu_error {
  262. __u16 flags;
  263. __u16 reserved1;
  264. __u32 reserved2;
  265. __u64 error;
  266. };
  267. flags:
  268. These flags indicate which optional fields are present in
  269. this struct. Currently all fields are Mandatory.
  270. error:
  271. Error status from the AFU. Defined by the AFU.
  272. reserved fields:
  273. For future extensions and padding
  274. Sysfs Class
  275. ===========
  276. A cxl sysfs class is added under /sys/class/cxl to facilitate
  277. enumeration and tuning of the accelerators. Its layout is
  278. described in Documentation/ABI/testing/sysfs-class-cxl
  279. Udev rules
  280. ==========
  281. The following udev rules could be used to create a symlink to the
  282. most logical chardev to use in any programming mode (afuX.Yd for
  283. dedicated, afuX.Ys for afu directed), since the API is virtually
  284. identical for each:
  285. SUBSYSTEM=="cxl", ATTRS{mode}=="dedicated_process", SYMLINK="cxl/%b"
  286. SUBSYSTEM=="cxl", ATTRS{mode}=="afu_directed", \
  287. KERNEL=="afu[0-9]*.[0-9]*s", SYMLINK="cxl/%b"