Aquaris-M10-4G/arch/arm64/boot/dts/bq_aquaris_m10_LTE.dts

/dts-v1/;

#include "mt6753.dtsi"
#include <dt-bindings/lcm/r63417_fhd_dsi_cmd_truly_nt50358.dtsi>
#include "bq_aquaris_m10_LTE_bat_setting.dtsi"

/ {
memory@00000000 {
		device_type = "memory";
		reg = <0 0x40000000 0 0x3F000000>;
	};

	bus {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0 0 0 0xffffffff>;

		MTKFB@5e200000 {
			compatible = "mediatek,MTKFB";
			reg = <0x7F000000 0x1000000>;
		};

	};
	led0:led@0 {
		compatible = "mediatek,red";
		led_mode = <0>;
		data = <1>;
		pwm_config = <0 0 0 0 0>;
	};
	led1:led@1 {
		compatible = "mediatek,green";
		led_mode = <0>;
		data = <1>;
		pwm_config = <0 0 0 0 0>;
	};
	led2:led@2 {
		compatible = "mediatek,blue";
		led_mode = <0>;
		data = <1>;
		pwm_config = <0 0 0 0 0>;
	};
	led3:led@3 {
		compatible = "mediatek,jogball-backlight";
		led_mode = <0>;
		data = <1>;
		pwm_config = <0 0 0 0 0>;
	};
	led4:led@4 {
		compatible = "mediatek,keyboard-backlight";
		led_mode = <0>;
		data = <1>;
		pwm_config = <0 0 0 0 0>;
	};
	led5:led@5 {
		compatible = "mediatek,button-backlight";
		led_mode = <0>;
		data = <1>;
		pwm_config = <0 0 0 0 0>;
	};
	led6:led@6 {
		compatible = "mediatek,lcd-backlight";
		led_mode = <5>;
		data = <1>;
		pwm_config = <0 0 0 0 0>;
	};
	vibrator0:vibrator@0 {
		compatible = "mediatek,vibrator";
		vib_timer = <25>;
		vib_limit = <9>;
		vib_vol= <6>;
	};
 /* sensor standardization */
	cust_accel@0 {
		compatible = "mediatek,bma255";
		i2c_num = <2>;
		i2c_addr = <0x10 0 0 0>;
		direction = <7>;
		power_id = <0xffff>;
		power_vol = <0>;
		firlen = <0>;
		is_batch_supported = <0>;
	};

		cust_alsps@0 {
		compatible = "mediatek,ltr303_new";
		i2c_num	= <2>;
		i2c_addr = <0x29 0 0 0>;
		polling_mode_ps = <0>;
		polling_mode_als = <1>;
		power_id = <0xffff>;
		power_vol = <0>;

		ps_threshold_high =  <90>;
		als_level = <1 10 20 190 300 320 350 400 590 700 910 1120 1330 1450 1590 1700 1900 2200 2590 2800 3110 3220 3530 3640 3760 3830 3900 4120 4340 4560 4850 5000 5120 5240 5460 5680 5800 5950 6100 6350 6700 6900 7100 7350 7500 7750 8000 8250 8400 8650 8800 9050 9300 9450 9720 9850 10200 10400 10600 10850 11250 11500 11800 12000 12250 12500 12650 12800 14600 17500 19000 20000>;
		als_value = <0 10 20 39 47 55 65 83 94 103 112 167 226 236 261 296 326 376 416 456 511 536 566 586 606 621 636 661 696 736 866 886 906 926 956 976 996 1021 1036 1076 1136 1176 1191 1206 1266 1291 1336 1366 1406 1441 1456 1486 1501 1546 1576 1606 1643 1696 1731 1781 1831 1861 1896 1936 2036 2136 2700 3600 5900 8000 9800 10240>;
		ps_threshold_low =  <70>;
		is_batch_supported_ps   = <0>;
		is_batch_supported_als  = <0>;
		interrupt-parent = <&pio>;
		interrupts = <65 IRQ_TYPE_EDGE_FALLING>;
		debounce = <8 0>;
	};

		cust_mag@0 {
		compatible				= "mediatek,bmm150";
		i2c_num					= <2>;
		i2c_addr				= <0x12 0 0 0>;
		direction				= <7>;
		power_id				= <0xffff>;
		power_vol				= <0>;
		is_batch_supported			= <0>;
		};

		cust_gyro@0 {
		compatible				= "mediatek,mpu6050gy";
		i2c_num					= <2>;
		i2c_addr				= <0x69 0 0 0>;
		direction				= <4>;
		power_id				= <0xffff>;
		power_vol				= <0>;
		firlen					= <0>;
		is_batch_supported			= <0>;
		};

		cust_led@0 {
		compatible				= "awinic,pressure";
		i2c_num					= <2>;
		i2c_addr				= <0x64 0 0 0>;
		power_id				= <0xffff>;
		power_vol				= <0>;
		firlen					= <0>;
		is_batch_supported			= <0>;
		};

		cap_touch@5D {
			compatible = "mediatek,cap_touch";
			reg = <0x5D>;
			interrupt-parent = <&pio>;
			interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
			int-gpio = <&pio 10 0>;
			rst-gpio = <&pio 62 0>;
		};
		mt8193hdmi: mt8193hdmi@0 {//add line 1
            compatible = "mediatek,mt8193-hdmi";//add line 2
        };//add line 3

};

/* sensor gpio standization */

&pio {
	alsps_intpin_cfg: alspspincfg {

	    pins_cmd_dat {
			pins = <PINMUX_GPIO65__FUNC_GPIO65>;
			slew-rate = <0>;
			bias-pull-up = <00>;
		};
	};

	alsps_intpin_default: alspsdefaultcfg {
	    pins_cmd_dat {
			pins = <PINMUX_GPIO65__FUNC_GPIO65>;
			slew-rate = <0>;
			bias-pull-up = <00>;
		};
	};

	gyro_intpin_cfg: gyropincfg {

	    pins_cmd_dat {
			pins = <PINMUX_GPIO67__FUNC_GPIO67>;
			slew-rate = <0>;
			bias-pull-down = <00>;
		};
	};

	gyro_intpin_default: gyrodefaultcfg {

	};
};
&alsps {
	pinctrl-names = "pin_default", "pin_cfg";
	pinctrl-0 = <&alsps_intpin_default>;
	pinctrl-1 = <&alsps_intpin_cfg>;
	status = "okay";

};

&gyro {
	pinctrl-names = "pin_default", "pin_cfg";
	pinctrl-0 = <&gyro_intpin_default>;
	pinctrl-1 = <&gyro_intpin_cfg>;
	status = "okay";

};

&pio {
	sar_intpin_cfg: sarpincfg {
	    pins_cmd_dat {
			pins = <PINMUX_GPIO97__FUNC_GPIO97>;
	    };
	};
	sar_intpin_default: sardefaultcfg {
	};
};

&sar {
	pinctrl-names = "pin_default", "pin_cfg";
	pinctrl-0 = <&sar_intpin_default>;
	pinctrl-1 = <&sar_intpin_cfg>;
	status = "okay";
};
/* sensor end */

/*ACCDET GPIO standardization */
&accdet {
	interrupt-parent = <&eintc>;
	interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
	eint-debounce = <256>;
	accdet-gpio = <&pio 12 0>;
	accdet-mic-vol = <7>;
	headset-mode-setting = <0x500 0x200 1 0x1f0 0x800 0x800 0x20>;
	accdet-plugout-debounce = <20>;
	/*1:ACC mode, 2:low cost without in bias, 6:low cost with in bias*/
	accdet-mic-mode = <1>;
	/*0--MD_MAX--UP_MAX--DW_MAX*/
	headset-three-key-threshold = <0 80 220 500>;
	/*0--MD_MAX--VOICE_MAX--UP_MAX--DW_MAX*/
	headset-four-key-threshold = <0 58 121 192 450>;
	pinctrl-names = "default", "state_eint_as_int";
	pinctrl-0 = <&accdet_pins_default>;
	pinctrl-1 = <&accdet_pins_eint_as_int>;
	status = "okay";
};
&pio{
	accdet_pins_default: eint86default {
	};

	accdet_pins_eint_as_int: eint12 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO12__FUNC_GPIO12>;
			bias-disable;
		};
	};
};
/*ACCDET end*/

/*TOUCH GPIO standardization */
&touch {
	tpd-resolution = <1920 1200>;
	use-tpd-button = <1>;
	tpd-key-num = <1>;
	tpd-key-local= <172 0 0 0>;
	tpd-key-dim-local = <2000 2000 70 70 0 0 0 0 0 0 0 0 0 0 0 0>;
	tpd-max-touch-num = <10>;
	tpd-filter-enable = <1>;
	tpd-filter-pixel-density = <186>;
	tpd-filter-custom-prameters = <0 0 0 0 0 0 0 0 0 0 0 0>;
	tpd-filter-custom-speed = <0 0 0>;
	pinctrl-names = "default", "state_eint_as_int", "state_eint_output0", "state_eint_output1",
		"state_rst_output0", "state_rst_output1";
	pinctrl-0 = <&CTP_pins_default>;
	pinctrl-1 = <&CTP_pins_eint_as_int>;
	pinctrl-2 = <&CTP_pins_eint_output0>;
	pinctrl-3 = <&CTP_pins_eint_output1>;
	pinctrl-4 = <&CTP_pins_rst_output0>;
	pinctrl-5 = <&CTP_pins_rst_output1>;
	status = "okay";
};
&pio {
	CTP_pins_default: eint0default {
	};

	CTP_pins_eint_as_int: eint@0 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO10__FUNC_GPIO10>;
			slew-rate = <0>;
			bias-disable;
		};
	};
	CTP_pins_eint_output0: eintoutput0 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO10__FUNC_GPIO10>;
			slew-rate = <1>;
			output-low;
		};
	};
	CTP_pins_eint_output1: eintoutput1 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO10__FUNC_GPIO10>;
			slew-rate = <1>;
			output-high;
		};
	};
	CTP_pins_rst_output0: rstoutput0 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO62__FUNC_GPIO62>;
			slew-rate = <1>;
			output-low;
		};
	};
	CTP_pins_rst_output1: rstoutput1 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO62__FUNC_GPIO62>;
			slew-rate = <1>;
			output-high;
		};
	};
};
/* TOUCH end */


/* CAMERA GPIO standardization */
&pio {
	camera_pins_cam0_rst0: cam0@0 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO44__FUNC_GPIO44>;/*GPIO_CAMERA_CMRST_PIN*/
			slew-rate = <1>; /*direction 0:in, 1:out*/
			output-low;/*direction out used only. output_low or high*/
		};
	};
	camera_pins_cam0_rst1: cam0@1 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO44__FUNC_GPIO44>;/*GPIO_CAMERA_CMRST_PIN*/
			slew-rate = <1>;
			output-high;
		};
	};
	camera_pins_cam0_pnd0: cam0@2 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO82__FUNC_GPIO82>;/*GPIO_CAMERA_CMPDN_PIN*/
			slew-rate = <1>;
			output-low;
		};
	};
	camera_pins_cam0_pnd1: cam0@3 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO82__FUNC_GPIO82>;/*GPIO_CAMERA_CMPDN_PIN*/
			slew-rate = <1>;
			output-high;
		};
	};
	camera_pins_cam1_rst0: cam1@0 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO76__FUNC_GPIO76>;/*GPIO_CAMERA_CMRST1_PIN*/
			slew-rate = <1>; /*direction 0:in, 1:out*/
			output-low;/*direction out used only. output_low or high*/
		};
	};
	camera_pins_cam1_rst1: cam1@1 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO76__FUNC_GPIO76>;/*GPIO_CAMERA_CMRST1_PIN*/
			slew-rate = <1>;
			output-high;
		};
	};
	camera_pins_cam1_pnd0: cam1@2 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO86__FUNC_GPIO86>;/*GPIO_CAMERA_CMPDN1_PIN*/
			slew-rate = <1>;
			output-low;
		};
	};
	camera_pins_cam1_pnd1: cam1@3 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO86__FUNC_GPIO86>;/*GPIO_CAMERA_CMPDN1_PIN*/
			slew-rate = <1>;
			output-high;
		};
	};
	camera_pins_cam_ldo0_0: cam@0 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO63__FUNC_GPIO63>;
			slew-rate = <1>;
			output-low;
		};
	};
	camera_pins_cam_ldo0_1: cam@1 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO63__FUNC_GPIO63>;
			slew-rate = <1>;
			output-high;
		};
	};
	camera_pins_default: camdefault {

	};
};

&mt8193_bridge{
	pinctrl-names = "default";
	pinctrl-0 = <&dpi_pins_default>;
	status = "okay";
	};
&pio{
	dpi_pins_default:hdmi_dpi_pins{
		pins_cmd_dat {
			pins = <PINMUX_GPIO1__FUNC_DPI_D5>,
			 <PINMUX_GPIO2__FUNC_DPI_D6>,
			 <PINMUX_GPIO3__FUNC_DPI_D7>,
			 <PINMUX_GPIO4__FUNC_DPI_D8>,
			 <PINMUX_GPIO5__FUNC_DPI_D9>,
			 <PINMUX_GPIO6__FUNC_DPI_D10>,
			 <PINMUX_GPIO7__FUNC_DPI_D11>,
			 <PINMUX_GPIO59__FUNC_DPI_CK0>;
		};
	};
};	
&mt8193hdmi{
	pinctrl-names = "default";
	pinctrl-0 = <&mt8193hdmi_pins_default>;
	hdmi_power_gpios = <&pio 87 0>;
	status = "okay";
	};
&pio{
	mt8193hdmi_pins_default:8193hdmi_dpi_pins{
		pins_cmd_dat {
			pins = <PINMUX_GPIO87__FUNC_GPIO87>;
			slew-rate = <1>;
			bias-pull-up =<00>;
			output-low;
		};
	};
};
&kd_camera_hw1 {
	pinctrl-names = "default", "cam0_rst0", "cam0_rst1", "cam0_pnd0", "cam0_pnd1",
	"cam1_rst0", "cam1_rst1", "cam1_pnd0", "cam1_pnd1",
	"cam_ldo0_0", "cam_ldo0_1";
	pinctrl-0 = <&camera_pins_default>;
	pinctrl-1 = <&camera_pins_cam0_rst0>;
	pinctrl-2 = <&camera_pins_cam0_rst1>;
	pinctrl-3 = <&camera_pins_cam0_pnd0>;
	pinctrl-4 = <&camera_pins_cam0_pnd1>;
	pinctrl-5 = <&camera_pins_cam1_rst0>;
	pinctrl-6 = <&camera_pins_cam1_rst1>;
	pinctrl-7 = <&camera_pins_cam1_pnd0>;
	pinctrl-8 = <&camera_pins_cam1_pnd1>;
	pinctrl-9 = <&camera_pins_cam_ldo0_0>;
	pinctrl-10 = <&camera_pins_cam_ldo0_1>;
	status = "okay";

};
/* CAMERA GPIO end */

/* CONSYS GPIO standardization */
&pio {
	consys_pins_default: default {

	};

	gpslna_pins_init: gpslna@0 {

	    pins_cmd_dat {
			pins = <PINMUX_GPIO77__FUNC_GPIO77>;
			slew-rate = <0>;
			bias-disable;
			output-low;
		};
	};

	gpslna_pins_oh: gpslna@1 {

	    pins_cmd_dat {
			pins = <PINMUX_GPIO77__FUNC_GPIO77>;
			slew-rate = <1>;
			bias-pull-up = <00>;
			output-high;
		};
	};

	gpslna_pins_ol: gpslna@2 {

	    pins_cmd_dat {
			pins = <PINMUX_GPIO77__FUNC_GPIO77>;
			slew-rate = <1>;
			bias-pull-up = <00>;
			output-low;
		};
	};

};

&consys {
	pinctrl-names = "default", "gps_lna_state_init", "gps_lna_state_oh", "gps_lna_state_ol";
	pinctrl-0 = <&consys_pins_default>;
	pinctrl-1 = <&gpslna_pins_init>;
	pinctrl-2 = <&gpslna_pins_oh>;
	pinctrl-3 = <&gpslna_pins_ol>;
	status = "okay";

};
/* CONSYS end */
/* mmc start */
&mmc0 {
		clk_src = /bits/ 8 <MSDC50_CLKSRC_400MHZ>;
		bus-width = <8>;
		max-frequency = <200000000>;
		cap-mmc-highspeed;
		msdc-sys-suspend;
		mmc-ddr-1_8v;
		mmc-hs200-1_8v;
		mmc-hs400-1_8v;
		non-removable;
		pinctl = <&mmc0_pins_default>;
		register_setting = <&mmc0_register_setting_default>;
		host_function = /bits/ 8 <MSDC_EMMC>;
		bootable;
		status = "okay";
};

&mmc1 {
		clk_src = /bits/ 8 <MSDC30_CLKSRC_200MHZ>;
		bus-width = <4>;
		max-frequency = <200000000>;
		msdc-sys-suspend;
		sd_need_power;
		cap-sd-highspeed;
		sd-uhs-sdr12;
		sd-uhs-sdr25;
		sd-uhs-sdr50;
		sd-uhs-sdr104;
		sd-uhs-ddr50;
		pinctl = <&mmc1_pins_default>;
		pinctl_sdr104 = <&mmc1_pins_sdr104>;
		pinctl_sdr50 = <&mmc1_pins_sdr50>;
		pinctl_ddr50 = <&mmc1_pins_ddr50>;
		register_setting = <&mmc1_register_setting_default>;
		host_function = /bits/ 8 <MSDC_SD>;
		cd_level = /bits/ 8 <MSDC_CD_LOW>;
		cd-gpios = <&pio 11 0>;
		status = "okay";
};

&mmc2 {
		clk_src = /bits/ 8 <MSDC30_CLKSRC_200MHZ>;
		bus-width = <4>;
		max-frequency = <200000000>;
		cap-sd-highspeed;
		sd-uhs-sdr12;
		sd-uhs-sdr25;
		sd-uhs-sdr50;
		sd-uhs-sdr104;
		sd-uhs-ddr50;
		non-removable;
		host_function = /bits/ 8 <MSDC_SDIO>;
		status = "okay";
};

&pio {
	mmc0_pins_default: mmc0@default {
			pins_cmd {
				drive-strength = /bits/ 8 <2>;
			};
			pins_dat {
				drive-strength = /bits/ 8 <2>;
			};
			pins_clk {
				drive-strength = /bits/ 8 <2>;
			};
			pins_rst {
				drive-strength = /bits/ 8 <2>;
			};
			pins_ds {
				drive-strength = /bits/ 8 <2>;
			};
	};

	mmc0_register_setting_default: mmc0@register_default {
		dat0rddly      = /bits/ 8 <0>;
		dat1rddly      = /bits/ 8 <0>;
		dat2rddly      = /bits/ 8 <0>;
		dat3rddly      = /bits/ 8 <0>;
		dat4rddly      = /bits/ 8 <0>;
		dat5rddly      = /bits/ 8 <0>;
		dat6rddly      = /bits/ 8 <0>;
		dat7rddly      = /bits/ 8 <0>;
		datwrddly      = /bits/ 8 <0>;
		cmdrrddly      = /bits/ 8 <0>;
		cmdrddly       = /bits/ 8 <0>;
		cmd_edge = /bits/ 8 <MSDC_SMPL_FALLING>;
		rdata_edge = /bits/ 8 <MSDC_SMPL_FALLING>;
		wdata_edge = /bits/ 8 <MSDC_SMPL_FALLING>;

		ett-hs200-cells = <12>;
		ett-hs200-default = <OFFSET_MSDC_PATCH_BIT0	MSDC_PB0_INT_DAT_LATCH_CK_SEL 0x0
			OFFSET_MSDC_PATCH_BIT0	MSDC_PB0_CKGEN_MSDC_DLY_SEL   0x0
			OFFSET_MSDC_PATCH_BIT1	MSDC_PB1_CMD_RSP_TA_CNTR      0x1
			OFFSET_MSDC_IOCON		MSDC_IOCON_RSPL               0x1
			OFFSET_MSDC_PAD_TUNE0	MSDC_PAD_TUNE0_CMDRDLY        0xf
			OFFSET_MSDC_PAD_TUNE0	MSDC_PAD_TUNE0_CMDRRDLY       0x0
			OFFSET_MSDC_PATCH_BIT1		MSDC_PB1_WRDAT_CRCS_TA_CNTR   0x1
			OFFSET_MSDC_PAD_TUNE0	MSDC_PAD_TUNE0_DATWRDLY       0xf
			OFFSET_MSDC_IOCON			MSDC_IOCON_W_D0SPL            0x1
			OFFSET_MSDC_DAT_RDDLY0		MSDC_DAT_RDDLY0_D0            0xf
			OFFSET_MSDC_PAD_TUNE0	MSDC_PAD_TUNE0_DATRRDLY       0x16
			OFFSET_MSDC_IOCON		MSDC_IOCON_R_D_SMPL           0x0>;

		ett-hs400-cells = <8>;
		ett-hs400-default = <OFFSET_MSDC_PATCH_BIT0	MSDC_PB0_INT_DAT_LATCH_CK_SEL	0x0
			OFFSET_MSDC_PATCH_BIT0		MSDC_PB0_CKGEN_MSDC_DLY_SEL		0x0
			OFFSET_EMMC50_PAD_DS_TUNE	MSDC_EMMC50_PAD_DS_TUNE_DLY1	0x2
			OFFSET_EMMC50_PAD_DS_TUNE	MSDC_EMMC50_PAD_DS_TUNE_DLY3	0xe
			OFFSET_MSDC_PATCH_BIT1			MSDC_PB1_CMD_RSP_TA_CNTR	0x1
			OFFSET_MSDC_IOCON		MSDC_IOCON_RSPL				0x0
			OFFSET_MSDC_PAD_TUNE0			MSDC_PAD_TUNE0_CMDRDLY		0xf
			OFFSET_MSDC_PAD_TUNE0		MSDC_PAD_TUNE0_CMDRRDLY		0xd>;
	};

	mmc1_pins_default: mmc1@default {
			pins_cmd {
				drive-strength = /bits/ 8 <3>;
			};
			pins_dat {
				drive-strength = /bits/ 8 <3>;
			};
			pins_clk {
				drive-strength = /bits/ 8 <3>;
			};
	};

	mmc1_pins_sdr104: mmc1@sdr104 {
			pins_cmd {
				drive-strength = /bits/ 8 <2>;
			};
			pins_dat {
				drive-strength = /bits/ 8 <2>;
			};
			pins_clk {
				drive-strength = /bits/ 8 <3>;
			};
	};

	mmc1_pins_sdr50: mmc1@sdr50 {
			pins_cmd {
				drive-strength = /bits/ 8 <2>;
			};
			pins_dat {
				drive-strength = /bits/ 8 <2>;
			};
			pins_clk {
				drive-strength = /bits/ 8 <3>;
			};
	};

	mmc1_pins_ddr50: mmc1@ddr50 {
			pins_cmd {
				drive-strength = /bits/ 8 <2>;
			};
			pins_dat {
				drive-strength = /bits/ 8 <2>;
			};
			pins_clk {
				drive-strength = /bits/ 8 <3>;
			};
	};

	mmc1_register_setting_default: mmc1@register_default {
				dat0rddly      = /bits/ 8 <0>;
				dat1rddly      = /bits/ 8 <0>;
				dat2rddly      = /bits/ 8 <0>;
				dat3rddly      = /bits/ 8 <0>;
				datwrddly      = /bits/ 8 <0>;
				cmdrrddly      = /bits/ 8 <0>;
				cmdrddly       = /bits/ 8 <0>;
				cmd_edge = /bits/ 8 <MSDC_SMPL_FALLING>;
				rdata_edge = /bits/ 8 <MSDC_SMPL_FALLING>;
				wdata_edge = /bits/ 8 <MSDC_SMPL_FALLING>;
	};
};
/* mmc end */


/* USB GPIO Kernal Standardization start */
&pio {
	usb_default: usb_default {
	};

	gpio67_mode5_iddig: iddig_irq_init {
		pins_cmd_dat {
			pins = <PINMUX_GPIO67__FUNC_IDDIG>;
			slew-rate = <0>;
			bias-pull-up = <00>;
		};
	};

	gpio83_mode2_drvvbus: drvvbus_init {
		pins_cmd_dat {
			pins = <PINMUX_GPIO83__FUNC_USB_DRVVBUS>;
			slew-rate = <1>;
			bias-pull-up = <00>;
		};
	};

	gpio83_mode2_drvvbus_low: drvvbus_low {
		pins_cmd_dat {
			pins = <PINMUX_GPIO83__FUNC_USB_DRVVBUS>;
			slew-rate = <1>;
			output-low;
		};
	};

	gpio83_mode2_drvvbus_high: drvvbus_high {
		pins_cmd_dat {
			pins = <PINMUX_GPIO83__FUNC_USB_DRVVBUS>;
			slew-rate = <1>;
			output-high;
		};
	};
};

&usb0 {
	iddig_gpio = <67 1>;
	pinctrl-names = "usb_default", "iddig_irq_init", "drvvbus_init", "drvvbus_low", "drvvbus_high";
	pinctrl-0 = <&usb_default>;
	pinctrl-1 = <&gpio67_mode5_iddig>;
	pinctrl-2 = <&gpio83_mode2_drvvbus>;
	pinctrl-3 = <&gpio83_mode2_drvvbus_low>;
	pinctrl-4 = <&gpio83_mode2_drvvbus_high>;
	status = "okay";
};
/* USB GPIO Kernal Standardization end */

/* AUDIO GPIO standardization */
&mt_soc_dl1_pcm {
	pinctrl-names = "default", "audpmicclk-mode0", "audpmicclk-mode1", "audi2s1-mode0", "audi2s1-mode1", "extamp-pullhigh", "extamp-pulllow",  "rcvspk-pullhigh", "rcvspk-pulllow";
	pinctrl-0 = <&aud_pins_default>;
	pinctrl-1 = <&aud_pins_pmicclk_mode0>;
	pinctrl-2 = <&aud_pins_pmicclk_mode1>;
	pinctrl-3 = <&aud_pins_i2s1_mode0>;
	pinctrl-4 = <&aud_pins_i2s1_mode1>;
	pinctrl-5 = <&aud_pins_extamp_high>;
	pinctrl-6 = <&aud_pins_extamp_low>;
	pinctrl-7 = <&aud_pins_rcvspk_high>;
	pinctrl-8 = <&aud_pins_rcvspk_low>;
	status = "okay";
};
&pio {
	aud_pins_default: audiodefault {
		audio_i2s1_hdmi {//add line 1
	        pins = <PINMUX_GPIO78__FUNC_I2S1_DO>,//add line 2
	        <PINMUX_GPIO79__FUNC_I2S1_LRCK>,//add line 3
	        <PINMUX_GPIO80__FUNC_I2S1_BCK>;//add line 4
	    };//add line 5
	};
	
	aud_pins_pmicclk_mode0: pmicclkmode0 {
		pins_cmd0_dat {
			pins = <PINMUX_GPIO143__FUNC_GPIO143>;
		};
		pins_cmd1_dat {
			pins = <PINMUX_GPIO144__FUNC_GPIO144>;
		};
		pins_cmd2_dat {
			pins = <PINMUX_GPIO145__FUNC_GPIO145>;
		};
	};
	aud_pins_pmicclk_mode1: pmicclkmode1 {
		pins_cmd0_dat {
			pins = <PINMUX_GPIO143__FUNC_AUD_CLK_MOSI>;
		};
		pins_cmd1_dat {
			pins = <PINMUX_GPIO144__FUNC_AUD_DAT_MISO>;
		};
		pins_cmd2_dat {
			pins = <PINMUX_GPIO145__FUNC_AUD_DAT_MOSI>;
		};
	};
	aud_pins_i2s1_mode0: audi2s1mode0 {
		pins_cmd0_dat {
			pins = <PINMUX_GPIO78__FUNC_GPIO78>;
		};
		pins_cmd1_dat {
			pins = <PINMUX_GPIO79__FUNC_GPIO79>;
		};
		pins_cmd2_dat {
			pins = <PINMUX_GPIO80__FUNC_GPIO80>;
		};
	};
	aud_pins_i2s1_mode1: audi2s1mode1 {
		pins_cmd0_dat {
			pins = <PINMUX_GPIO78__FUNC_I2S1_DO>;
		};
		pins_cmd1_dat {
			pins = <PINMUX_GPIO79__FUNC_I2S1_LRCK>;
		};
		pins_cmd2_dat {
			pins = <PINMUX_GPIO80__FUNC_I2S1_BCK>;
		};
	};
	aud_pins_extamp_high: audexamphigh {
		pins_cmd_dat {
			pins = <PINMUX_GPIO64__FUNC_GPIO64>;
			slew-rate = <1>;
			output-high;
		};
	};
	aud_pins_extamp_low: audexamplow {
		pins_cmd_dat {
			pins = <PINMUX_GPIO64__FUNC_GPIO64>;
			slew-rate = <1>;
			output-low;
		};
	};
	aud_pins_rcvspk_high: audrcvspkhigh {
		pins_cmd_dat {
			pins = <PINMUX_GPIO120__FUNC_GPIO120>;
			slew-rate = <1>;
			output-low; /*set low for receiver out*/
		};
	};
	aud_pins_rcvspk_low: audrcvspklow {
		pins_cmd_dat {
			pins = <PINMUX_GPIO120__FUNC_GPIO120>;
			slew-rate = <1>;
			output-high; /*set high for speaker out*/
		};
	};
};
/* AUDIO end */

/* LCM GPIO Kernal Standardization start */
&pio {
	lcm_mode_default: lcm_mode_default {
		pins_cmd_dat {
			pins = <PINMUX_GPIO80__FUNC_GPIO80>;
		};
	};

	lcm_mode_00: lcm_mode@0 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO80__FUNC_GPIO80>;
		};
	};

	lcm_mode_01: lcm_mode@1 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO80__FUNC_I2S0_BCK>;
		};
	};

	lcm_mode_02: lcm_mode@2 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO80__FUNC_PCM1_CLK_1>;
		};
	};

	lcm_mode_03: lcm_mode@3 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO80__FUNC_I2S3_BCK>;
		};
	};

	lcm_mode_04: lcm_mode@4 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO80__FUNC_I2S1_BCK>;
		};
	};

	lcm_mode_05: lcm_mode@5 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO80__FUNC_PWM4>;
		};
	};

	lcm_mode_06: lcm_mode@6 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO80__FUNC_I2S2_BCK>;
		};
	};

	lcm_mode_07: lcm_mode@7 {
		pins_cmd_dat {
			pins = <PINMUX_GPIO80__FUNC_DBG_MON_A28>;
		};
	};
};

&lcm {
	gpio_lcm_pwr_en = <&pio 57 0>;
	gpio_lcm_rst_en = <&pio 146 0>;
	
	lcm_bl_gpio = <&pio 3 0>;
    lcm_bias_enp_gpio= <&pio 58 0>;
    lcm_id_gpio= <&pio 19 0>;
};

&lcm_mode {
	pinctrl-names = "default", "lcm_mode_00", "lcm_mode_01", "lcm_mode_02", "lcm_mode_03", "lcm_mode_04",
	 "lcm_mode_05", "lcm_mode_06", "lcm_mode_07";
	pinctrl-0 = <&lcm_mode_default>;
	pinctrl-1 = <&lcm_mode_00>;
	pinctrl-2 = <&lcm_mode_01>;
	pinctrl-3 = <&lcm_mode_02>;
	pinctrl-4 = <&lcm_mode_03>;
	pinctrl-5 = <&lcm_mode_04>;
	pinctrl-6 = <&lcm_mode_05>;
	pinctrl-7 = <&lcm_mode_06>;
	pinctrl-8 = <&lcm_mode_07>;
	lcm_power_gpio = <&pio 80 0>;
	lcm_bl_gpio = <&pio 129 0>;
	status = "okay";
};
/* LCM GPIO Kernal Standardization end */

/* i2c start */
&i2c3 {
	bq24296@6b {
		status = "okay";
		compatible = "bq24296";
		reg = <0x6b>;
	};
};

&i2c2 {
	tpa6130a2@60 {
		compatible = "ti,tpa6130a2";
		reg = <0x60>;
		power-gpio = <&pio 20 0>;
	};
};

&i2c2 {
	SAR@28 {
		compatible = "mediatek,SAR";
		reg = <0x28>;
	};
};

/* i2c end */