mt_pwm_prv.h 2.0 KB

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  1. /*******************************************************************************
  2. * mt6595_pwm.h PWM Drvier
  3. *
  4. * Copyright (c) 2010, Media Teck.inc
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public Licence,
  8. * version 2, as publish by the Free Software Foundation.
  9. *
  10. * This program is distributed and in hope it will be useful, but WITHOUT
  11. * ANY WARRNTY; without even the implied warranty of MERCHANTABITLITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. */
  16. #ifndef __MT_PWM_PRV_H__
  17. #define __MT_PWM_PRV_H__
  18. #ifdef CONFIG_OF
  19. extern void __iomem *pwm_base;
  20. /* unsigned int pwm_irqnr; */
  21. #undef PWM_BASE
  22. #define PWM_BASE pwm_base
  23. #endif
  24. /***********************************
  25. * PWM register address *
  26. ************************************/
  27. #define PWM_ENABLE (PWM_BASE+0x0000)
  28. #define PWM_3DLCM (PWM_BASE+0x1D0)
  29. #define PWM_3DLCM_ENABLE_OFFSET 0
  30. #define PWM_INT_ENABLE (PWM_BASE+0x0200)
  31. #define PWM_INT_STATUS (PWM_BASE+0x0204)
  32. #define PWM_INT_ACK (PWM_BASE+0x0208)
  33. #define PWM_EN_STATUS (PWM_BASE+0x020c)
  34. #define PWM_CK_26M_SEL (PWM_BASE+0x0210)
  35. #define PWM_CK_26M_SEL_OFFSET 0
  36. /*PWM1~PWM3 control registers*/
  37. #define PWM_CON_CLKDIV_MASK 0x00000007
  38. #define PWM_CON_CLKDIV_OFFSET 0
  39. #define PWM_CON_CLKSEL_MASK 0x00000008
  40. #define PWM_CON_CLKSEL_OFFSET 3
  41. #define PWM_CON_CLKSEL_OLD_MASK 0x00000010
  42. #define PWM_CON_CLKSEL_OLD_OFFSET 4
  43. #define PWM_CON_SRCSEL_MASK 0x00000020
  44. #define PWM_CON_SRCSEL_OFFSET 5
  45. #define PWM_CON_MODE_MASK 0x00000040
  46. #define PWM_CON_MODE_OFFSET 6
  47. #define PWM_CON_IDLE_VALUE_MASK 0x00000080
  48. #define PWM_CON_IDLE_VALUE_OFFSET 7
  49. #define PWM_CON_GUARD_VALUE_MASK 0x00000100
  50. #define PWM_CON_GUARD_VALUE_OFFSET 8
  51. #define PWM_CON_STOP_BITS_MASK 0x00007E00
  52. #define PWM_CON_STOP_BITS_OFFSET 9
  53. #define PWM_CON_OLD_MODE_MASK 0x00008000
  54. #define PWM_CON_OLD_MODE_OFFSET 15
  55. #define BLOCK_CLK (66UL*1000*1000)
  56. #define PWM_26M_CLK (26UL*1000*1000)
  57. #endif