am437x-sk-evm.dts 15 KB

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  1. /*
  2. * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /* AM437x SK EVM */
  9. /dts-v1/;
  10. #include "am4372.dtsi"
  11. #include <dt-bindings/pinctrl/am43xx.h>
  12. #include <dt-bindings/pwm/pwm.h>
  13. #include <dt-bindings/gpio/gpio.h>
  14. #include <dt-bindings/input/input.h>
  15. / {
  16. model = "TI AM437x SK EVM";
  17. compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
  18. aliases {
  19. display0 = &lcd0;
  20. };
  21. backlight {
  22. compatible = "pwm-backlight";
  23. pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
  24. brightness-levels = <0 51 53 56 62 75 101 152 255>;
  25. default-brightness-level = <8>;
  26. };
  27. sound {
  28. compatible = "ti,da830-evm-audio";
  29. ti,model = "AM437x-SK-EVM";
  30. ti,audio-codec = <&tlv320aic3106>;
  31. ti,mcasp-controller = <&mcasp1>;
  32. ti,codec-clock-rate = <24000000>;
  33. ti,audio-routing =
  34. "Headphone Jack", "HPLOUT",
  35. "Headphone Jack", "HPROUT";
  36. };
  37. matrix_keypad: matrix_keypad@0 {
  38. compatible = "gpio-matrix-keypad";
  39. pinctrl-names = "default";
  40. pinctrl-0 = <&matrix_keypad_pins>;
  41. debounce-delay-ms = <5>;
  42. col-scan-delay-us = <1500>;
  43. row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */
  44. &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */
  45. col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */
  46. &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */
  47. linux,keymap = <
  48. MATRIX_KEY(0, 0, KEY_DOWN)
  49. MATRIX_KEY(0, 1, KEY_RIGHT)
  50. MATRIX_KEY(1, 0, KEY_LEFT)
  51. MATRIX_KEY(1, 1, KEY_UP)
  52. >;
  53. };
  54. leds {
  55. compatible = "gpio-leds";
  56. pinctrl-names = "default";
  57. pinctrl-0 = <&leds_pins>;
  58. led@0 {
  59. label = "am437x-sk:red:heartbeat";
  60. gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
  61. linux,default-trigger = "heartbeat";
  62. default-state = "off";
  63. };
  64. led@1 {
  65. label = "am437x-sk:green:mmc1";
  66. gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
  67. linux,default-trigger = "mmc0";
  68. default-state = "off";
  69. };
  70. led@2 {
  71. label = "am437x-sk:blue:cpu0";
  72. gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
  73. linux,default-trigger = "cpu0";
  74. default-state = "off";
  75. };
  76. led@3 {
  77. label = "am437x-sk:blue:usr3";
  78. gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
  79. default-state = "off";
  80. };
  81. };
  82. lcd0: display {
  83. compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
  84. label = "lcd";
  85. pinctrl-names = "default";
  86. pinctrl-0 = <&lcd_pins>;
  87. enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
  88. panel-timing {
  89. clock-frequency = <9000000>;
  90. hactive = <480>;
  91. vactive = <272>;
  92. hfront-porch = <2>;
  93. hback-porch = <2>;
  94. hsync-len = <41>;
  95. vfront-porch = <2>;
  96. vback-porch = <2>;
  97. vsync-len = <10>;
  98. hsync-active = <0>;
  99. vsync-active = <0>;
  100. de-active = <1>;
  101. pixelclk-active = <1>;
  102. };
  103. port {
  104. lcd_in: endpoint {
  105. remote-endpoint = <&dpi_out>;
  106. };
  107. };
  108. };
  109. };
  110. &am43xx_pinmux {
  111. matrix_keypad_pins: matrix_keypad_pins {
  112. pinctrl-single,pins = <
  113. 0x24c (PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */
  114. 0x250 (PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */
  115. 0x254 (PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */
  116. 0x258 (PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */
  117. >;
  118. };
  119. leds_pins: leds_pins {
  120. pinctrl-single,pins = <
  121. 0x228 (PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */
  122. 0x22c (PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */
  123. 0x230 (PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */
  124. 0x234 (PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */
  125. >;
  126. };
  127. i2c0_pins: i2c0_pins {
  128. pinctrl-single,pins = <
  129. 0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
  130. 0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
  131. >;
  132. };
  133. i2c1_pins: i2c1_pins {
  134. pinctrl-single,pins = <
  135. 0x15c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
  136. 0x158 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
  137. >;
  138. };
  139. mmc1_pins: pinmux_mmc1_pins {
  140. pinctrl-single,pins = <
  141. 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
  142. >;
  143. };
  144. ecap0_pins: backlight_pins {
  145. pinctrl-single,pins = <
  146. 0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
  147. >;
  148. };
  149. edt_ft5306_ts_pins: edt_ft5306_ts_pins {
  150. pinctrl-single,pins = <
  151. 0x74 (PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
  152. 0x78 (PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
  153. >;
  154. };
  155. cpsw_default: cpsw_default {
  156. pinctrl-single,pins = <
  157. /* Slave 1 */
  158. 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
  159. 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
  160. 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
  161. 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
  162. 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
  163. 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
  164. 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
  165. 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
  166. 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
  167. 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
  168. 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
  169. 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
  170. /* Slave 2 */
  171. 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
  172. 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
  173. 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
  174. 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
  175. 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
  176. 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
  177. 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
  178. 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
  179. 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
  180. 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
  181. 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
  182. 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
  183. >;
  184. };
  185. cpsw_sleep: cpsw_sleep {
  186. pinctrl-single,pins = <
  187. /* Slave 1 reset value */
  188. 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  189. 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  190. 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  191. 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  192. 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  193. 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  194. 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  195. 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  196. 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  197. 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  198. 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  199. 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  200. /* Slave 2 reset value */
  201. 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  202. 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  203. 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  204. 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  205. 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  206. 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  207. 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  208. 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  209. 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  210. 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  211. 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  212. 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  213. >;
  214. };
  215. davinci_mdio_default: davinci_mdio_default {
  216. pinctrl-single,pins = <
  217. /* MDIO */
  218. 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
  219. 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
  220. >;
  221. };
  222. davinci_mdio_sleep: davinci_mdio_sleep {
  223. pinctrl-single,pins = <
  224. /* MDIO reset value */
  225. 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  226. 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  227. >;
  228. };
  229. dss_pins: dss_pins {
  230. pinctrl-single,pins = <
  231. 0x020 (PIN_OUTPUT_PULLUP | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
  232. 0x024 (PIN_OUTPUT_PULLUP | MUX_MODE1)
  233. 0x028 (PIN_OUTPUT_PULLUP | MUX_MODE1)
  234. 0x02c (PIN_OUTPUT_PULLUP | MUX_MODE1)
  235. 0x030 (PIN_OUTPUT_PULLUP | MUX_MODE1)
  236. 0x034 (PIN_OUTPUT_PULLUP | MUX_MODE1)
  237. 0x038 (PIN_OUTPUT_PULLUP | MUX_MODE1)
  238. 0x03c (PIN_OUTPUT_PULLUP | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
  239. 0x0a0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
  240. 0x0a4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
  241. 0x0a8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
  242. 0x0ac (PIN_OUTPUT_PULLUP | MUX_MODE0)
  243. 0x0b0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
  244. 0x0b4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
  245. 0x0b8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
  246. 0x0bc (PIN_OUTPUT_PULLUP | MUX_MODE0)
  247. 0x0c0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
  248. 0x0c4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
  249. 0x0c8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
  250. 0x0cc (PIN_OUTPUT_PULLUP | MUX_MODE0)
  251. 0x0d0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
  252. 0x0d4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
  253. 0x0d8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
  254. 0x0dc (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
  255. 0x0e0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
  256. 0x0e4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
  257. 0x0e8 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
  258. 0x0ec (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
  259. >;
  260. };
  261. qspi_pins: qspi_pins {
  262. pinctrl-single,pins = <
  263. 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */
  264. 0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
  265. 0x90 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
  266. 0x94 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
  267. 0x98 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */
  268. 0x9c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
  269. >;
  270. };
  271. mcasp1_pins: mcasp1_pins {
  272. pinctrl-single,pins = <
  273. 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
  274. 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
  275. 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
  276. 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
  277. >;
  278. };
  279. lcd_pins: lcd_pins {
  280. pinctrl-single,pins = <
  281. 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
  282. >;
  283. };
  284. };
  285. &i2c0 {
  286. status = "okay";
  287. pinctrl-names = "default";
  288. pinctrl-0 = <&i2c0_pins>;
  289. clock-frequency = <400000>;
  290. tps@24 {
  291. compatible = "ti,tps65218";
  292. reg = <0x24>;
  293. interrupt-parent = <&gic>;
  294. interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
  295. interrupt-controller;
  296. #interrupt-cells = <2>;
  297. dcdc1: regulator-dcdc1 {
  298. compatible = "ti,tps65218-dcdc1";
  299. /* VDD_CORE limits min of OPP50 and max of OPP100 */
  300. regulator-name = "vdd_core";
  301. regulator-min-microvolt = <912000>;
  302. regulator-max-microvolt = <1144000>;
  303. regulator-boot-on;
  304. regulator-always-on;
  305. };
  306. dcdc2: regulator-dcdc2 {
  307. compatible = "ti,tps65218-dcdc2";
  308. /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
  309. regulator-name = "vdd_mpu";
  310. regulator-min-microvolt = <912000>;
  311. regulator-max-microvolt = <1378000>;
  312. regulator-boot-on;
  313. regulator-always-on;
  314. };
  315. dcdc3: regulator-dcdc3 {
  316. compatible = "ti,tps65218-dcdc3";
  317. regulator-name = "vdds_ddr";
  318. regulator-min-microvolt = <1500000>;
  319. regulator-max-microvolt = <1500000>;
  320. regulator-boot-on;
  321. regulator-always-on;
  322. };
  323. dcdc4: regulator-dcdc4 {
  324. compatible = "ti,tps65218-dcdc4";
  325. regulator-name = "v3_3d";
  326. regulator-min-microvolt = <3300000>;
  327. regulator-max-microvolt = <3300000>;
  328. regulator-boot-on;
  329. regulator-always-on;
  330. };
  331. ldo1: regulator-ldo1 {
  332. compatible = "ti,tps65218-ldo1";
  333. regulator-name = "v1_8d";
  334. regulator-min-microvolt = <1800000>;
  335. regulator-max-microvolt = <1800000>;
  336. regulator-boot-on;
  337. regulator-always-on;
  338. };
  339. };
  340. at24@50 {
  341. compatible = "at24,24c256";
  342. pagesize = <64>;
  343. reg = <0x50>;
  344. };
  345. };
  346. &i2c1 {
  347. status = "okay";
  348. pinctrl-names = "default";
  349. pinctrl-0 = <&i2c1_pins>;
  350. clock-frequency = <400000>;
  351. edt-ft5306@38 {
  352. status = "okay";
  353. compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
  354. pinctrl-names = "default";
  355. pinctrl-0 = <&edt_ft5306_ts_pins>;
  356. reg = <0x38>;
  357. interrupt-parent = <&gpio0>;
  358. interrupts = <31 0>;
  359. wake-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
  360. touchscreen-size-x = <480>;
  361. touchscreen-size-y = <272>;
  362. };
  363. tlv320aic3106: tlv320aic3106@1b {
  364. compatible = "ti,tlv320aic3106";
  365. reg = <0x1b>;
  366. status = "okay";
  367. /* Regulators */
  368. AVDD-supply = <&dcdc4>;
  369. IOVDD-supply = <&dcdc4>;
  370. DRVDD-supply = <&dcdc4>;
  371. DVDD-supply = <&ldo1>;
  372. };
  373. lis331dlh@18 {
  374. compatible = "st,lis331dlh";
  375. reg = <0x18>;
  376. status = "okay";
  377. Vdd-supply = <&dcdc4>;
  378. Vdd_IO-supply = <&dcdc4>;
  379. interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
  380. };
  381. };
  382. &epwmss0 {
  383. status = "okay";
  384. };
  385. &ecap0 {
  386. status = "okay";
  387. pinctrl-names = "default";
  388. pinctrl-0 = <&ecap0_pins>;
  389. };
  390. &gpio0 {
  391. status = "okay";
  392. };
  393. &gpio1 {
  394. status = "okay";
  395. };
  396. &gpio5 {
  397. status = "okay";
  398. };
  399. &mmc1 {
  400. status = "okay";
  401. pinctrl-names = "default";
  402. pinctrl-0 = <&mmc1_pins>;
  403. vmmc-supply = <&dcdc4>;
  404. bus-width = <4>;
  405. cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
  406. };
  407. &usb2_phy1 {
  408. status = "okay";
  409. };
  410. &usb1 {
  411. dr_mode = "peripheral";
  412. status = "okay";
  413. };
  414. &usb2_phy2 {
  415. status = "okay";
  416. };
  417. &usb2 {
  418. dr_mode = "host";
  419. status = "okay";
  420. };
  421. &qspi {
  422. status = "okay";
  423. pinctrl-names = "default";
  424. pinctrl-0 = <&qspi_pins>;
  425. spi-max-frequency = <48000000>;
  426. m25p80@0 {
  427. compatible = "mx66l51235l";
  428. spi-max-frequency = <48000000>;
  429. reg = <0>;
  430. spi-cpol;
  431. spi-cpha;
  432. spi-tx-bus-width = <1>;
  433. spi-rx-bus-width = <4>;
  434. #address-cells = <1>;
  435. #size-cells = <1>;
  436. /* MTD partition table.
  437. * The ROM checks the first 512KiB
  438. * for a valid file to boot(XIP).
  439. */
  440. partition@0 {
  441. label = "QSPI.U_BOOT";
  442. reg = <0x00000000 0x000080000>;
  443. };
  444. partition@1 {
  445. label = "QSPI.U_BOOT.backup";
  446. reg = <0x00080000 0x00080000>;
  447. };
  448. partition@2 {
  449. label = "QSPI.U-BOOT-SPL_OS";
  450. reg = <0x00100000 0x00010000>;
  451. };
  452. partition@3 {
  453. label = "QSPI.U_BOOT_ENV";
  454. reg = <0x00110000 0x00010000>;
  455. };
  456. partition@4 {
  457. label = "QSPI.U-BOOT-ENV.backup";
  458. reg = <0x00120000 0x00010000>;
  459. };
  460. partition@5 {
  461. label = "QSPI.KERNEL";
  462. reg = <0x00130000 0x0800000>;
  463. };
  464. partition@6 {
  465. label = "QSPI.FILESYSTEM";
  466. reg = <0x00930000 0x36D0000>;
  467. };
  468. };
  469. };
  470. &mac {
  471. pinctrl-names = "default", "sleep";
  472. pinctrl-0 = <&cpsw_default>;
  473. pinctrl-1 = <&cpsw_sleep>;
  474. dual_emac = <1>;
  475. status = "okay";
  476. };
  477. &davinci_mdio {
  478. pinctrl-names = "default", "sleep";
  479. pinctrl-0 = <&davinci_mdio_default>;
  480. pinctrl-1 = <&davinci_mdio_sleep>;
  481. status = "okay";
  482. };
  483. &cpsw_emac0 {
  484. phy_id = <&davinci_mdio>, <4>;
  485. phy-mode = "rgmii";
  486. dual_emac_res_vlan = <1>;
  487. };
  488. &cpsw_emac1 {
  489. phy_id = <&davinci_mdio>, <5>;
  490. phy-mode = "rgmii";
  491. dual_emac_res_vlan = <2>;
  492. };
  493. &elm {
  494. status = "okay";
  495. };
  496. &mcasp1 {
  497. pinctrl-names = "default";
  498. pinctrl-0 = <&mcasp1_pins>;
  499. status = "okay";
  500. op-mode = <0>;
  501. tdm-slots = <2>;
  502. serial-dir = <
  503. 0 0 1 2
  504. >;
  505. tx-num-evt = <1>;
  506. rx-num-evt = <1>;
  507. };
  508. &dss {
  509. status = "okay";
  510. pinctrl-names = "default";
  511. pinctrl-0 = <&dss_pins>;
  512. port {
  513. dpi_out: endpoint@0 {
  514. remote-endpoint = <&lcd_in>;
  515. data-lines = <24>;
  516. };
  517. };
  518. };
  519. &rtc {
  520. status = "okay";
  521. };
  522. &wdt {
  523. status = "okay";
  524. };