bcm5301x.dtsi 2.1 KB

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  1. /*
  2. * Broadcom BCM470X / BCM5301X ARM platform code.
  3. * Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015,
  4. * BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs
  5. *
  6. * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
  7. *
  8. * Licensed under the GNU/GPL. See COPYING for details.
  9. */
  10. #include <dt-bindings/interrupt-controller/irq.h>
  11. #include <dt-bindings/interrupt-controller/arm-gic.h>
  12. #include "skeleton.dtsi"
  13. / {
  14. interrupt-parent = <&gic>;
  15. chipcommonA {
  16. compatible = "simple-bus";
  17. ranges = <0x00000000 0x18000000 0x00001000>;
  18. #address-cells = <1>;
  19. #size-cells = <1>;
  20. uart0: serial@0300 {
  21. compatible = "ns16550";
  22. reg = <0x0300 0x100>;
  23. interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
  24. clock-frequency = <100000000>;
  25. status = "disabled";
  26. };
  27. uart1: serial@0400 {
  28. compatible = "ns16550";
  29. reg = <0x0400 0x100>;
  30. interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
  31. clock-frequency = <100000000>;
  32. status = "disabled";
  33. };
  34. };
  35. mpcore {
  36. compatible = "simple-bus";
  37. ranges = <0x00000000 0x19020000 0x00003000>;
  38. #address-cells = <1>;
  39. #size-cells = <1>;
  40. scu@0000 {
  41. compatible = "arm,cortex-a9-scu";
  42. reg = <0x0000 0x100>;
  43. };
  44. timer@0200 {
  45. compatible = "arm,cortex-a9-global-timer";
  46. reg = <0x0200 0x100>;
  47. interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
  48. clocks = <&clk_periph>;
  49. };
  50. local-timer@0600 {
  51. compatible = "arm,cortex-a9-twd-timer";
  52. reg = <0x0600 0x100>;
  53. interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
  54. clocks = <&clk_periph>;
  55. };
  56. gic: interrupt-controller@1000 {
  57. compatible = "arm,cortex-a9-gic";
  58. #interrupt-cells = <3>;
  59. #address-cells = <0>;
  60. interrupt-controller;
  61. reg = <0x1000 0x1000>,
  62. <0x0100 0x100>;
  63. };
  64. L2: cache-controller@2000 {
  65. compatible = "arm,pl310-cache";
  66. reg = <0x2000 0x1000>;
  67. cache-unified;
  68. cache-level = <2>;
  69. };
  70. };
  71. clocks {
  72. #address-cells = <1>;
  73. #size-cells = <0>;
  74. /* As long as we do not have a real clock driver us this
  75. * fixed clock */
  76. clk_periph: periph {
  77. compatible = "fixed-clock";
  78. #clock-cells = <0>;
  79. clock-frequency = <400000000>;
  80. };
  81. };
  82. };