exynos5.dtsi 2.7 KB

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  1. /*
  2. * Samsung's Exynos5 SoC series common device tree source
  3. *
  4. * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * Samsung's Exynos5 SoC series device nodes are listed in this file. Particular
  8. * SoCs from Exynos5 series can include this file and provide values for SoCs
  9. * specfic bindings.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include "skeleton.dtsi"
  16. / {
  17. interrupt-parent = <&gic>;
  18. aliases {
  19. serial0 = &serial_0;
  20. serial1 = &serial_1;
  21. serial2 = &serial_2;
  22. serial3 = &serial_3;
  23. };
  24. chipid@10000000 {
  25. compatible = "samsung,exynos4210-chipid";
  26. reg = <0x10000000 0x100>;
  27. };
  28. combiner: interrupt-controller@10440000 {
  29. compatible = "samsung,exynos4210-combiner";
  30. #interrupt-cells = <2>;
  31. interrupt-controller;
  32. samsung,combiner-nr = <32>;
  33. reg = <0x10440000 0x1000>;
  34. interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
  35. <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
  36. <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
  37. <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
  38. <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
  39. <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
  40. <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
  41. <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
  42. };
  43. gic: interrupt-controller@10481000 {
  44. compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
  45. #interrupt-cells = <3>;
  46. interrupt-controller;
  47. reg = <0x10481000 0x1000>,
  48. <0x10482000 0x1000>,
  49. <0x10484000 0x2000>,
  50. <0x10486000 0x2000>;
  51. interrupts = <1 9 0xf04>;
  52. };
  53. serial_0: serial@12C00000 {
  54. compatible = "samsung,exynos4210-uart";
  55. reg = <0x12C00000 0x100>;
  56. interrupts = <0 51 0>;
  57. };
  58. serial_1: serial@12C10000 {
  59. compatible = "samsung,exynos4210-uart";
  60. reg = <0x12C10000 0x100>;
  61. interrupts = <0 52 0>;
  62. };
  63. serial_2: serial@12C20000 {
  64. compatible = "samsung,exynos4210-uart";
  65. reg = <0x12C20000 0x100>;
  66. interrupts = <0 53 0>;
  67. };
  68. serial_3: serial@12C30000 {
  69. compatible = "samsung,exynos4210-uart";
  70. reg = <0x12C30000 0x100>;
  71. interrupts = <0 54 0>;
  72. };
  73. rtc@101E0000 {
  74. compatible = "samsung,s3c6410-rtc";
  75. reg = <0x101E0000 0x100>;
  76. interrupts = <0 43 0>, <0 44 0>;
  77. status = "disabled";
  78. };
  79. fimd@14400000 {
  80. compatible = "samsung,exynos5250-fimd";
  81. interrupt-parent = <&combiner>;
  82. reg = <0x14400000 0x40000>;
  83. interrupt-names = "fifo", "vsync", "lcd_sys";
  84. interrupts = <18 4>, <18 5>, <18 6>;
  85. samsung,sysreg = <&sysreg_system_controller>;
  86. status = "disabled";
  87. };
  88. dp-controller@145B0000 {
  89. compatible = "samsung,exynos5-dp";
  90. reg = <0x145B0000 0x1000>;
  91. interrupts = <10 3>;
  92. interrupt-parent = <&combiner>;
  93. #address-cells = <1>;
  94. #size-cells = <0>;
  95. status = "disabled";
  96. };
  97. };