hi3620-hi4511.dts 19 KB

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  1. /*
  2. * Copyright (C) 2012-2013 Linaro Ltd.
  3. * Author: Haojian Zhuang <haojian.zhuang@linaro.org>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * publishhed by the Free Software Foundation.
  8. */
  9. /dts-v1/;
  10. #include "hi3620.dtsi"
  11. / {
  12. model = "Hisilicon Hi4511 Development Board";
  13. compatible = "hisilicon,hi3620-hi4511";
  14. chosen {
  15. bootargs = "console=ttyAMA0,115200 root=/dev/ram0 earlyprintk";
  16. };
  17. memory {
  18. device_type = "memory";
  19. reg = <0x40000000 0x20000000>;
  20. };
  21. amba {
  22. dual_timer0: dual_timer@800000 {
  23. status = "ok";
  24. };
  25. uart0: uart@b00000 { /* console */
  26. pinctrl-names = "default", "idle";
  27. pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
  28. pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>;
  29. status = "ok";
  30. };
  31. uart1: uart@b01000 { /* modem */
  32. pinctrl-names = "default", "idle";
  33. pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;
  34. pinctrl-1 = <&uart1_pmx_idle &uart1_cfg_idle>;
  35. status = "ok";
  36. };
  37. uart2: uart@b02000 { /* audience */
  38. pinctrl-names = "default", "idle";
  39. pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
  40. pinctrl-1 = <&uart2_pmx_idle &uart2_cfg_idle>;
  41. status = "ok";
  42. };
  43. uart3: uart@b03000 {
  44. pinctrl-names = "default", "idle";
  45. pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;
  46. pinctrl-1 = <&uart3_pmx_idle &uart3_cfg_idle>;
  47. status = "ok";
  48. };
  49. uart4: uart@b04000 {
  50. pinctrl-names = "default", "idle";
  51. pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;
  52. pinctrl-1 = <&uart4_pmx_idle &uart4_cfg_func>;
  53. status = "ok";
  54. };
  55. pmx0: pinmux@803000 {
  56. pinctrl-names = "default";
  57. pinctrl-0 = <&board_pmx_pins>;
  58. board_pmx_pins: board_pmx_pins {
  59. pinctrl-single,pins = <
  60. 0x008 0x0 /* GPIO -- eFUSE_DOUT */
  61. 0x100 0x0 /* USIM_CLK & USIM_DATA (IOMG63) */
  62. >;
  63. };
  64. uart0_pmx_func: uart0_pmx_func {
  65. pinctrl-single,pins = <
  66. 0x0f0 0x0
  67. 0x0f4 0x0 /* UART0_RX & UART0_TX */
  68. >;
  69. };
  70. uart0_pmx_idle: uart0_pmx_idle {
  71. pinctrl-single,pins = <
  72. /*0x0f0 0x1*/ /* UART0_CTS & UART0_RTS */
  73. 0x0f4 0x1 /* UART0_RX & UART0_TX */
  74. >;
  75. };
  76. uart1_pmx_func: uart1_pmx_func {
  77. pinctrl-single,pins = <
  78. 0x0f8 0x0 /* UART1_CTS & UART1_RTS (IOMG61) */
  79. 0x0fc 0x0 /* UART1_RX & UART1_TX (IOMG62) */
  80. >;
  81. };
  82. uart1_pmx_idle: uart1_pmx_idle {
  83. pinctrl-single,pins = <
  84. 0x0f8 0x1 /* GPIO (IOMG61) */
  85. 0x0fc 0x1 /* GPIO (IOMG62) */
  86. >;
  87. };
  88. uart2_pmx_func: uart2_pmx_func {
  89. pinctrl-single,pins = <
  90. 0x104 0x2 /* UART2_RXD (IOMG96) */
  91. 0x108 0x2 /* UART2_TXD (IOMG64) */
  92. >;
  93. };
  94. uart2_pmx_idle: uart2_pmx_idle {
  95. pinctrl-single,pins = <
  96. 0x104 0x1 /* GPIO (IOMG96) */
  97. 0x108 0x1 /* GPIO (IOMG64) */
  98. >;
  99. };
  100. uart3_pmx_func: uart3_pmx_func {
  101. pinctrl-single,pins = <
  102. 0x160 0x2 /* UART3_CTS & UART3_RTS (IOMG85) */
  103. 0x164 0x2 /* UART3_RXD & UART3_TXD (IOMG86) */
  104. >;
  105. };
  106. uart3_pmx_idle: uart3_pmx_idle {
  107. pinctrl-single,pins = <
  108. 0x160 0x1 /* GPIO (IOMG85) */
  109. 0x164 0x1 /* GPIO (IOMG86) */
  110. >;
  111. };
  112. uart4_pmx_func: uart4_pmx_func {
  113. pinctrl-single,pins = <
  114. 0x168 0x0 /* UART4_CTS & UART4_RTS (IOMG87) */
  115. 0x16c 0x0 /* UART4_RXD (IOMG88) */
  116. 0x170 0x0 /* UART4_TXD (IOMG93) */
  117. >;
  118. };
  119. uart4_pmx_idle: uart4_pmx_idle {
  120. pinctrl-single,pins = <
  121. 0x168 0x1 /* GPIO (IOMG87) */
  122. 0x16c 0x1 /* GPIO (IOMG88) */
  123. 0x170 0x1 /* GPIO (IOMG93) */
  124. >;
  125. };
  126. i2c0_pmx_func: i2c0_pmx_func {
  127. pinctrl-single,pins = <
  128. 0x0b4 0x0 /* I2C0_SCL & I2C0_SDA (IOMG45) */
  129. >;
  130. };
  131. i2c0_pmx_idle: i2c0_pmx_idle {
  132. pinctrl-single,pins = <
  133. 0x0b4 0x1 /* GPIO (IOMG45) */
  134. >;
  135. };
  136. i2c1_pmx_func: i2c1_pmx_func {
  137. pinctrl-single,pins = <
  138. 0x0b8 0x0 /* I2C1_SCL & I2C1_SDA (IOMG46) */
  139. >;
  140. };
  141. i2c1_pmx_idle: i2c1_pmx_idle {
  142. pinctrl-single,pins = <
  143. 0x0b8 0x1 /* GPIO (IOMG46) */
  144. >;
  145. };
  146. i2c2_pmx_func: i2c2_pmx_func {
  147. pinctrl-single,pins = <
  148. 0x068 0x0 /* I2C2_SCL (IOMG26) */
  149. 0x06c 0x0 /* I2C2_SDA (IOMG27) */
  150. >;
  151. };
  152. i2c2_pmx_idle: i2c2_pmx_idle {
  153. pinctrl-single,pins = <
  154. 0x068 0x1 /* GPIO (IOMG26) */
  155. 0x06c 0x1 /* GPIO (IOMG27) */
  156. >;
  157. };
  158. i2c3_pmx_func: i2c3_pmx_func {
  159. pinctrl-single,pins = <
  160. 0x050 0x2 /* I2C3_SCL (IOMG20) */
  161. 0x054 0x2 /* I2C3_SDA (IOMG21) */
  162. >;
  163. };
  164. i2c3_pmx_idle: i2c3_pmx_idle {
  165. pinctrl-single,pins = <
  166. 0x050 0x1 /* GPIO (IOMG20) */
  167. 0x054 0x1 /* GPIO (IOMG21) */
  168. >;
  169. };
  170. spi0_pmx_func: spi0_pmx_func {
  171. pinctrl-single,pins = <
  172. 0x0d4 0x0 /* SPI0_CLK/SPI0_DI/SPI0_DO (IOMG53) */
  173. 0x0d8 0x0 /* SPI0_CS0 (IOMG54) */
  174. 0x0dc 0x0 /* SPI0_CS1 (IOMG55) */
  175. 0x0e0 0x0 /* SPI0_CS2 (IOMG56) */
  176. 0x0e4 0x0 /* SPI0_CS3 (IOMG57) */
  177. >;
  178. };
  179. spi0_pmx_idle: spi0_pmx_idle {
  180. pinctrl-single,pins = <
  181. 0x0d4 0x1 /* GPIO (IOMG53) */
  182. 0x0d8 0x1 /* GPIO (IOMG54) */
  183. 0x0dc 0x1 /* GPIO (IOMG55) */
  184. 0x0e0 0x1 /* GPIO (IOMG56) */
  185. 0x0e4 0x1 /* GPIO (IOMG57) */
  186. >;
  187. };
  188. spi1_pmx_func: spi1_pmx_func {
  189. pinctrl-single,pins = <
  190. 0x184 0x0 /* SPI1_CLK/SPI1_DI (IOMG98) */
  191. 0x0e8 0x0 /* SPI1_DO (IOMG58) */
  192. 0x0ec 0x0 /* SPI1_CS (IOMG95) */
  193. >;
  194. };
  195. spi1_pmx_idle: spi1_pmx_idle {
  196. pinctrl-single,pins = <
  197. 0x184 0x1 /* GPIO (IOMG98) */
  198. 0x0e8 0x1 /* GPIO (IOMG58) */
  199. 0x0ec 0x1 /* GPIO (IOMG95) */
  200. >;
  201. };
  202. kpc_pmx_func: kpc_pmx_func {
  203. pinctrl-single,pins = <
  204. 0x12c 0x0 /* KEY_IN0 (IOMG73) */
  205. 0x130 0x0 /* KEY_IN1 (IOMG74) */
  206. 0x134 0x0 /* KEY_IN2 (IOMG75) */
  207. 0x10c 0x0 /* KEY_OUT0 (IOMG65) */
  208. 0x110 0x0 /* KEY_OUT1 (IOMG66) */
  209. 0x114 0x0 /* KEY_OUT2 (IOMG67) */
  210. >;
  211. };
  212. kpc_pmx_idle: kpc_pmx_idle {
  213. pinctrl-single,pins = <
  214. 0x12c 0x1 /* GPIO (IOMG73) */
  215. 0x130 0x1 /* GPIO (IOMG74) */
  216. 0x134 0x1 /* GPIO (IOMG75) */
  217. 0x10c 0x1 /* GPIO (IOMG65) */
  218. 0x110 0x1 /* GPIO (IOMG66) */
  219. 0x114 0x1 /* GPIO (IOMG67) */
  220. >;
  221. };
  222. gpio_key_func: gpio_key_func {
  223. pinctrl-single,pins = <
  224. 0x10c 0x1 /* KEY_OUT0/GPIO (IOMG65) */
  225. 0x130 0x1 /* KEY_IN1/GPIO (IOMG74) */
  226. >;
  227. };
  228. emmc_pmx_func: emmc_pmx_func {
  229. pinctrl-single,pins = <
  230. 0x030 0x2 /* eMMC_CMD/eMMC_CLK (IOMG12) */
  231. 0x018 0x0 /* NAND_CS3_N (IOMG6) */
  232. 0x024 0x0 /* NAND_BUSY2_N (IOMG8) */
  233. 0x028 0x0 /* NAND_BUSY3_N (IOMG9) */
  234. 0x02c 0x2 /* eMMC_DATA[0:7] (IOMG10) */
  235. >;
  236. };
  237. emmc_pmx_idle: emmc_pmx_idle {
  238. pinctrl-single,pins = <
  239. 0x030 0x0 /* GPIO (IOMG12) */
  240. 0x018 0x1 /* GPIO (IOMG6) */
  241. 0x024 0x1 /* GPIO (IOMG8) */
  242. 0x028 0x1 /* GPIO (IOMG9) */
  243. 0x02c 0x1 /* GPIO (IOMG10) */
  244. >;
  245. };
  246. sd_pmx_func: sd_pmx_func {
  247. pinctrl-single,pins = <
  248. 0x0bc 0x0 /* SD_CLK/SD_CMD/SD_DATA0/SD_DATA1/SD_DATA2 (IOMG47) */
  249. 0x0c0 0x0 /* SD_DATA3 (IOMG48) */
  250. >;
  251. };
  252. sd_pmx_idle: sd_pmx_idle {
  253. pinctrl-single,pins = <
  254. 0x0bc 0x1 /* GPIO (IOMG47) */
  255. 0x0c0 0x1 /* GPIO (IOMG48) */
  256. >;
  257. };
  258. nand_pmx_func: nand_pmx_func {
  259. pinctrl-single,pins = <
  260. 0x00c 0x0 /* NAND_ALE/NAND_CLE/.../NAND_DATA[0:7] (IOMG3) */
  261. 0x010 0x0 /* NAND_CS1_N (IOMG4) */
  262. 0x014 0x0 /* NAND_CS2_N (IOMG5) */
  263. 0x018 0x0 /* NAND_CS3_N (IOMG6) */
  264. 0x01c 0x0 /* NAND_BUSY0_N (IOMG94) */
  265. 0x020 0x0 /* NAND_BUSY1_N (IOMG7) */
  266. 0x024 0x0 /* NAND_BUSY2_N (IOMG8) */
  267. 0x028 0x0 /* NAND_BUSY3_N (IOMG9) */
  268. 0x02c 0x0 /* NAND_DATA[8:15] (IOMG10) */
  269. >;
  270. };
  271. nand_pmx_idle: nand_pmx_idle {
  272. pinctrl-single,pins = <
  273. 0x00c 0x1 /* GPIO (IOMG3) */
  274. 0x010 0x1 /* GPIO (IOMG4) */
  275. 0x014 0x1 /* GPIO (IOMG5) */
  276. 0x018 0x1 /* GPIO (IOMG6) */
  277. 0x01c 0x1 /* GPIO (IOMG94) */
  278. 0x020 0x1 /* GPIO (IOMG7) */
  279. 0x024 0x1 /* GPIO (IOMG8) */
  280. 0x028 0x1 /* GPIO (IOMG9) */
  281. 0x02c 0x1 /* GPIO (IOMG10) */
  282. >;
  283. };
  284. sdio_pmx_func: sdio_pmx_func {
  285. pinctrl-single,pins = <
  286. 0x0c4 0x0 /* SDIO_CLK/SDIO_CMD/SDIO_DATA[0:3] (IOMG49) */
  287. >;
  288. };
  289. sdio_pmx_idle: sdio_pmx_idle {
  290. pinctrl-single,pins = <
  291. 0x0c4 0x1 /* GPIO (IOMG49) */
  292. >;
  293. };
  294. audio_out_pmx_func: audio_out_pmx_func {
  295. pinctrl-single,pins = <
  296. 0x0f0 0x1 /* GPIO (IOMG59), audio spk & earphone */
  297. >;
  298. };
  299. };
  300. pmx1: pinmux@803800 {
  301. pinctrl-names = "default";
  302. pinctrl-0 = < &board_pu_pins &board_pd_pins &board_pd_ps_pins
  303. &board_np_pins &board_ps_pins &kpc_cfg_func
  304. &audio_out_cfg_func>;
  305. board_pu_pins: board_pu_pins {
  306. pinctrl-single,pins = <
  307. 0x014 0 /* GPIO_158 (IOCFG2) */
  308. 0x018 0 /* GPIO_159 (IOCFG3) */
  309. 0x01c 0 /* BOOT_MODE0 (IOCFG4) */
  310. 0x020 0 /* BOOT_MODE1 (IOCFG5) */
  311. >;
  312. pinctrl-single,bias-pulldown = <0 2 0 2>;
  313. pinctrl-single,bias-pullup = <1 1 0 1>;
  314. };
  315. board_pd_pins: board_pd_pins {
  316. pinctrl-single,pins = <
  317. 0x038 0 /* eFUSE_DOUT (IOCFG11) */
  318. 0x150 0 /* ISP_GPIO8 (IOCFG93) */
  319. 0x154 0 /* ISP_GPIO9 (IOCFG94) */
  320. >;
  321. pinctrl-single,bias-pulldown = <2 2 0 2>;
  322. pinctrl-single,bias-pullup = <0 1 0 1>;
  323. };
  324. board_pd_ps_pins: board_pd_ps_pins {
  325. pinctrl-single,pins = <
  326. 0x2d8 0 /* CLK_OUT0 (IOCFG190) */
  327. 0x004 0 /* PMU_SPI_DATA (IOCFG192) */
  328. >;
  329. pinctrl-single,bias-pulldown = <2 2 0 2>;
  330. pinctrl-single,bias-pullup = <0 1 0 1>;
  331. pinctrl-single,drive-strength = <0x30 0xf0>;
  332. };
  333. board_np_pins: board_np_pins {
  334. pinctrl-single,pins = <
  335. 0x24c 0 /* KEYPAD_OUT7 (IOCFG155) */
  336. >;
  337. pinctrl-single,bias-pulldown = <0 2 0 2>;
  338. pinctrl-single,bias-pullup = <0 1 0 1>;
  339. };
  340. board_ps_pins: board_ps_pins {
  341. pinctrl-single,pins = <
  342. 0x000 0 /* PMU_SPI_CLK (IOCFG191) */
  343. 0x008 0 /* PMU_SPI_CS_N (IOCFG193) */
  344. >;
  345. pinctrl-single,drive-strength = <0x30 0xf0>;
  346. };
  347. uart0_cfg_func: uart0_cfg_func {
  348. pinctrl-single,pins = <
  349. 0x208 0 /* UART0_RXD (IOCFG138) */
  350. 0x20c 0 /* UART0_TXD (IOCFG139) */
  351. >;
  352. pinctrl-single,bias-pulldown = <0 2 0 2>;
  353. pinctrl-single,bias-pullup = <0 1 0 1>;
  354. };
  355. uart0_cfg_idle: uart0_cfg_idle {
  356. pinctrl-single,pins = <
  357. 0x208 0 /* UART0_RXD (IOCFG138) */
  358. 0x20c 0 /* UART0_TXD (IOCFG139) */
  359. >;
  360. pinctrl-single,bias-pulldown = <2 2 0 2>;
  361. pinctrl-single,bias-pullup = <0 1 0 1>;
  362. };
  363. uart1_cfg_func: uart1_cfg_func {
  364. pinctrl-single,pins = <
  365. 0x210 0 /* UART1_CTS (IOCFG140) */
  366. 0x214 0 /* UART1_RTS (IOCFG141) */
  367. 0x218 0 /* UART1_RXD (IOCFG142) */
  368. 0x21c 0 /* UART1_TXD (IOCFG143) */
  369. >;
  370. pinctrl-single,bias-pulldown = <0 2 0 2>;
  371. pinctrl-single,bias-pullup = <0 1 0 1>;
  372. };
  373. uart1_cfg_idle: uart1_cfg_idle {
  374. pinctrl-single,pins = <
  375. 0x210 0 /* UART1_CTS (IOCFG140) */
  376. 0x214 0 /* UART1_RTS (IOCFG141) */
  377. 0x218 0 /* UART1_RXD (IOCFG142) */
  378. 0x21c 0 /* UART1_TXD (IOCFG143) */
  379. >;
  380. pinctrl-single,bias-pulldown = <2 2 0 2>;
  381. pinctrl-single,bias-pullup = <0 1 0 1>;
  382. };
  383. uart2_cfg_func: uart2_cfg_func {
  384. pinctrl-single,pins = <
  385. 0x220 0 /* UART2_CTS (IOCFG144) */
  386. 0x224 0 /* UART2_RTS (IOCFG145) */
  387. 0x228 0 /* UART2_RXD (IOCFG146) */
  388. 0x22c 0 /* UART2_TXD (IOCFG147) */
  389. >;
  390. pinctrl-single,bias-pulldown = <0 2 0 2>;
  391. pinctrl-single,bias-pullup = <0 1 0 1>;
  392. };
  393. uart2_cfg_idle: uart2_cfg_idle {
  394. pinctrl-single,pins = <
  395. 0x220 0 /* GPIO (IOCFG144) */
  396. 0x224 0 /* GPIO (IOCFG145) */
  397. 0x228 0 /* GPIO (IOCFG146) */
  398. 0x22c 0 /* GPIO (IOCFG147) */
  399. >;
  400. pinctrl-single,bias-pulldown = <2 2 0 2>;
  401. pinctrl-single,bias-pullup = <0 1 0 1>;
  402. };
  403. uart3_cfg_func: uart3_cfg_func {
  404. pinctrl-single,pins = <
  405. 0x294 0 /* UART3_CTS (IOCFG173) */
  406. 0x298 0 /* UART3_RTS (IOCFG174) */
  407. 0x29c 0 /* UART3_RXD (IOCFG175) */
  408. 0x2a0 0 /* UART3_TXD (IOCFG176) */
  409. >;
  410. pinctrl-single,bias-pulldown = <0 2 0 2>;
  411. pinctrl-single,bias-pullup = <0 1 0 1>;
  412. };
  413. uart3_cfg_idle: uart3_cfg_idle {
  414. pinctrl-single,pins = <
  415. 0x294 0 /* UART3_CTS (IOCFG173) */
  416. 0x298 0 /* UART3_RTS (IOCFG174) */
  417. 0x29c 0 /* UART3_RXD (IOCFG175) */
  418. 0x2a0 0 /* UART3_TXD (IOCFG176) */
  419. >;
  420. pinctrl-single,bias-pulldown = <2 2 0 2>;
  421. pinctrl-single,bias-pullup = <0 1 0 1>;
  422. };
  423. uart4_cfg_func: uart4_cfg_func {
  424. pinctrl-single,pins = <
  425. 0x2a4 0 /* UART4_CTS (IOCFG177) */
  426. 0x2a8 0 /* UART4_RTS (IOCFG178) */
  427. 0x2ac 0 /* UART4_RXD (IOCFG179) */
  428. 0x2b0 0 /* UART4_TXD (IOCFG180) */
  429. >;
  430. pinctrl-single,bias-pulldown = <0 2 0 2>;
  431. pinctrl-single,bias-pullup = <0 1 0 1>;
  432. };
  433. i2c0_cfg_func: i2c0_cfg_func {
  434. pinctrl-single,pins = <
  435. 0x17c 0 /* I2C0_SCL (IOCFG103) */
  436. 0x180 0 /* I2C0_SDA (IOCFG104) */
  437. >;
  438. pinctrl-single,bias-pulldown = <0 2 0 2>;
  439. pinctrl-single,bias-pullup = <0 1 0 1>;
  440. pinctrl-single,drive-strength = <0x30 0xf0>;
  441. };
  442. i2c1_cfg_func: i2c1_cfg_func {
  443. pinctrl-single,pins = <
  444. 0x184 0 /* I2C1_SCL (IOCFG105) */
  445. 0x188 0 /* I2C1_SDA (IOCFG106) */
  446. >;
  447. pinctrl-single,bias-pulldown = <0 2 0 2>;
  448. pinctrl-single,bias-pullup = <0 1 0 1>;
  449. pinctrl-single,drive-strength = <0x30 0xf0>;
  450. };
  451. i2c2_cfg_func: i2c2_cfg_func {
  452. pinctrl-single,pins = <
  453. 0x118 0 /* I2C2_SCL (IOCFG79) */
  454. 0x11c 0 /* I2C2_SDA (IOCFG80) */
  455. >;
  456. pinctrl-single,bias-pulldown = <0 2 0 2>;
  457. pinctrl-single,bias-pullup = <0 1 0 1>;
  458. pinctrl-single,drive-strength = <0x30 0xf0>;
  459. };
  460. i2c3_cfg_func: i2c3_cfg_func {
  461. pinctrl-single,pins = <
  462. 0x100 0 /* I2C3_SCL (IOCFG73) */
  463. 0x104 0 /* I2C3_SDA (IOCFG74) */
  464. >;
  465. pinctrl-single,bias-pulldown = <0 2 0 2>;
  466. pinctrl-single,bias-pullup = <0 1 0 1>;
  467. pinctrl-single,drive-strength = <0x30 0xf0>;
  468. };
  469. spi0_cfg_func1: spi0_cfg_func1 {
  470. pinctrl-single,pins = <
  471. 0x1d4 0 /* SPI0_CLK (IOCFG125) */
  472. 0x1d8 0 /* SPI0_DI (IOCFG126) */
  473. 0x1dc 0 /* SPI0_DO (IOCFG127) */
  474. >;
  475. pinctrl-single,bias-pulldown = <2 2 0 2>;
  476. pinctrl-single,bias-pullup = <0 1 0 1>;
  477. pinctrl-single,drive-strength = <0x30 0xf0>;
  478. };
  479. spi0_cfg_func2: spi0_cfg_func2 {
  480. pinctrl-single,pins = <
  481. 0x1e0 0 /* SPI0_CS0 (IOCFG128) */
  482. 0x1e4 0 /* SPI0_CS1 (IOCFG129) */
  483. 0x1e8 0 /* SPI0_CS2 (IOCFG130 */
  484. 0x1ec 0 /* SPI0_CS3 (IOCFG131) */
  485. >;
  486. pinctrl-single,bias-pulldown = <0 2 0 2>;
  487. pinctrl-single,bias-pullup = <1 1 0 1>;
  488. pinctrl-single,drive-strength = <0x30 0xf0>;
  489. };
  490. spi1_cfg_func1: spi1_cfg_func1 {
  491. pinctrl-single,pins = <
  492. 0x1f0 0 /* SPI1_CLK (IOCFG132) */
  493. 0x1f4 0 /* SPI1_DI (IOCFG133) */
  494. 0x1f8 0 /* SPI1_DO (IOCFG134) */
  495. >;
  496. pinctrl-single,bias-pulldown = <2 2 0 2>;
  497. pinctrl-single,bias-pullup = <0 1 0 1>;
  498. pinctrl-single,drive-strength = <0x30 0xf0>;
  499. };
  500. spi1_cfg_func2: spi1_cfg_func2 {
  501. pinctrl-single,pins = <
  502. 0x1fc 0 /* SPI1_CS (IOCFG135) */
  503. >;
  504. pinctrl-single,bias-pulldown = <0 2 0 2>;
  505. pinctrl-single,bias-pullup = <1 1 0 1>;
  506. pinctrl-single,drive-strength = <0x30 0xf0>;
  507. };
  508. kpc_cfg_func: kpc_cfg_func {
  509. pinctrl-single,pins = <
  510. 0x250 0 /* KEY_IN0 (IOCFG156) */
  511. 0x254 0 /* KEY_IN1 (IOCFG157) */
  512. 0x258 0 /* KEY_IN2 (IOCFG158) */
  513. 0x230 0 /* KEY_OUT0 (IOCFG148) */
  514. 0x234 0 /* KEY_OUT1 (IOCFG149) */
  515. 0x238 0 /* KEY_OUT2 (IOCFG150) */
  516. >;
  517. pinctrl-single,bias-pulldown = <2 2 0 2>;
  518. pinctrl-single,bias-pullup = <0 1 0 1>;
  519. };
  520. emmc_cfg_func: emmc_cfg_func {
  521. pinctrl-single,pins = <
  522. 0x0ac 0 /* eMMC_CMD (IOCFG40) */
  523. 0x0b0 0 /* eMMC_CLK (IOCFG41) */
  524. 0x058 0 /* NAND_CS3_N (IOCFG19) */
  525. 0x064 0 /* NAND_BUSY2_N (IOCFG22) */
  526. 0x068 0 /* NAND_BUSY3_N (IOCFG23) */
  527. 0x08c 0 /* NAND_DATA8 (IOCFG32) */
  528. 0x090 0 /* NAND_DATA9 (IOCFG33) */
  529. 0x094 0 /* NAND_DATA10 (IOCFG34) */
  530. 0x098 0 /* NAND_DATA11 (IOCFG35) */
  531. 0x09c 0 /* NAND_DATA12 (IOCFG36) */
  532. 0x0a0 0 /* NAND_DATA13 (IOCFG37) */
  533. 0x0a4 0 /* NAND_DATA14 (IOCFG38) */
  534. 0x0a8 0 /* NAND_DATA15 (IOCFG39) */
  535. >;
  536. pinctrl-single,bias-pulldown = <0 2 0 2>;
  537. pinctrl-single,bias-pullup = <1 1 0 1>;
  538. pinctrl-single,drive-strength = <0x30 0xf0>;
  539. };
  540. sd_cfg_func1: sd_cfg_func1 {
  541. pinctrl-single,pins = <
  542. 0x18c 0 /* SD_CLK (IOCFG107) */
  543. 0x190 0 /* SD_CMD (IOCFG108) */
  544. >;
  545. pinctrl-single,bias-pulldown = <2 2 0 2>;
  546. pinctrl-single,bias-pullup = <0 1 0 1>;
  547. pinctrl-single,drive-strength = <0x30 0xf0>;
  548. };
  549. sd_cfg_func2: sd_cfg_func2 {
  550. pinctrl-single,pins = <
  551. 0x194 0 /* SD_DATA0 (IOCFG109) */
  552. 0x198 0 /* SD_DATA1 (IOCFG110) */
  553. 0x19c 0 /* SD_DATA2 (IOCFG111) */
  554. 0x1a0 0 /* SD_DATA3 (IOCFG112) */
  555. >;
  556. pinctrl-single,bias-pulldown = <2 2 0 2>;
  557. pinctrl-single,bias-pullup = <0 1 0 1>;
  558. pinctrl-single,drive-strength = <0x70 0xf0>;
  559. };
  560. nand_cfg_func1: nand_cfg_func1 {
  561. pinctrl-single,pins = <
  562. 0x03c 0 /* NAND_ALE (IOCFG12) */
  563. 0x040 0 /* NAND_CLE (IOCFG13) */
  564. 0x06c 0 /* NAND_DATA0 (IOCFG24) */
  565. 0x070 0 /* NAND_DATA1 (IOCFG25) */
  566. 0x074 0 /* NAND_DATA2 (IOCFG26) */
  567. 0x078 0 /* NAND_DATA3 (IOCFG27) */
  568. 0x07c 0 /* NAND_DATA4 (IOCFG28) */
  569. 0x080 0 /* NAND_DATA5 (IOCFG29) */
  570. 0x084 0 /* NAND_DATA6 (IOCFG30) */
  571. 0x088 0 /* NAND_DATA7 (IOCFG31) */
  572. 0x08c 0 /* NAND_DATA8 (IOCFG32) */
  573. 0x090 0 /* NAND_DATA9 (IOCFG33) */
  574. 0x094 0 /* NAND_DATA10 (IOCFG34) */
  575. 0x098 0 /* NAND_DATA11 (IOCFG35) */
  576. 0x09c 0 /* NAND_DATA12 (IOCFG36) */
  577. 0x0a0 0 /* NAND_DATA13 (IOCFG37) */
  578. 0x0a4 0 /* NAND_DATA14 (IOCFG38) */
  579. 0x0a8 0 /* NAND_DATA15 (IOCFG39) */
  580. >;
  581. pinctrl-single,bias-pulldown = <2 2 0 2>;
  582. pinctrl-single,bias-pullup = <0 1 0 1>;
  583. pinctrl-single,drive-strength = <0x30 0xf0>;
  584. };
  585. nand_cfg_func2: nand_cfg_func2 {
  586. pinctrl-single,pins = <
  587. 0x044 0 /* NAND_RE_N (IOCFG14) */
  588. 0x048 0 /* NAND_WE_N (IOCFG15) */
  589. 0x04c 0 /* NAND_CS0_N (IOCFG16) */
  590. 0x050 0 /* NAND_CS1_N (IOCFG17) */
  591. 0x054 0 /* NAND_CS2_N (IOCFG18) */
  592. 0x058 0 /* NAND_CS3_N (IOCFG19) */
  593. 0x05c 0 /* NAND_BUSY0_N (IOCFG20) */
  594. 0x060 0 /* NAND_BUSY1_N (IOCFG21) */
  595. 0x064 0 /* NAND_BUSY2_N (IOCFG22) */
  596. 0x068 0 /* NAND_BUSY3_N (IOCFG23) */
  597. >;
  598. pinctrl-single,bias-pulldown = <0 2 0 2>;
  599. pinctrl-single,bias-pullup = <1 1 0 1>;
  600. pinctrl-single,drive-strength = <0x30 0xf0>;
  601. };
  602. sdio_cfg_func: sdio_cfg_func {
  603. pinctrl-single,pins = <
  604. 0x1a4 0 /* SDIO0_CLK (IOCG113) */
  605. 0x1a8 0 /* SDIO0_CMD (IOCG114) */
  606. 0x1ac 0 /* SDIO0_DATA0 (IOCG115) */
  607. 0x1b0 0 /* SDIO0_DATA1 (IOCG116) */
  608. 0x1b4 0 /* SDIO0_DATA2 (IOCG117) */
  609. 0x1b8 0 /* SDIO0_DATA3 (IOCG118) */
  610. >;
  611. pinctrl-single,bias-pulldown = <2 2 0 2>;
  612. pinctrl-single,bias-pullup = <0 1 0 1>;
  613. pinctrl-single,drive-strength = <0x30 0xf0>;
  614. };
  615. audio_out_cfg_func: audio_out_cfg_func {
  616. pinctrl-single,pins = <
  617. 0x200 0 /* GPIO (IOCFG136) */
  618. 0x204 0 /* GPIO (IOCFG137) */
  619. >;
  620. pinctrl-single,bias-pulldown = <2 2 0 2>;
  621. pinctrl-single,bias-pullup = <0 1 0 1>;
  622. };
  623. };
  624. };
  625. gpio-keys {
  626. compatible = "gpio-keys";
  627. call {
  628. label = "call";
  629. gpios = <&gpio17 2 0>;
  630. linux,code = <169>; /* KEY_PHONE */
  631. };
  632. };
  633. };