imx23.dtsi 12 KB

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  1. /*
  2. * Copyright 2012 Freescale Semiconductor, Inc.
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. #include "skeleton.dtsi"
  12. #include "imx23-pinfunc.h"
  13. / {
  14. interrupt-parent = <&icoll>;
  15. aliases {
  16. gpio0 = &gpio0;
  17. gpio1 = &gpio1;
  18. gpio2 = &gpio2;
  19. serial0 = &auart0;
  20. serial1 = &auart1;
  21. spi0 = &ssp0;
  22. spi1 = &ssp1;
  23. usbphy0 = &usbphy0;
  24. };
  25. cpus {
  26. #address-cells = <0>;
  27. #size-cells = <0>;
  28. cpu {
  29. compatible = "arm,arm926ej-s";
  30. device_type = "cpu";
  31. };
  32. };
  33. apb@80000000 {
  34. compatible = "simple-bus";
  35. #address-cells = <1>;
  36. #size-cells = <1>;
  37. reg = <0x80000000 0x80000>;
  38. ranges;
  39. apbh@80000000 {
  40. compatible = "simple-bus";
  41. #address-cells = <1>;
  42. #size-cells = <1>;
  43. reg = <0x80000000 0x40000>;
  44. ranges;
  45. icoll: interrupt-controller@80000000 {
  46. compatible = "fsl,imx23-icoll", "fsl,icoll";
  47. interrupt-controller;
  48. #interrupt-cells = <1>;
  49. reg = <0x80000000 0x2000>;
  50. };
  51. dma_apbh: dma-apbh@80004000 {
  52. compatible = "fsl,imx23-dma-apbh";
  53. reg = <0x80004000 0x2000>;
  54. interrupts = <0 14 20 0
  55. 13 13 13 13>;
  56. interrupt-names = "empty", "ssp0", "ssp1", "empty",
  57. "gpmi0", "gpmi1", "gpmi2", "gpmi3";
  58. #dma-cells = <1>;
  59. dma-channels = <8>;
  60. clocks = <&clks 15>;
  61. };
  62. ecc@80008000 {
  63. reg = <0x80008000 0x2000>;
  64. status = "disabled";
  65. };
  66. gpmi-nand@8000c000 {
  67. compatible = "fsl,imx23-gpmi-nand";
  68. #address-cells = <1>;
  69. #size-cells = <1>;
  70. reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
  71. reg-names = "gpmi-nand", "bch";
  72. interrupts = <56>;
  73. interrupt-names = "bch";
  74. clocks = <&clks 34>;
  75. clock-names = "gpmi_io";
  76. dmas = <&dma_apbh 4>;
  77. dma-names = "rx-tx";
  78. status = "disabled";
  79. };
  80. ssp0: ssp@80010000 {
  81. reg = <0x80010000 0x2000>;
  82. interrupts = <15>;
  83. clocks = <&clks 33>;
  84. dmas = <&dma_apbh 1>;
  85. dma-names = "rx-tx";
  86. status = "disabled";
  87. };
  88. etm@80014000 {
  89. reg = <0x80014000 0x2000>;
  90. status = "disabled";
  91. };
  92. pinctrl@80018000 {
  93. #address-cells = <1>;
  94. #size-cells = <0>;
  95. compatible = "fsl,imx23-pinctrl", "simple-bus";
  96. reg = <0x80018000 0x2000>;
  97. gpio0: gpio@0 {
  98. compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
  99. interrupts = <16>;
  100. gpio-controller;
  101. #gpio-cells = <2>;
  102. interrupt-controller;
  103. #interrupt-cells = <2>;
  104. };
  105. gpio1: gpio@1 {
  106. compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
  107. interrupts = <17>;
  108. gpio-controller;
  109. #gpio-cells = <2>;
  110. interrupt-controller;
  111. #interrupt-cells = <2>;
  112. };
  113. gpio2: gpio@2 {
  114. compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
  115. interrupts = <18>;
  116. gpio-controller;
  117. #gpio-cells = <2>;
  118. interrupt-controller;
  119. #interrupt-cells = <2>;
  120. };
  121. duart_pins_a: duart@0 {
  122. reg = <0>;
  123. fsl,pinmux-ids = <
  124. MX23_PAD_PWM0__DUART_RX
  125. MX23_PAD_PWM1__DUART_TX
  126. >;
  127. fsl,drive-strength = <MXS_DRIVE_4mA>;
  128. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  129. fsl,pull-up = <MXS_PULL_DISABLE>;
  130. };
  131. auart0_pins_a: auart0@0 {
  132. reg = <0>;
  133. fsl,pinmux-ids = <
  134. MX23_PAD_AUART1_RX__AUART1_RX
  135. MX23_PAD_AUART1_TX__AUART1_TX
  136. MX23_PAD_AUART1_CTS__AUART1_CTS
  137. MX23_PAD_AUART1_RTS__AUART1_RTS
  138. >;
  139. fsl,drive-strength = <MXS_DRIVE_4mA>;
  140. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  141. fsl,pull-up = <MXS_PULL_DISABLE>;
  142. };
  143. auart0_2pins_a: auart0-2pins@0 {
  144. reg = <0>;
  145. fsl,pinmux-ids = <
  146. MX23_PAD_I2C_SCL__AUART1_TX
  147. MX23_PAD_I2C_SDA__AUART1_RX
  148. >;
  149. fsl,drive-strength = <MXS_DRIVE_4mA>;
  150. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  151. fsl,pull-up = <MXS_PULL_DISABLE>;
  152. };
  153. gpmi_pins_a: gpmi-nand@0 {
  154. reg = <0>;
  155. fsl,pinmux-ids = <
  156. MX23_PAD_GPMI_D00__GPMI_D00
  157. MX23_PAD_GPMI_D01__GPMI_D01
  158. MX23_PAD_GPMI_D02__GPMI_D02
  159. MX23_PAD_GPMI_D03__GPMI_D03
  160. MX23_PAD_GPMI_D04__GPMI_D04
  161. MX23_PAD_GPMI_D05__GPMI_D05
  162. MX23_PAD_GPMI_D06__GPMI_D06
  163. MX23_PAD_GPMI_D07__GPMI_D07
  164. MX23_PAD_GPMI_CLE__GPMI_CLE
  165. MX23_PAD_GPMI_ALE__GPMI_ALE
  166. MX23_PAD_GPMI_RDY0__GPMI_RDY0
  167. MX23_PAD_GPMI_RDY1__GPMI_RDY1
  168. MX23_PAD_GPMI_WPN__GPMI_WPN
  169. MX23_PAD_GPMI_WRN__GPMI_WRN
  170. MX23_PAD_GPMI_RDN__GPMI_RDN
  171. MX23_PAD_GPMI_CE1N__GPMI_CE1N
  172. MX23_PAD_GPMI_CE0N__GPMI_CE0N
  173. >;
  174. fsl,drive-strength = <MXS_DRIVE_4mA>;
  175. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  176. fsl,pull-up = <MXS_PULL_DISABLE>;
  177. };
  178. gpmi_pins_fixup: gpmi-pins-fixup {
  179. fsl,pinmux-ids = <
  180. MX23_PAD_GPMI_WPN__GPMI_WPN
  181. MX23_PAD_GPMI_WRN__GPMI_WRN
  182. MX23_PAD_GPMI_RDN__GPMI_RDN
  183. >;
  184. fsl,drive-strength = <MXS_DRIVE_12mA>;
  185. };
  186. mmc0_4bit_pins_a: mmc0-4bit@0 {
  187. reg = <0>;
  188. fsl,pinmux-ids = <
  189. MX23_PAD_SSP1_DATA0__SSP1_DATA0
  190. MX23_PAD_SSP1_DATA1__SSP1_DATA1
  191. MX23_PAD_SSP1_DATA2__SSP1_DATA2
  192. MX23_PAD_SSP1_DATA3__SSP1_DATA3
  193. MX23_PAD_SSP1_CMD__SSP1_CMD
  194. MX23_PAD_SSP1_SCK__SSP1_SCK
  195. >;
  196. fsl,drive-strength = <MXS_DRIVE_8mA>;
  197. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  198. fsl,pull-up = <MXS_PULL_ENABLE>;
  199. };
  200. mmc0_8bit_pins_a: mmc0-8bit@0 {
  201. reg = <0>;
  202. fsl,pinmux-ids = <
  203. MX23_PAD_SSP1_DATA0__SSP1_DATA0
  204. MX23_PAD_SSP1_DATA1__SSP1_DATA1
  205. MX23_PAD_SSP1_DATA2__SSP1_DATA2
  206. MX23_PAD_SSP1_DATA3__SSP1_DATA3
  207. MX23_PAD_GPMI_D08__SSP1_DATA4
  208. MX23_PAD_GPMI_D09__SSP1_DATA5
  209. MX23_PAD_GPMI_D10__SSP1_DATA6
  210. MX23_PAD_GPMI_D11__SSP1_DATA7
  211. MX23_PAD_SSP1_CMD__SSP1_CMD
  212. MX23_PAD_SSP1_DETECT__SSP1_DETECT
  213. MX23_PAD_SSP1_SCK__SSP1_SCK
  214. >;
  215. fsl,drive-strength = <MXS_DRIVE_8mA>;
  216. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  217. fsl,pull-up = <MXS_PULL_ENABLE>;
  218. };
  219. mmc0_pins_fixup: mmc0-pins-fixup {
  220. fsl,pinmux-ids = <
  221. MX23_PAD_SSP1_DETECT__SSP1_DETECT
  222. MX23_PAD_SSP1_SCK__SSP1_SCK
  223. >;
  224. fsl,pull-up = <MXS_PULL_DISABLE>;
  225. };
  226. pwm2_pins_a: pwm2@0 {
  227. reg = <0>;
  228. fsl,pinmux-ids = <
  229. MX23_PAD_PWM2__PWM2
  230. >;
  231. fsl,drive-strength = <MXS_DRIVE_4mA>;
  232. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  233. fsl,pull-up = <MXS_PULL_DISABLE>;
  234. };
  235. lcdif_24bit_pins_a: lcdif-24bit@0 {
  236. reg = <0>;
  237. fsl,pinmux-ids = <
  238. MX23_PAD_LCD_D00__LCD_D00
  239. MX23_PAD_LCD_D01__LCD_D01
  240. MX23_PAD_LCD_D02__LCD_D02
  241. MX23_PAD_LCD_D03__LCD_D03
  242. MX23_PAD_LCD_D04__LCD_D04
  243. MX23_PAD_LCD_D05__LCD_D05
  244. MX23_PAD_LCD_D06__LCD_D06
  245. MX23_PAD_LCD_D07__LCD_D07
  246. MX23_PAD_LCD_D08__LCD_D08
  247. MX23_PAD_LCD_D09__LCD_D09
  248. MX23_PAD_LCD_D10__LCD_D10
  249. MX23_PAD_LCD_D11__LCD_D11
  250. MX23_PAD_LCD_D12__LCD_D12
  251. MX23_PAD_LCD_D13__LCD_D13
  252. MX23_PAD_LCD_D14__LCD_D14
  253. MX23_PAD_LCD_D15__LCD_D15
  254. MX23_PAD_LCD_D16__LCD_D16
  255. MX23_PAD_LCD_D17__LCD_D17
  256. MX23_PAD_GPMI_D08__LCD_D18
  257. MX23_PAD_GPMI_D09__LCD_D19
  258. MX23_PAD_GPMI_D10__LCD_D20
  259. MX23_PAD_GPMI_D11__LCD_D21
  260. MX23_PAD_GPMI_D12__LCD_D22
  261. MX23_PAD_GPMI_D13__LCD_D23
  262. MX23_PAD_LCD_DOTCK__LCD_DOTCK
  263. MX23_PAD_LCD_ENABLE__LCD_ENABLE
  264. MX23_PAD_LCD_HSYNC__LCD_HSYNC
  265. MX23_PAD_LCD_VSYNC__LCD_VSYNC
  266. >;
  267. fsl,drive-strength = <MXS_DRIVE_4mA>;
  268. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  269. fsl,pull-up = <MXS_PULL_DISABLE>;
  270. };
  271. spi2_pins_a: spi2@0 {
  272. reg = <0>;
  273. fsl,pinmux-ids = <
  274. MX23_PAD_GPMI_WRN__SSP2_SCK
  275. MX23_PAD_GPMI_RDY1__SSP2_CMD
  276. MX23_PAD_GPMI_D00__SSP2_DATA0
  277. MX23_PAD_GPMI_D03__SSP2_DATA3
  278. >;
  279. fsl,drive-strength = <MXS_DRIVE_8mA>;
  280. fsl,voltage = <MXS_VOLTAGE_HIGH>;
  281. fsl,pull-up = <MXS_PULL_ENABLE>;
  282. };
  283. };
  284. digctl@8001c000 {
  285. compatible = "fsl,imx23-digctl";
  286. reg = <0x8001c000 2000>;
  287. status = "disabled";
  288. };
  289. emi@80020000 {
  290. reg = <0x80020000 0x2000>;
  291. status = "disabled";
  292. };
  293. dma_apbx: dma-apbx@80024000 {
  294. compatible = "fsl,imx23-dma-apbx";
  295. reg = <0x80024000 0x2000>;
  296. interrupts = <7 5 9 26
  297. 19 0 25 23
  298. 60 58 9 0
  299. 0 0 0 0>;
  300. interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
  301. "saif0", "empty", "auart0-rx", "auart0-tx",
  302. "auart1-rx", "auart1-tx", "saif1", "empty",
  303. "empty", "empty", "empty", "empty";
  304. #dma-cells = <1>;
  305. dma-channels = <16>;
  306. clocks = <&clks 16>;
  307. };
  308. dcp@80028000 {
  309. compatible = "fsl,imx23-dcp";
  310. reg = <0x80028000 0x2000>;
  311. interrupts = <53 54>;
  312. status = "okay";
  313. };
  314. pxp@8002a000 {
  315. reg = <0x8002a000 0x2000>;
  316. status = "disabled";
  317. };
  318. ocotp@8002c000 {
  319. compatible = "fsl,ocotp";
  320. reg = <0x8002c000 0x2000>;
  321. status = "disabled";
  322. };
  323. axi-ahb@8002e000 {
  324. reg = <0x8002e000 0x2000>;
  325. status = "disabled";
  326. };
  327. lcdif@80030000 {
  328. compatible = "fsl,imx23-lcdif";
  329. reg = <0x80030000 2000>;
  330. interrupts = <46 45>;
  331. clocks = <&clks 38>;
  332. status = "disabled";
  333. };
  334. ssp1: ssp@80034000 {
  335. reg = <0x80034000 0x2000>;
  336. interrupts = <2>;
  337. clocks = <&clks 33>;
  338. dmas = <&dma_apbh 2>;
  339. dma-names = "rx-tx";
  340. status = "disabled";
  341. };
  342. tvenc@80038000 {
  343. reg = <0x80038000 0x2000>;
  344. status = "disabled";
  345. };
  346. };
  347. apbx@80040000 {
  348. compatible = "simple-bus";
  349. #address-cells = <1>;
  350. #size-cells = <1>;
  351. reg = <0x80040000 0x40000>;
  352. ranges;
  353. clks: clkctrl@80040000 {
  354. compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
  355. reg = <0x80040000 0x2000>;
  356. #clock-cells = <1>;
  357. };
  358. saif0: saif@80042000 {
  359. reg = <0x80042000 0x2000>;
  360. dmas = <&dma_apbx 4>;
  361. dma-names = "rx-tx";
  362. status = "disabled";
  363. };
  364. power@80044000 {
  365. reg = <0x80044000 0x2000>;
  366. status = "disabled";
  367. };
  368. saif1: saif@80046000 {
  369. reg = <0x80046000 0x2000>;
  370. dmas = <&dma_apbx 10>;
  371. dma-names = "rx-tx";
  372. status = "disabled";
  373. };
  374. audio-out@80048000 {
  375. reg = <0x80048000 0x2000>;
  376. dmas = <&dma_apbx 1>;
  377. dma-names = "tx";
  378. status = "disabled";
  379. };
  380. audio-in@8004c000 {
  381. reg = <0x8004c000 0x2000>;
  382. dmas = <&dma_apbx 0>;
  383. dma-names = "rx";
  384. status = "disabled";
  385. };
  386. lradc: lradc@80050000 {
  387. compatible = "fsl,imx23-lradc";
  388. reg = <0x80050000 0x2000>;
  389. interrupts = <36 37 38 39 40 41 42 43 44>;
  390. status = "disabled";
  391. clocks = <&clks 26>;
  392. };
  393. spdif@80054000 {
  394. reg = <0x80054000 2000>;
  395. dmas = <&dma_apbx 2>;
  396. dma-names = "tx";
  397. status = "disabled";
  398. };
  399. i2c@80058000 {
  400. reg = <0x80058000 0x2000>;
  401. dmas = <&dma_apbx 3>;
  402. dma-names = "rx-tx";
  403. status = "disabled";
  404. };
  405. rtc@8005c000 {
  406. compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
  407. reg = <0x8005c000 0x2000>;
  408. interrupts = <22>;
  409. };
  410. pwm: pwm@80064000 {
  411. compatible = "fsl,imx23-pwm";
  412. reg = <0x80064000 0x2000>;
  413. clocks = <&clks 30>;
  414. #pwm-cells = <2>;
  415. fsl,pwm-number = <5>;
  416. status = "disabled";
  417. };
  418. timrot@80068000 {
  419. compatible = "fsl,imx23-timrot", "fsl,timrot";
  420. reg = <0x80068000 0x2000>;
  421. interrupts = <28 29 30 31>;
  422. clocks = <&clks 28>;
  423. };
  424. auart0: serial@8006c000 {
  425. compatible = "fsl,imx23-auart";
  426. reg = <0x8006c000 0x2000>;
  427. interrupts = <24>;
  428. clocks = <&clks 32>;
  429. dmas = <&dma_apbx 6>, <&dma_apbx 7>;
  430. dma-names = "rx", "tx";
  431. status = "disabled";
  432. };
  433. auart1: serial@8006e000 {
  434. compatible = "fsl,imx23-auart";
  435. reg = <0x8006e000 0x2000>;
  436. interrupts = <59>;
  437. clocks = <&clks 32>;
  438. dmas = <&dma_apbx 8>, <&dma_apbx 9>;
  439. dma-names = "rx", "tx";
  440. status = "disabled";
  441. };
  442. duart: serial@80070000 {
  443. compatible = "arm,pl011", "arm,primecell";
  444. reg = <0x80070000 0x2000>;
  445. interrupts = <0>;
  446. clocks = <&clks 32>, <&clks 16>;
  447. clock-names = "uart", "apb_pclk";
  448. status = "disabled";
  449. };
  450. usbphy0: usbphy@8007c000 {
  451. compatible = "fsl,imx23-usbphy";
  452. reg = <0x8007c000 0x2000>;
  453. clocks = <&clks 41>;
  454. status = "disabled";
  455. };
  456. };
  457. };
  458. ahb@80080000 {
  459. compatible = "simple-bus";
  460. #address-cells = <1>;
  461. #size-cells = <1>;
  462. reg = <0x80080000 0x80000>;
  463. ranges;
  464. usb0: usb@80080000 {
  465. compatible = "fsl,imx23-usb", "fsl,imx27-usb";
  466. reg = <0x80080000 0x40000>;
  467. interrupts = <11>;
  468. fsl,usbphy = <&usbphy0>;
  469. clocks = <&clks 40>;
  470. status = "disabled";
  471. };
  472. };
  473. iio_hwmon {
  474. compatible = "iio-hwmon";
  475. io-channels = <&lradc 8>;
  476. };
  477. };