imx27-eukrea-mbimxsd27-baseboard.dts 5.5 KB

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  1. /*
  2. * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. #include "imx27-eukrea-cpuimx27.dtsi"
  12. / {
  13. model = "Eukrea MBIMXSD27";
  14. compatible = "eukrea,mbimxsd27-baseboard", "eukrea,cpuimx27", "fsl,imx27";
  15. display0: CMO-QVGA {
  16. model = "CMO-QVGA";
  17. native-mode = <&timing0>;
  18. bits-per-pixel = <16>;
  19. fsl,pcr = <0xfad08b80>;
  20. display-timings {
  21. timing0: 320x240 {
  22. clock-frequency = <6500000>;
  23. hactive = <320>;
  24. vactive = <240>;
  25. hback-porch = <20>;
  26. hsync-len = <30>;
  27. hfront-porch = <38>;
  28. vback-porch = <4>;
  29. vsync-len = <3>;
  30. vfront-porch = <15>;
  31. };
  32. };
  33. };
  34. backlight {
  35. compatible = "gpio-backlight";
  36. pinctrl-names = "default";
  37. pinctrl-0 = <&pinctrl_backlight>;
  38. gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
  39. };
  40. leds {
  41. compatible = "gpio-leds";
  42. pinctrl-names = "default";
  43. pinctrl-0 = <&pinctrl_gpioleds>;
  44. led1 {
  45. label = "system::live";
  46. gpios = <&gpio6 16 GPIO_ACTIVE_LOW>;
  47. linux,default-trigger = "heartbeat";
  48. };
  49. led2 {
  50. label = "system::user";
  51. gpios = <&gpio6 19 GPIO_ACTIVE_LOW>;
  52. };
  53. };
  54. regulators {
  55. #address-cells = <1>;
  56. #size-cells = <0>;
  57. compatible = "simple-bus";
  58. reg_lcd: regulator@0 {
  59. pinctrl-names = "default";
  60. pinctrl-0 = <&pinctrl_lcdreg>;
  61. compatible = "regulator-fixed";
  62. reg = <0>;
  63. regulator-name = "LCD";
  64. regulator-min-microvolt = <5000000>;
  65. regulator-max-microvolt = <5000000>;
  66. gpio = <&gpio1 25 GPIO_ACTIVE_HIGH>;
  67. enable-active-high;
  68. };
  69. };
  70. };
  71. &cspi1 {
  72. pinctrl-0 = <&pinctrl_cspi1>;
  73. fsl,spi-num-chipselects = <1>;
  74. cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
  75. status = "okay";
  76. ads7846 {
  77. compatible = "ti,ads7846";
  78. pinctrl-names = "default";
  79. pinctrl-0 = <&pinctrl_touch>;
  80. reg = <0>;
  81. interrupts = <&gpio4 25 IRQ_TYPE_LEVEL_LOW>;
  82. spi-cpol;
  83. spi-max-frequency = <1500000>;
  84. ti,keep-vref-on;
  85. };
  86. };
  87. &fb {
  88. pinctrl-names = "default";
  89. pinctrl-0 = <&pinctrl_imxfb>;
  90. display = <&display0>;
  91. lcd-supply = <&reg_lcd>;
  92. fsl,dmacr = <0x00040060>;
  93. fsl,lscr1 = <0x00120300>;
  94. fsl,lpccr = <0x00a903ff>;
  95. status = "okay";
  96. };
  97. &i2c1 {
  98. codec: codec@1a {
  99. compatible = "ti,tlv320aic23";
  100. reg = <0x1a>;
  101. };
  102. };
  103. &kpp {
  104. linux,keymap = <
  105. MATRIX_KEY(0, 0, KEY_UP)
  106. MATRIX_KEY(0, 1, KEY_DOWN)
  107. MATRIX_KEY(1, 0, KEY_RIGHT)
  108. MATRIX_KEY(1, 1, KEY_LEFT)
  109. >;
  110. status = "okay";
  111. };
  112. &sdhci1 {
  113. pinctrl-names = "default";
  114. pinctrl-0 = <&pinctrl_sdhc1>;
  115. bus-width = <4>;
  116. status = "okay";
  117. };
  118. &ssi1 {
  119. pinctrl-names = "default";
  120. pinctrl-0 = <&pinctrl_ssi1>;
  121. codec-handle = <&codec>;
  122. status = "okay";
  123. };
  124. &uart1 {
  125. fsl,uart-has-rtscts;
  126. pinctrl-names = "default";
  127. pinctrl-0 = <&pinctrl_uart1>;
  128. status = "okay";
  129. };
  130. &uart2 {
  131. fsl,uart-has-rtscts;
  132. pinctrl-names = "default";
  133. pinctrl-0 = <&pinctrl_uart2>;
  134. status = "okay";
  135. };
  136. &uart3 {
  137. fsl,uart-has-rtscts;
  138. pinctrl-names = "default";
  139. pinctrl-0 = <&pinctrl_uart3>;
  140. status = "okay";
  141. };
  142. &iomuxc {
  143. imx27-eukrea-cpuimx27-baseboard {
  144. pinctrl_cspi1: cspi1grp {
  145. fsl,pins = <
  146. MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0
  147. MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0
  148. MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0
  149. MX27_PAD_CSPI1_SS0__GPIO4_28 0x0 /* CS0 */
  150. >;
  151. };
  152. pinctrl_backlight: backlightgrp {
  153. fsl,pins = <
  154. MX27_PAD_PWMO__GPIO5_5 0x0
  155. >;
  156. };
  157. pinctrl_gpioleds: gpioledsgrp {
  158. fsl,pins = <
  159. MX27_PAD_PC_PWRON__GPIO6_16 0x0
  160. MX27_PAD_PC_CD2_B__GPIO6_19 0x0
  161. >;
  162. };
  163. pinctrl_imxfb: imxfbgrp {
  164. fsl,pins = <
  165. MX27_PAD_LD0__LD0 0x0
  166. MX27_PAD_LD1__LD1 0x0
  167. MX27_PAD_LD2__LD2 0x0
  168. MX27_PAD_LD3__LD3 0x0
  169. MX27_PAD_LD4__LD4 0x0
  170. MX27_PAD_LD5__LD5 0x0
  171. MX27_PAD_LD6__LD6 0x0
  172. MX27_PAD_LD7__LD7 0x0
  173. MX27_PAD_LD8__LD8 0x0
  174. MX27_PAD_LD9__LD9 0x0
  175. MX27_PAD_LD10__LD10 0x0
  176. MX27_PAD_LD11__LD11 0x0
  177. MX27_PAD_LD12__LD12 0x0
  178. MX27_PAD_LD13__LD13 0x0
  179. MX27_PAD_LD14__LD14 0x0
  180. MX27_PAD_LD15__LD15 0x0
  181. MX27_PAD_LD16__LD16 0x0
  182. MX27_PAD_LD17__LD17 0x0
  183. MX27_PAD_CONTRAST__CONTRAST 0x0
  184. MX27_PAD_OE_ACD__OE_ACD 0x0
  185. MX27_PAD_HSYNC__HSYNC 0x0
  186. MX27_PAD_VSYNC__VSYNC 0x0
  187. >;
  188. };
  189. pinctrl_lcdreg: lcdreggrp {
  190. fsl,pins = <
  191. MX27_PAD_CLS__GPIO1_25 0x0
  192. >;
  193. };
  194. pinctrl_sdhc1: sdhc1grp {
  195. fsl,pins = <
  196. MX27_PAD_SD1_CLK__SD1_CLK 0x0
  197. MX27_PAD_SD1_CMD__SD1_CMD 0x0
  198. MX27_PAD_SD1_D0__SD1_D0 0x0
  199. MX27_PAD_SD1_D1__SD1_D1 0x0
  200. MX27_PAD_SD1_D2__SD1_D2 0x0
  201. MX27_PAD_SD1_D3__SD1_D3 0x0
  202. >;
  203. };
  204. pinctrl_ssi1: ssi1grp {
  205. fsl,pins = <
  206. MX27_PAD_SSI4_CLK__SSI4_CLK 0x0
  207. MX27_PAD_SSI4_FS__SSI4_FS 0x0
  208. MX27_PAD_SSI4_RXDAT__SSI4_RXDAT 0x1
  209. MX27_PAD_SSI4_TXDAT__SSI4_TXDAT 0x1
  210. >;
  211. };
  212. pinctrl_touch: touchgrp {
  213. fsl,pins = <
  214. MX27_PAD_CSPI1_RDY__GPIO4_25 0x0 /* IRQ */
  215. >;
  216. };
  217. pinctrl_uart1: uart1grp {
  218. fsl,pins = <
  219. MX27_PAD_UART1_TXD__UART1_TXD 0x0
  220. MX27_PAD_UART1_RXD__UART1_RXD 0x0
  221. MX27_PAD_UART1_CTS__UART1_CTS 0x0
  222. MX27_PAD_UART1_RTS__UART1_RTS 0x0
  223. >;
  224. };
  225. pinctrl_uart2: uart2grp {
  226. fsl,pins = <
  227. MX27_PAD_UART2_TXD__UART2_TXD 0x0
  228. MX27_PAD_UART2_RXD__UART2_RXD 0x0
  229. MX27_PAD_UART2_CTS__UART2_CTS 0x0
  230. MX27_PAD_UART2_RTS__UART2_RTS 0x0
  231. >;
  232. };
  233. pinctrl_uart3: uart3grp {
  234. fsl,pins = <
  235. MX27_PAD_UART3_TXD__UART3_TXD 0x0
  236. MX27_PAD_UART3_RXD__UART3_RXD 0x0
  237. MX27_PAD_UART3_CTS__UART3_CTS 0x0
  238. MX27_PAD_UART3_RTS__UART3_RTS 0x0
  239. >;
  240. };
  241. };
  242. };