imx27-phytec-phycard-s-rdk.dts 3.3 KB

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  1. /*
  2. * Copyright 2012 Markus Pargmann, Pengutronix
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. #include "imx27-phytec-phycard-s-som.dtsi"
  12. / {
  13. model = "Phytec pca100 rapid development kit";
  14. compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";
  15. chosen {
  16. stdout-path = &uart1;
  17. };
  18. display: display {
  19. model = "Primeview-PD050VL1";
  20. native-mode = <&timing0>;
  21. bits-per-pixel = <16>; /* non-standard but required */
  22. fsl,pcr = <0xf0c88080>; /* non-standard but required */
  23. display-timings {
  24. timing0: 640x480 {
  25. hactive = <640>;
  26. vactive = <480>;
  27. hback-porch = <112>;
  28. hfront-porch = <36>;
  29. hsync-len = <32>;
  30. vback-porch = <33>;
  31. vfront-porch = <33>;
  32. vsync-len = <2>;
  33. clock-frequency = <25000000>;
  34. };
  35. };
  36. };
  37. regulators {
  38. compatible = "simple-bus";
  39. #address-cells = <1>;
  40. #size-cells = <0>;
  41. reg_3v3: regulator@0 {
  42. compatible = "regulator-fixed";
  43. reg = <0>;
  44. regulator-name = "3V3";
  45. regulator-min-microvolt = <3300000>;
  46. regulator-max-microvolt = <3300000>;
  47. regulator-always-on;
  48. };
  49. };
  50. };
  51. &fb {
  52. display = <&display>;
  53. status = "okay";
  54. };
  55. &i2c1 {
  56. pinctrl-names = "default";
  57. pinctrl-0 = <&pinctrl_i2c1>;
  58. status = "okay";
  59. rtc@51 {
  60. compatible = "nxp,pcf8563";
  61. reg = <0x51>;
  62. };
  63. adc@64 {
  64. compatible = "maxim,max1037";
  65. vcc-supply = <&reg_3v3>;
  66. reg = <0x64>;
  67. };
  68. };
  69. &iomuxc {
  70. imx27-phycard-s-rdk {
  71. pinctrl_i2c1: i2c1grp {
  72. fsl,pins = <
  73. MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
  74. MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
  75. >;
  76. };
  77. pinctrl_owire1: owire1grp {
  78. fsl,pins = <
  79. MX27_PAD_RTCK__OWIRE 0x0
  80. >;
  81. };
  82. pinctrl_sdhc2: sdhc2grp {
  83. fsl,pins = <
  84. MX27_PAD_SD2_CLK__SD2_CLK 0x0
  85. MX27_PAD_SD2_CMD__SD2_CMD 0x0
  86. MX27_PAD_SD2_D0__SD2_D0 0x0
  87. MX27_PAD_SD2_D1__SD2_D1 0x0
  88. MX27_PAD_SD2_D2__SD2_D2 0x0
  89. MX27_PAD_SD2_D3__SD2_D3 0x0
  90. MX27_PAD_SSI3_RXDAT__GPIO3_29 0x0 /* CD */
  91. >;
  92. };
  93. pinctrl_uart1: uart1grp {
  94. fsl,pins = <
  95. MX27_PAD_UART1_TXD__UART1_TXD 0x0
  96. MX27_PAD_UART1_RXD__UART1_RXD 0x0
  97. MX27_PAD_UART1_CTS__UART1_CTS 0x0
  98. MX27_PAD_UART1_RTS__UART1_RTS 0x0
  99. >;
  100. };
  101. pinctrl_uart2: uart2grp {
  102. fsl,pins = <
  103. MX27_PAD_UART2_TXD__UART2_TXD 0x0
  104. MX27_PAD_UART2_RXD__UART2_RXD 0x0
  105. MX27_PAD_UART2_CTS__UART2_CTS 0x0
  106. MX27_PAD_UART2_RTS__UART2_RTS 0x0
  107. >;
  108. };
  109. pinctrl_uart3: uart3grp {
  110. fsl,pins = <
  111. MX27_PAD_UART3_TXD__UART3_TXD 0x0
  112. MX27_PAD_UART3_RXD__UART3_RXD 0x0
  113. MX27_PAD_UART3_CTS__UART3_CTS 0x0
  114. MX27_PAD_UART3_RTS__UART3_RTS 0x0
  115. >;
  116. };
  117. };
  118. };
  119. &owire {
  120. pinctrl-names = "default";
  121. pinctrl-0 = <&pinctrl_owire1>;
  122. status = "okay";
  123. };
  124. &sdhci2 {
  125. pinctrl-names = "default";
  126. pinctrl-0 = <&pinctrl_sdhc2>;
  127. cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
  128. status = "okay";
  129. };
  130. &uart1 {
  131. fsl,uart-has-rtscts;
  132. pinctrl-names = "default";
  133. pinctrl-0 = <&pinctrl_uart1>;
  134. status = "okay";
  135. };
  136. &uart2 {
  137. fsl,uart-has-rtscts;
  138. pinctrl-names = "default";
  139. pinctrl-0 = <&pinctrl_uart2>;
  140. status = "okay";
  141. };
  142. &uart3 {
  143. fsl,uart-has-rtscts;
  144. pinctrl-names = "default";
  145. pinctrl-0 = <&pinctrl_uart3>;
  146. status = "okay";
  147. };