imx51-eukrea-cpuimx51.dtsi 2.7 KB

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  1. /*
  2. * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation; either version 2
  7. * of the License, or (at your option) any later version.
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program; if not, write to the Free Software
  15. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  16. * MA 02110-1301, USA.
  17. */
  18. #include "imx51.dtsi"
  19. / {
  20. model = "Eukrea CPUIMX51";
  21. compatible = "eukrea,cpuimx51", "fsl,imx51";
  22. memory {
  23. reg = <0x90000000 0x10000000>; /* 256M */
  24. };
  25. };
  26. &fec {
  27. pinctrl-names = "default";
  28. pinctrl-0 = <&pinctrl_fec>;
  29. status = "okay";
  30. };
  31. &i2c1 {
  32. pinctrl-names = "default";
  33. pinctrl-0 = <&pinctrl_i2c1>;
  34. status = "okay";
  35. pcf8563@51 {
  36. compatible = "nxp,pcf8563";
  37. reg = <0x51>;
  38. };
  39. tsc2007: tsc2007@49 {
  40. compatible = "ti,tsc2007";
  41. gpios = <&gpio4 0 1>;
  42. interrupt-parent = <&gpio4>;
  43. interrupts = <0x0 0x8>;
  44. pinctrl-names = "default";
  45. pinctrl-0 = <&pinctrl_tsc2007_1>;
  46. reg = <0x49>;
  47. ti,x-plate-ohms = <180>;
  48. };
  49. };
  50. &iomuxc {
  51. imx51-eukrea {
  52. pinctrl_tsc2007_1: tsc2007grp-1 {
  53. fsl,pins = <
  54. MX51_PAD_GPIO_NAND__GPIO_NAND 0x1f5
  55. MX51_PAD_NANDF_D8__GPIO4_0 0x1f5
  56. >;
  57. };
  58. pinctrl_fec: fecgrp {
  59. fsl,pins = <
  60. MX51_PAD_DI_GP3__FEC_TX_ER 0x80000000
  61. MX51_PAD_DI2_PIN4__FEC_CRS 0x80000000
  62. MX51_PAD_DI2_PIN2__FEC_MDC 0x80000000
  63. MX51_PAD_DI2_PIN3__FEC_MDIO 0x80000000
  64. MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 0x80000000
  65. MX51_PAD_DI_GP4__FEC_RDATA2 0x80000000
  66. MX51_PAD_DISP2_DAT0__FEC_RDATA3 0x80000000
  67. MX51_PAD_DISP2_DAT1__FEC_RX_ER 0x80000000
  68. MX51_PAD_DISP2_DAT6__FEC_TDATA1 0x80000000
  69. MX51_PAD_DISP2_DAT7__FEC_TDATA2 0x80000000
  70. MX51_PAD_DISP2_DAT8__FEC_TDATA3 0x80000000
  71. MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x80000000
  72. MX51_PAD_DISP2_DAT10__FEC_COL 0x80000000
  73. MX51_PAD_DISP2_DAT11__FEC_RX_CLK 0x80000000
  74. MX51_PAD_DISP2_DAT12__FEC_RX_DV 0x80000000
  75. MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x80000000
  76. MX51_PAD_DISP2_DAT14__FEC_RDATA0 0x80000000
  77. MX51_PAD_DISP2_DAT15__FEC_TDATA0 0x80000000
  78. >;
  79. };
  80. pinctrl_i2c1: i2c1grp {
  81. fsl,pins = <
  82. MX51_PAD_SD2_CMD__I2C1_SCL 0x400001ed
  83. MX51_PAD_SD2_CLK__I2C1_SDA 0x400001ed
  84. >;
  85. };
  86. };
  87. };
  88. &nfc {
  89. nand-bus-width = <8>;
  90. nand-ecc-mode = "hw";
  91. nand-on-flash-bbt;
  92. status = "okay";
  93. };