imx53-ard.dts 4.8 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. /dts-v1/;
  13. #include "imx53.dtsi"
  14. / {
  15. model = "Freescale i.MX53 Automotive Reference Design Board";
  16. compatible = "fsl,imx53-ard", "fsl,imx53";
  17. memory {
  18. reg = <0x70000000 0x40000000>;
  19. };
  20. eim-cs1@f4000000 {
  21. #address-cells = <1>;
  22. #size-cells = <1>;
  23. compatible = "fsl,eim-bus", "simple-bus";
  24. reg = <0xf4000000 0x3ff0000>;
  25. ranges;
  26. lan9220@f4000000 {
  27. compatible = "smsc,lan9220", "smsc,lan9115";
  28. reg = <0xf4000000 0x2000000>;
  29. phy-mode = "mii";
  30. interrupt-parent = <&gpio2>;
  31. interrupts = <31 0x8>;
  32. reg-io-width = <4>;
  33. /*
  34. * VDD33A and VDDVARIO of LAN9220 are supplied by
  35. * SW4_3V3 of LTC3589. Before the regulator driver
  36. * for this PMIC is available, we use a fixed dummy
  37. * 3V3 regulator to get LAN9220 driver probing work.
  38. */
  39. vdd33a-supply = <&reg_3p3v>;
  40. vddvario-supply = <&reg_3p3v>;
  41. smsc,irq-push-pull;
  42. };
  43. };
  44. regulators {
  45. compatible = "simple-bus";
  46. #address-cells = <1>;
  47. #size-cells = <0>;
  48. reg_3p3v: regulator@0 {
  49. compatible = "regulator-fixed";
  50. reg = <0>;
  51. regulator-name = "3P3V";
  52. regulator-min-microvolt = <3300000>;
  53. regulator-max-microvolt = <3300000>;
  54. regulator-always-on;
  55. };
  56. };
  57. gpio-keys {
  58. compatible = "gpio-keys";
  59. home {
  60. label = "Home";
  61. gpios = <&gpio5 10 0>;
  62. linux,code = <102>; /* KEY_HOME */
  63. gpio-key,wakeup;
  64. };
  65. back {
  66. label = "Back";
  67. gpios = <&gpio5 11 0>;
  68. linux,code = <158>; /* KEY_BACK */
  69. gpio-key,wakeup;
  70. };
  71. program {
  72. label = "Program";
  73. gpios = <&gpio5 12 0>;
  74. linux,code = <362>; /* KEY_PROGRAM */
  75. gpio-key,wakeup;
  76. };
  77. volume-up {
  78. label = "Volume Up";
  79. gpios = <&gpio5 13 0>;
  80. linux,code = <115>; /* KEY_VOLUMEUP */
  81. };
  82. volume-down {
  83. label = "Volume Down";
  84. gpios = <&gpio4 0 0>;
  85. linux,code = <114>; /* KEY_VOLUMEDOWN */
  86. };
  87. };
  88. };
  89. &esdhc1 {
  90. pinctrl-names = "default";
  91. pinctrl-0 = <&pinctrl_esdhc1>;
  92. cd-gpios = <&gpio1 1 0>;
  93. wp-gpios = <&gpio1 9 0>;
  94. status = "okay";
  95. };
  96. &iomuxc {
  97. pinctrl-names = "default";
  98. pinctrl-0 = <&pinctrl_hog>;
  99. imx53-ard {
  100. pinctrl_hog: hoggrp {
  101. fsl,pins = <
  102. MX53_PAD_GPIO_1__GPIO1_1 0x80000000
  103. MX53_PAD_GPIO_9__GPIO1_9 0x80000000
  104. MX53_PAD_EIM_EB3__GPIO2_31 0x80000000
  105. MX53_PAD_GPIO_10__GPIO4_0 0x80000000
  106. MX53_PAD_DISP0_DAT16__GPIO5_10 0x80000000
  107. MX53_PAD_DISP0_DAT17__GPIO5_11 0x80000000
  108. MX53_PAD_DISP0_DAT18__GPIO5_12 0x80000000
  109. MX53_PAD_DISP0_DAT19__GPIO5_13 0x80000000
  110. MX53_PAD_EIM_D16__EMI_WEIM_D_16 0x80000000
  111. MX53_PAD_EIM_D17__EMI_WEIM_D_17 0x80000000
  112. MX53_PAD_EIM_D18__EMI_WEIM_D_18 0x80000000
  113. MX53_PAD_EIM_D19__EMI_WEIM_D_19 0x80000000
  114. MX53_PAD_EIM_D20__EMI_WEIM_D_20 0x80000000
  115. MX53_PAD_EIM_D21__EMI_WEIM_D_21 0x80000000
  116. MX53_PAD_EIM_D22__EMI_WEIM_D_22 0x80000000
  117. MX53_PAD_EIM_D23__EMI_WEIM_D_23 0x80000000
  118. MX53_PAD_EIM_D24__EMI_WEIM_D_24 0x80000000
  119. MX53_PAD_EIM_D25__EMI_WEIM_D_25 0x80000000
  120. MX53_PAD_EIM_D26__EMI_WEIM_D_26 0x80000000
  121. MX53_PAD_EIM_D27__EMI_WEIM_D_27 0x80000000
  122. MX53_PAD_EIM_D28__EMI_WEIM_D_28 0x80000000
  123. MX53_PAD_EIM_D29__EMI_WEIM_D_29 0x80000000
  124. MX53_PAD_EIM_D30__EMI_WEIM_D_30 0x80000000
  125. MX53_PAD_EIM_D31__EMI_WEIM_D_31 0x80000000
  126. MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0x80000000
  127. MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0x80000000
  128. MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0x80000000
  129. MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0x80000000
  130. MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0x80000000
  131. MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0x80000000
  132. MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0x80000000
  133. MX53_PAD_EIM_OE__EMI_WEIM_OE 0x80000000
  134. MX53_PAD_EIM_RW__EMI_WEIM_RW 0x80000000
  135. MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 0x80000000
  136. >;
  137. };
  138. pinctrl_esdhc1: esdhc1grp {
  139. fsl,pins = <
  140. MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
  141. MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
  142. MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
  143. MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
  144. MX53_PAD_PATA_DATA8__ESDHC1_DAT4 0x1d5
  145. MX53_PAD_PATA_DATA9__ESDHC1_DAT5 0x1d5
  146. MX53_PAD_PATA_DATA10__ESDHC1_DAT6 0x1d5
  147. MX53_PAD_PATA_DATA11__ESDHC1_DAT7 0x1d5
  148. MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
  149. MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
  150. >;
  151. };
  152. pinctrl_uart1: uart1grp {
  153. fsl,pins = <
  154. MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
  155. MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
  156. >;
  157. };
  158. };
  159. };
  160. &uart1 {
  161. pinctrl-names = "default";
  162. pinctrl-0 = <&pinctrl_uart1>;
  163. status = "okay";
  164. };