imx53-m53evk.dts 7.6 KB

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  1. /*
  2. * Copyright (C) 2013 Marek Vasut <marex@denx.de>
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. /dts-v1/;
  12. #include "imx53-m53.dtsi"
  13. / {
  14. model = "DENX M53EVK";
  15. compatible = "denx,imx53-m53evk", "fsl,imx53";
  16. display1: display@di1 {
  17. compatible = "fsl,imx-parallel-display";
  18. interface-pix-fmt = "bgr666";
  19. pinctrl-names = "default";
  20. pinctrl-0 = <&pinctrl_ipu_disp1>;
  21. display-timings {
  22. 800x480p60 {
  23. native-mode;
  24. clock-frequency = <31500000>;
  25. hactive = <800>;
  26. vactive = <480>;
  27. hfront-porch = <40>;
  28. hback-porch = <88>;
  29. hsync-len = <128>;
  30. vback-porch = <33>;
  31. vfront-porch = <9>;
  32. vsync-len = <3>;
  33. vsync-active = <1>;
  34. };
  35. };
  36. port {
  37. display1_in: endpoint {
  38. remote-endpoint = <&ipu_di1_disp1>;
  39. };
  40. };
  41. };
  42. backlight {
  43. compatible = "pwm-backlight";
  44. pwms = <&pwm1 0 3000>;
  45. brightness-levels = <0 4 8 16 32 64 128 255>;
  46. default-brightness-level = <6>;
  47. power-supply = <&reg_backlight>;
  48. };
  49. leds {
  50. compatible = "gpio-leds";
  51. pinctrl-names = "default";
  52. pinctrl-0 = <&led_pin_gpio>;
  53. user1 {
  54. label = "user1";
  55. gpios = <&gpio2 8 0>;
  56. linux,default-trigger = "heartbeat";
  57. };
  58. user2 {
  59. label = "user2";
  60. gpios = <&gpio2 9 0>;
  61. linux,default-trigger = "heartbeat";
  62. };
  63. };
  64. regulators {
  65. compatible = "simple-bus";
  66. #address-cells = <1>;
  67. #size-cells = <0>;
  68. reg_usbh1_vbus: regulator@3 {
  69. compatible = "regulator-fixed";
  70. reg = <3>;
  71. regulator-name = "vbus";
  72. regulator-min-microvolt = <5000000>;
  73. regulator-max-microvolt = <5000000>;
  74. gpio = <&gpio1 2 0>;
  75. };
  76. };
  77. sound {
  78. compatible = "fsl,imx53-m53evk-sgtl5000",
  79. "fsl,imx-audio-sgtl5000";
  80. model = "imx53-m53evk-sgtl5000";
  81. ssi-controller = <&ssi2>;
  82. audio-codec = <&sgtl5000>;
  83. audio-routing =
  84. "MIC_IN", "Mic Jack",
  85. "Mic Jack", "Mic Bias",
  86. "LINE_IN", "Line In Jack",
  87. "Headphone Jack", "HP_OUT",
  88. "Ext Spk", "LINE_OUT";
  89. mux-int-port = <2>;
  90. mux-ext-port = <4>;
  91. };
  92. };
  93. &audmux {
  94. pinctrl-names = "default";
  95. pinctrl-0 = <&pinctrl_audmux>;
  96. status = "okay";
  97. };
  98. &can1 {
  99. pinctrl-names = "default";
  100. pinctrl-0 = <&pinctrl_can1>;
  101. status = "okay";
  102. };
  103. &can2 {
  104. pinctrl-names = "default";
  105. pinctrl-0 = <&pinctrl_can2>;
  106. status = "okay";
  107. };
  108. &esdhc1 {
  109. pinctrl-names = "default";
  110. pinctrl-0 = <&pinctrl_esdhc1>;
  111. cd-gpios = <&gpio1 1 0>;
  112. wp-gpios = <&gpio1 9 0>;
  113. status = "okay";
  114. };
  115. &fec {
  116. pinctrl-names = "default";
  117. pinctrl-0 = <&pinctrl_fec>;
  118. phy-mode = "rmii";
  119. status = "okay";
  120. };
  121. &i2c1 {
  122. pinctrl-names = "default";
  123. pinctrl-0 = <&pinctrl_i2c1>;
  124. status = "okay";
  125. sgtl5000: codec@0a {
  126. compatible = "fsl,sgtl5000";
  127. reg = <0x0a>;
  128. VDDA-supply = <&reg_3p2v>;
  129. VDDIO-supply = <&reg_3p2v>;
  130. clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
  131. };
  132. };
  133. &i2c3 {
  134. pinctrl-names = "default";
  135. pinctrl-0 = <&pinctrl_i2c3>;
  136. status = "okay";
  137. };
  138. &iomuxc {
  139. pinctrl-names = "default";
  140. pinctrl-0 = <&pinctrl_hog>;
  141. imx53-m53evk {
  142. pinctrl_usb: usbgrp {
  143. fsl,pins = <
  144. MX53_PAD_GPIO_2__GPIO1_2 0x80000000
  145. MX53_PAD_GPIO_3__USBOH3_USBH1_OC 0x80000000
  146. >;
  147. };
  148. led_pin_gpio: led_gpio@0 {
  149. fsl,pins = <
  150. MX53_PAD_PATA_DATA8__GPIO2_8 0x80000000
  151. MX53_PAD_PATA_DATA9__GPIO2_9 0x80000000
  152. >;
  153. };
  154. pinctrl_audmux: audmuxgrp {
  155. fsl,pins = <
  156. MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC 0x80000000
  157. MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD 0x80000000
  158. MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS 0x80000000
  159. MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD 0x80000000
  160. >;
  161. };
  162. pinctrl_can1: can1grp {
  163. fsl,pins = <
  164. MX53_PAD_GPIO_7__CAN1_TXCAN 0x80000000
  165. MX53_PAD_GPIO_8__CAN1_RXCAN 0x80000000
  166. >;
  167. };
  168. pinctrl_can2: can2grp {
  169. fsl,pins = <
  170. MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000
  171. MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000
  172. >;
  173. };
  174. pinctrl_esdhc1: esdhc1grp {
  175. fsl,pins = <
  176. MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
  177. MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
  178. MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
  179. MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
  180. MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
  181. MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
  182. >;
  183. };
  184. pinctrl_fec: fecgrp {
  185. fsl,pins = <
  186. MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
  187. MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
  188. MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
  189. MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
  190. MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
  191. MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
  192. MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
  193. MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
  194. MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
  195. MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
  196. >;
  197. };
  198. pinctrl_i2c1: i2c1grp {
  199. fsl,pins = <
  200. MX53_PAD_EIM_D21__I2C1_SCL 0xc0000000
  201. MX53_PAD_EIM_D28__I2C1_SDA 0xc0000000
  202. >;
  203. };
  204. pinctrl_i2c3: i2c3grp {
  205. fsl,pins = <
  206. MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000
  207. MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000
  208. >;
  209. };
  210. pinctrl_ipu_disp1: ipudisp1grp {
  211. fsl,pins = <
  212. MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x5
  213. MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x5
  214. MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x5
  215. MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x5
  216. MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x5
  217. MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x5
  218. MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x5
  219. MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x5
  220. MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x5
  221. MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x5
  222. MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x5
  223. MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x5
  224. MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x5
  225. MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x5
  226. MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x5
  227. MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x5
  228. MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x5
  229. MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x5
  230. MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x5
  231. MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x5
  232. MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x5
  233. MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x5
  234. MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x5
  235. MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x5
  236. MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x5
  237. MX53_PAD_EIM_DA13__IPU_DI1_D0_CS 0x5
  238. MX53_PAD_EIM_DA14__IPU_DI1_D1_CS 0x5
  239. MX53_PAD_EIM_DA15__IPU_DI1_PIN1 0x5
  240. MX53_PAD_EIM_DA11__IPU_DI1_PIN2 0x5
  241. MX53_PAD_EIM_DA12__IPU_DI1_PIN3 0x5
  242. MX53_PAD_EIM_A25__IPU_DI1_PIN12 0x5
  243. MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x5
  244. >;
  245. };
  246. pinctrl_pwm1: pwm1grp {
  247. fsl,pins = <
  248. MX53_PAD_DISP0_DAT8__PWM1_PWMO 0x5
  249. >;
  250. };
  251. pinctrl_uart1: uart1grp {
  252. fsl,pins = <
  253. MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
  254. MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
  255. >;
  256. };
  257. pinctrl_uart2: uart2grp {
  258. fsl,pins = <
  259. MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
  260. MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
  261. >;
  262. };
  263. pinctrl_uart3: uart3grp {
  264. fsl,pins = <
  265. MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
  266. MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
  267. MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
  268. MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
  269. >;
  270. };
  271. };
  272. };
  273. &ipu_di1_disp1 {
  274. remote-endpoint = <&display1_in>;
  275. };
  276. &pwm1 {
  277. pinctrl-names = "default";
  278. pinctrl-0 = <&pinctrl_pwm1>;
  279. status = "okay";
  280. };
  281. &sata {
  282. status = "okay";
  283. };
  284. &ssi2 {
  285. status = "okay";
  286. };
  287. &uart1 {
  288. pinctrl-names = "default";
  289. pinctrl-0 = <&pinctrl_uart1>;
  290. status = "okay";
  291. };
  292. &uart2 {
  293. pinctrl-names = "default";
  294. pinctrl-0 = <&pinctrl_uart2>;
  295. status = "okay";
  296. };
  297. &uart3 {
  298. pinctrl-names = "default";
  299. pinctrl-0 = <&pinctrl_uart3>;
  300. status = "okay";
  301. };
  302. &usbh1 {
  303. pinctrl-names = "default";
  304. pinctrl-0 = <&pinctrl_usb>;
  305. vbus-supply = <&reg_usbh1_vbus>;
  306. phy_type = "utmi";
  307. status = "okay";
  308. };
  309. &usbotg {
  310. dr_mode = "peripheral";
  311. status = "okay";
  312. };