imx6q-dmo-edmqmx6.dts 9.9 KB

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  1. /*
  2. * Copyright 2013 Data Modul AG
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. /dts-v1/;
  12. #include <dt-bindings/gpio/gpio.h>
  13. #include "imx6q.dtsi"
  14. / {
  15. model = "Data Modul eDM-QMX6 Board";
  16. compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q";
  17. chosen {
  18. stdout-path = &uart2;
  19. };
  20. aliases {
  21. gpio7 = &stmpe_gpio1;
  22. gpio8 = &stmpe_gpio2;
  23. stmpe-i2c0 = &stmpe1;
  24. stmpe-i2c1 = &stmpe2;
  25. };
  26. memory {
  27. reg = <0x10000000 0x80000000>;
  28. };
  29. regulators {
  30. compatible = "simple-bus";
  31. #address-cells = <1>;
  32. #size-cells = <0>;
  33. reg_3p3v: regulator@0 {
  34. compatible = "regulator-fixed";
  35. reg = <0>;
  36. regulator-name = "3P3V";
  37. regulator-min-microvolt = <3300000>;
  38. regulator-max-microvolt = <3300000>;
  39. regulator-always-on;
  40. };
  41. reg_usb_otg_switch: regulator@1 {
  42. compatible = "regulator-fixed";
  43. reg = <1>;
  44. regulator-name = "usb_otg_switch";
  45. regulator-min-microvolt = <5000000>;
  46. regulator-max-microvolt = <5000000>;
  47. gpio = <&gpio7 12 0>;
  48. regulator-boot-on;
  49. regulator-always-on;
  50. };
  51. reg_usb_host1: regulator@2 {
  52. compatible = "regulator-fixed";
  53. reg = <2>;
  54. regulator-name = "usb_host1_en";
  55. regulator-min-microvolt = <3300000>;
  56. regulator-max-microvolt = <3300000>;
  57. gpio = <&gpio3 31 0>;
  58. enable-active-high;
  59. };
  60. };
  61. gpio-leds {
  62. compatible = "gpio-leds";
  63. led-blue {
  64. label = "blue";
  65. gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>;
  66. linux,default-trigger = "heartbeat";
  67. };
  68. led-green {
  69. label = "green";
  70. gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>;
  71. };
  72. led-pink {
  73. label = "pink";
  74. gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>;
  75. };
  76. led-red {
  77. label = "red";
  78. gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>;
  79. };
  80. };
  81. };
  82. &can1 {
  83. pinctrl-names = "default";
  84. pinctrl-0 = <&pinctrl_can1>;
  85. status = "okay";
  86. };
  87. &ecspi5 {
  88. pinctrl-names = "default";
  89. pinctrl-0 = <&pinctrl_ecspi5>;
  90. fsl,spi-num-chipselects = <1>;
  91. cs-gpios = <&gpio1 12 0>;
  92. status = "okay";
  93. flash: m25p80@0 {
  94. compatible = "m25p80";
  95. spi-max-frequency = <40000000>;
  96. reg = <0>;
  97. };
  98. };
  99. &fec {
  100. pinctrl-names = "default";
  101. pinctrl-0 = <&pinctrl_enet>;
  102. phy-mode = "rgmii";
  103. phy-reset-gpios = <&gpio1 25 0>;
  104. phy-supply = <&vgen2_1v2_eth>;
  105. status = "okay";
  106. };
  107. &i2c1 {
  108. clock-frequency = <100000>;
  109. pinctrl-names = "default";
  110. pinctrl-0 = <&pinctrl_i2c1>;
  111. status = "okay";
  112. };
  113. &i2c2 {
  114. clock-frequency = <100000>;
  115. pinctrl-names = "default";
  116. pinctrl-0 = <&pinctrl_i2c2
  117. &pinctrl_stmpe1
  118. &pinctrl_stmpe2
  119. &pinctrl_pfuze>;
  120. status = "okay";
  121. pmic: pfuze100@08 {
  122. compatible = "fsl,pfuze100";
  123. reg = <0x08>;
  124. interrupt-parent = <&gpio3>;
  125. interrupts = <20 8>;
  126. regulators {
  127. sw1a_reg: sw1ab {
  128. regulator-min-microvolt = <300000>;
  129. regulator-max-microvolt = <1875000>;
  130. regulator-boot-on;
  131. regulator-always-on;
  132. };
  133. sw1c_reg: sw1c {
  134. regulator-min-microvolt = <300000>;
  135. regulator-max-microvolt = <1875000>;
  136. regulator-boot-on;
  137. regulator-always-on;
  138. };
  139. sw2_reg: sw2 {
  140. regulator-min-microvolt = <800000>;
  141. regulator-max-microvolt = <3300000>;
  142. regulator-boot-on;
  143. regulator-always-on;
  144. };
  145. sw3a_reg: sw3a {
  146. regulator-min-microvolt = <400000>;
  147. regulator-max-microvolt = <1975000>;
  148. regulator-boot-on;
  149. regulator-always-on;
  150. };
  151. sw3b_reg: sw3b {
  152. regulator-min-microvolt = <400000>;
  153. regulator-max-microvolt = <1975000>;
  154. regulator-boot-on;
  155. regulator-always-on;
  156. };
  157. sw4_reg: sw4 {
  158. regulator-min-microvolt = <400000>;
  159. regulator-max-microvolt = <1975000>;
  160. regulator-always-on;
  161. };
  162. swbst_reg: swbst {
  163. regulator-min-microvolt = <5000000>;
  164. regulator-max-microvolt = <5150000>;
  165. regulator-always-on;
  166. };
  167. snvs_reg: vsnvs {
  168. regulator-min-microvolt = <1000000>;
  169. regulator-max-microvolt = <3000000>;
  170. regulator-boot-on;
  171. regulator-always-on;
  172. };
  173. vref_reg: vrefddr {
  174. regulator-boot-on;
  175. regulator-always-on;
  176. };
  177. vgen1_reg: vgen1 {
  178. regulator-min-microvolt = <800000>;
  179. regulator-max-microvolt = <1550000>;
  180. };
  181. vgen2_1v2_eth: vgen2 {
  182. regulator-min-microvolt = <800000>;
  183. regulator-max-microvolt = <1550000>;
  184. };
  185. vdd_high_in: vgen3 {
  186. regulator-min-microvolt = <1800000>;
  187. regulator-max-microvolt = <3300000>;
  188. regulator-boot-on;
  189. regulator-always-on;
  190. };
  191. vgen4_reg: vgen4 {
  192. regulator-min-microvolt = <1800000>;
  193. regulator-max-microvolt = <3300000>;
  194. regulator-always-on;
  195. };
  196. vgen5_reg: vgen5 {
  197. regulator-min-microvolt = <1800000>;
  198. regulator-max-microvolt = <3300000>;
  199. regulator-always-on;
  200. };
  201. vgen6_reg: vgen6 {
  202. regulator-min-microvolt = <1800000>;
  203. regulator-max-microvolt = <3300000>;
  204. regulator-always-on;
  205. };
  206. };
  207. };
  208. stmpe1: stmpe1601@40 {
  209. compatible = "st,stmpe1601";
  210. reg = <0x40>;
  211. interrupts = <30 0>;
  212. interrupt-parent = <&gpio3>;
  213. vcc-supply = <&sw2_reg>;
  214. vio-supply = <&sw2_reg>;
  215. stmpe_gpio1: stmpe_gpio {
  216. #gpio-cells = <2>;
  217. compatible = "st,stmpe-gpio";
  218. };
  219. };
  220. stmpe2: stmpe1601@44 {
  221. compatible = "st,stmpe1601";
  222. reg = <0x44>;
  223. interrupts = <2 0>;
  224. interrupt-parent = <&gpio5>;
  225. vcc-supply = <&sw2_reg>;
  226. vio-supply = <&sw2_reg>;
  227. stmpe_gpio2: stmpe_gpio {
  228. #gpio-cells = <2>;
  229. compatible = "st,stmpe-gpio";
  230. };
  231. };
  232. temp1: ad7414@4c {
  233. compatible = "ad,ad7414";
  234. reg = <0x4c>;
  235. };
  236. temp2: ad7414@4d {
  237. compatible = "ad,ad7414";
  238. reg = <0x4d>;
  239. };
  240. rtc: m41t62@68 {
  241. compatible = "stm,m41t62";
  242. reg = <0x68>;
  243. };
  244. };
  245. &i2c3 {
  246. clock-frequency = <100000>;
  247. pinctrl-names = "default";
  248. pinctrl-0 = <&pinctrl_i2c3>;
  249. status = "okay";
  250. };
  251. &iomuxc {
  252. pinctrl-names = "default";
  253. pinctrl-0 = <&pinctrl_hog>;
  254. imx6q-dmo-edmqmx6 {
  255. pinctrl_hog: hoggrp {
  256. fsl,pins = <
  257. MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000
  258. MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000
  259. >;
  260. };
  261. pinctrl_can1: can1grp {
  262. fsl,pins = <
  263. MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
  264. MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
  265. >;
  266. };
  267. pinctrl_ecspi5: ecspi5rp-1 {
  268. fsl,pins = <
  269. MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x80000000
  270. MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x80000000
  271. MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x80000000
  272. MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x80000000
  273. >;
  274. };
  275. pinctrl_enet: enetgrp {
  276. fsl,pins = <
  277. MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
  278. MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
  279. MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
  280. MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
  281. MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
  282. MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
  283. MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
  284. MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
  285. MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
  286. MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
  287. MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
  288. MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
  289. MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
  290. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
  291. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
  292. MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
  293. MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
  294. >;
  295. };
  296. pinctrl_i2c1: i2c1grp {
  297. fsl,pins = <
  298. MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
  299. MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
  300. >;
  301. };
  302. pinctrl_i2c2: i2c2grp {
  303. fsl,pins = <
  304. MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
  305. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  306. >;
  307. };
  308. pinctrl_i2c3: i2c3grp {
  309. fsl,pins = <
  310. MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
  311. MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
  312. >;
  313. };
  314. pinctrl_pcie: pciegrp {
  315. fsl,pins = <
  316. MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x100b1
  317. >;
  318. };
  319. pinctrl_pfuze: pfuze100grp1 {
  320. fsl,pins = <
  321. MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000
  322. >;
  323. };
  324. pinctrl_stmpe1: stmpe1grp {
  325. fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>;
  326. };
  327. pinctrl_stmpe2: stmpe2grp {
  328. fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>;
  329. };
  330. pinctrl_uart1: uart1grp {
  331. fsl,pins = <
  332. MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
  333. MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
  334. >;
  335. };
  336. pinctrl_uart2: uart2grp {
  337. fsl,pins = <
  338. MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
  339. MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
  340. >;
  341. };
  342. pinctrl_usbotg: usbotggrp {
  343. fsl,pins = <
  344. MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
  345. >;
  346. };
  347. pinctrl_usdhc3: usdhc3grp {
  348. fsl,pins = <
  349. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  350. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  351. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  352. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  353. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  354. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  355. >;
  356. };
  357. pinctrl_usdhc4: usdhc4grp {
  358. fsl,pins = <
  359. MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
  360. MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
  361. MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
  362. MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
  363. MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
  364. MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
  365. MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
  366. MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
  367. MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
  368. MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
  369. >;
  370. };
  371. };
  372. };
  373. &pcie {
  374. pinctrl-names = "default";
  375. pinctrl-0 = <&pinctrl_pcie>;
  376. reset-gpio = <&gpio4 8 0>;
  377. status = "okay";
  378. };
  379. &sata {
  380. status = "okay";
  381. };
  382. &uart1 {
  383. pinctrl-names = "default";
  384. pinctrl-0 = <&pinctrl_uart1>;
  385. status = "okay";
  386. };
  387. &uart2 {
  388. pinctrl-names = "default";
  389. pinctrl-0 = <&pinctrl_uart2>;
  390. status = "okay";
  391. };
  392. &usbh1 {
  393. vbus-supply = <&reg_usb_host1>;
  394. disable-over-current;
  395. dr_mode = "host";
  396. status = "okay";
  397. };
  398. &usbotg {
  399. pinctrl-names = "default";
  400. pinctrl-0 = <&pinctrl_usbotg>;
  401. disable-over-current;
  402. status = "okay";
  403. };
  404. &usdhc3 {
  405. pinctrl-names = "default";
  406. pinctrl-0 = <&pinctrl_usdhc3>;
  407. vmmc-supply = <&reg_3p3v>;
  408. status = "okay";
  409. };
  410. &usdhc4 {
  411. pinctrl-names = "default";
  412. pinctrl-0 = <&pinctrl_usdhc4>;
  413. vmmc-supply = <&reg_3p3v>;
  414. non-removable;
  415. bus-width = <8>;
  416. status = "okay";
  417. };