imx6q-udoo.dts 3.1 KB

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  1. /*
  2. * Copyright 2013 Freescale Semiconductor, Inc.
  3. *
  4. * Author: Fabio Estevam <fabio.estevam@freescale.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. */
  11. /dts-v1/;
  12. #include "imx6q.dtsi"
  13. / {
  14. model = "Udoo i.MX6 Quad Board";
  15. compatible = "udoo,imx6q-udoo", "fsl,imx6q";
  16. chosen {
  17. stdout-path = &uart2;
  18. };
  19. memory {
  20. reg = <0x10000000 0x40000000>;
  21. };
  22. regulators {
  23. compatible = "simple-bus";
  24. #address-cells = <1>;
  25. #size-cells = <0>;
  26. reg_usb_h1_vbus: regulator@0 {
  27. compatible = "regulator-fixed";
  28. reg = <0>;
  29. regulator-name = "usb_h1_vbus";
  30. regulator-min-microvolt = <5000000>;
  31. regulator-max-microvolt = <5000000>;
  32. enable-active-high;
  33. startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
  34. gpio = <&gpio7 12 0>;
  35. };
  36. };
  37. };
  38. &fec {
  39. pinctrl-names = "default";
  40. pinctrl-0 = <&pinctrl_enet>;
  41. phy-mode = "rgmii";
  42. status = "okay";
  43. };
  44. &hdmi {
  45. ddc-i2c-bus = <&i2c2>;
  46. status = "okay";
  47. };
  48. &i2c2 {
  49. clock-frequency = <100000>;
  50. pinctrl-names = "default";
  51. pinctrl-0 = <&pinctrl_i2c2>;
  52. status = "okay";
  53. };
  54. &iomuxc {
  55. imx6q-udoo {
  56. pinctrl_enet: enetgrp {
  57. fsl,pins = <
  58. MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
  59. MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
  60. MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
  61. MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
  62. MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
  63. MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
  64. MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
  65. MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
  66. MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
  67. MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
  68. MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
  69. MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
  70. MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
  71. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
  72. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
  73. MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
  74. >;
  75. };
  76. pinctrl_i2c2: i2c2grp {
  77. fsl,pins = <
  78. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  79. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  80. >;
  81. };
  82. pinctrl_uart2: uart2grp {
  83. fsl,pins = <
  84. MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
  85. MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
  86. >;
  87. };
  88. pinctrl_usbh: usbhgrp {
  89. fsl,pins = <
  90. MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
  91. MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
  92. >;
  93. };
  94. pinctrl_usdhc3: usdhc3grp {
  95. fsl,pins = <
  96. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  97. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  98. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  99. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  100. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  101. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  102. >;
  103. };
  104. };
  105. };
  106. &sata {
  107. status = "okay";
  108. };
  109. &uart2 {
  110. pinctrl-names = "default";
  111. pinctrl-0 = <&pinctrl_uart2>;
  112. status = "okay";
  113. };
  114. &usbh1 {
  115. pinctrl-names = "default";
  116. pinctrl-0 = <&pinctrl_usbh>;
  117. vbus-supply = <&reg_usb_h1_vbus>;
  118. clocks = <&clks 201>;
  119. status = "okay";
  120. };
  121. &usdhc3 {
  122. pinctrl-names = "default";
  123. pinctrl-0 = <&pinctrl_usdhc3>;
  124. non-removable;
  125. status = "okay";
  126. };