imx6qdl-dfi-fs700-m60.dtsi 4.6 KB

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  1. / {
  2. regulators {
  3. compatible = "simple-bus";
  4. #address-cells = <1>;
  5. #size-cells = <0>;
  6. dummy_reg: regulator@0 {
  7. compatible = "regulator-fixed";
  8. reg = <0>;
  9. regulator-name = "dummy-supply";
  10. };
  11. reg_usb_otg_vbus: regulator@1 {
  12. compatible = "regulator-fixed";
  13. reg = <1>;
  14. regulator-name = "usb_otg_vbus";
  15. regulator-min-microvolt = <5000000>;
  16. regulator-max-microvolt = <5000000>;
  17. gpio = <&gpio3 22 0>;
  18. enable-active-high;
  19. };
  20. };
  21. chosen {
  22. stdout-path = &uart1;
  23. };
  24. };
  25. &ecspi3 {
  26. fsl,spi-num-chipselects = <1>;
  27. cs-gpios = <&gpio4 24 0>;
  28. pinctrl-names = "default";
  29. pinctrl-0 = <&pinctrl_ecspi3>;
  30. status = "okay";
  31. flash: m25p80@0 {
  32. #address-cells = <1>;
  33. #size-cells = <1>;
  34. compatible = "sst,sst25vf040b", "m25p80";
  35. spi-max-frequency = <20000000>;
  36. reg = <0>;
  37. };
  38. };
  39. &fec {
  40. pinctrl-names = "default";
  41. pinctrl-0 = <&pinctrl_enet>;
  42. status = "okay";
  43. phy-mode = "rgmii";
  44. };
  45. &iomuxc {
  46. pinctrl-names = "default";
  47. pinctrl-0 = <&pinctrl_hog>;
  48. imx6qdl-dfi-fs700-m60 {
  49. pinctrl_hog: hoggrp {
  50. fsl,pins = <
  51. MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
  52. MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000 /* PMIC irq */
  53. MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x80000000 /* MAX11801 irq */
  54. MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000030b0 /* Backlight enable */
  55. >;
  56. };
  57. pinctrl_enet: enetgrp {
  58. fsl,pins = <
  59. MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
  60. MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
  61. MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
  62. MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
  63. MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
  64. MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
  65. MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
  66. MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
  67. MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
  68. MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
  69. MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
  70. MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
  71. MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
  72. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
  73. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
  74. MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
  75. >;
  76. };
  77. pinctrl_i2c2: i2c2grp {
  78. fsl,pins = <
  79. MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
  80. MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
  81. >;
  82. };
  83. pinctrl_uart1: uart1grp {
  84. fsl,pins = <
  85. MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
  86. MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
  87. >;
  88. };
  89. pinctrl_usbotg: usbotggrp {
  90. fsl,pins = <
  91. MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
  92. >;
  93. };
  94. pinctrl_usdhc2: usdhc2grp {
  95. fsl,pins = <
  96. MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
  97. MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
  98. MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
  99. MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
  100. MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
  101. MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
  102. MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 /* card detect */
  103. >;
  104. };
  105. pinctrl_usdhc3: usdhc3grp {
  106. fsl,pins = <
  107. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  108. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  109. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  110. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  111. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  112. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  113. >;
  114. };
  115. pinctrl_usdhc4: usdhc4grp {
  116. fsl,pins = <
  117. MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
  118. MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
  119. MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
  120. MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
  121. MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
  122. MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
  123. MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
  124. MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
  125. MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
  126. MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
  127. >;
  128. };
  129. pinctrl_ecspi3: ecspi3grp {
  130. fsl,pins = <
  131. MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
  132. MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
  133. MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
  134. MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
  135. >;
  136. };
  137. };
  138. };
  139. &i2c2 {
  140. pinctrl-names = "default";
  141. pinctrl-0 = <&pinctrl_i2c2>;
  142. status = "okay";
  143. };
  144. &uart1 {
  145. pinctrl-names = "default";
  146. pinctrl-0 = <&pinctrl_uart1>;
  147. status = "okay";
  148. };
  149. &usbh1 {
  150. status = "okay";
  151. };
  152. &usbotg {
  153. vbus-supply = <&reg_usb_otg_vbus>;
  154. pinctrl-names = "default";
  155. pinctrl-0 = <&pinctrl_usbotg>;
  156. disable-over-current;
  157. dr_mode = "host";
  158. status = "okay";
  159. };
  160. &usdhc2 { /* module slot */
  161. pinctrl-names = "default";
  162. pinctrl-0 = <&pinctrl_usdhc2>;
  163. cd-gpios = <&gpio2 2 0>;
  164. status = "okay";
  165. };
  166. &usdhc3 { /* baseboard slot */
  167. pinctrl-names = "default";
  168. pinctrl-0 = <&pinctrl_usdhc3>;
  169. };
  170. &usdhc4 { /* eMMC */
  171. pinctrl-names = "default";
  172. pinctrl-0 = <&pinctrl_usdhc4>;
  173. bus-width = <8>;
  174. non-removable;
  175. status = "okay";
  176. };