imx6qdl-gw52xx.dtsi 10.0 KB

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  1. /*
  2. * Copyright 2013 Gateworks Corporation
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. #include <dt-bindings/gpio/gpio.h>
  12. / {
  13. /* these are used by bootloader for disabling nodes */
  14. aliases {
  15. led0 = &led0;
  16. led1 = &led1;
  17. led2 = &led2;
  18. nand = &gpmi;
  19. ssi0 = &ssi1;
  20. usb0 = &usbh1;
  21. usb1 = &usbotg;
  22. };
  23. chosen {
  24. bootargs = "console=ttymxc1,115200";
  25. };
  26. backlight {
  27. compatible = "pwm-backlight";
  28. pwms = <&pwm4 0 5000000>;
  29. brightness-levels = <0 4 8 16 32 64 128 255>;
  30. default-brightness-level = <7>;
  31. };
  32. leds {
  33. compatible = "gpio-leds";
  34. pinctrl-names = "default";
  35. pinctrl-0 = <&pinctrl_gpio_leds>;
  36. led0: user1 {
  37. label = "user1";
  38. gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
  39. default-state = "on";
  40. linux,default-trigger = "heartbeat";
  41. };
  42. led1: user2 {
  43. label = "user2";
  44. gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
  45. default-state = "off";
  46. };
  47. led2: user3 {
  48. label = "user3";
  49. gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
  50. default-state = "off";
  51. };
  52. };
  53. memory {
  54. reg = <0x10000000 0x20000000>;
  55. };
  56. pps {
  57. compatible = "pps-gpio";
  58. pinctrl-names = "default";
  59. pinctrl-0 = <&pinctrl_pps>;
  60. gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
  61. status = "okay";
  62. };
  63. regulators {
  64. compatible = "simple-bus";
  65. #address-cells = <1>;
  66. #size-cells = <0>;
  67. reg_1p0v: regulator@0 {
  68. compatible = "regulator-fixed";
  69. reg = <0>;
  70. regulator-name = "1P0V";
  71. regulator-min-microvolt = <1000000>;
  72. regulator-max-microvolt = <1000000>;
  73. regulator-always-on;
  74. };
  75. /* remove this fixed regulator once ltc3676__sw2 driver available */
  76. reg_1p8v: regulator@1 {
  77. compatible = "regulator-fixed";
  78. reg = <1>;
  79. regulator-name = "1P8V";
  80. regulator-min-microvolt = <1800000>;
  81. regulator-max-microvolt = <1800000>;
  82. regulator-always-on;
  83. };
  84. reg_3p3v: regulator@2 {
  85. compatible = "regulator-fixed";
  86. reg = <2>;
  87. regulator-name = "3P3V";
  88. regulator-min-microvolt = <3300000>;
  89. regulator-max-microvolt = <3300000>;
  90. regulator-always-on;
  91. };
  92. reg_5p0v: regulator@3 {
  93. compatible = "regulator-fixed";
  94. reg = <3>;
  95. regulator-name = "5P0V";
  96. regulator-min-microvolt = <5000000>;
  97. regulator-max-microvolt = <5000000>;
  98. regulator-always-on;
  99. };
  100. reg_usb_otg_vbus: regulator@4 {
  101. compatible = "regulator-fixed";
  102. reg = <4>;
  103. regulator-name = "usb_otg_vbus";
  104. regulator-min-microvolt = <5000000>;
  105. regulator-max-microvolt = <5000000>;
  106. gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  107. enable-active-high;
  108. };
  109. };
  110. sound {
  111. compatible = "fsl,imx6q-ventana-sgtl5000",
  112. "fsl,imx-audio-sgtl5000";
  113. model = "sgtl5000-audio";
  114. ssi-controller = <&ssi1>;
  115. audio-codec = <&codec>;
  116. audio-routing =
  117. "MIC_IN", "Mic Jack",
  118. "Mic Jack", "Mic Bias",
  119. "Headphone Jack", "HP_OUT";
  120. mux-int-port = <1>;
  121. mux-ext-port = <4>;
  122. };
  123. };
  124. &audmux {
  125. pinctrl-names = "default";
  126. pinctrl-0 = <&pinctrl_audmux>;
  127. status = "okay";
  128. };
  129. &can1 {
  130. pinctrl-names = "default";
  131. pinctrl-0 = <&pinctrl_flexcan1>;
  132. status = "okay";
  133. };
  134. &fec {
  135. pinctrl-names = "default";
  136. pinctrl-0 = <&pinctrl_enet>;
  137. phy-mode = "rgmii";
  138. phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
  139. status = "okay";
  140. };
  141. &gpmi {
  142. pinctrl-names = "default";
  143. pinctrl-0 = <&pinctrl_gpmi_nand>;
  144. status = "okay";
  145. };
  146. &hdmi {
  147. ddc-i2c-bus = <&i2c3>;
  148. status = "okay";
  149. };
  150. &i2c1 {
  151. clock-frequency = <100000>;
  152. pinctrl-names = "default";
  153. pinctrl-0 = <&pinctrl_i2c1>;
  154. status = "okay";
  155. eeprom1: eeprom@50 {
  156. compatible = "atmel,24c02";
  157. reg = <0x50>;
  158. pagesize = <16>;
  159. };
  160. eeprom2: eeprom@51 {
  161. compatible = "atmel,24c02";
  162. reg = <0x51>;
  163. pagesize = <16>;
  164. };
  165. eeprom3: eeprom@52 {
  166. compatible = "atmel,24c02";
  167. reg = <0x52>;
  168. pagesize = <16>;
  169. };
  170. eeprom4: eeprom@53 {
  171. compatible = "atmel,24c02";
  172. reg = <0x53>;
  173. pagesize = <16>;
  174. };
  175. gpio: pca9555@23 {
  176. compatible = "nxp,pca9555";
  177. reg = <0x23>;
  178. gpio-controller;
  179. #gpio-cells = <2>;
  180. };
  181. rtc: ds1672@68 {
  182. compatible = "dallas,ds1672";
  183. reg = <0x68>;
  184. };
  185. };
  186. &i2c2 {
  187. clock-frequency = <100000>;
  188. pinctrl-names = "default";
  189. pinctrl-0 = <&pinctrl_i2c2>;
  190. status = "okay";
  191. };
  192. &i2c3 {
  193. clock-frequency = <100000>;
  194. pinctrl-names = "default";
  195. pinctrl-0 = <&pinctrl_i2c3>;
  196. status = "okay";
  197. codec: sgtl5000@0a {
  198. compatible = "fsl,sgtl5000";
  199. reg = <0x0a>;
  200. clocks = <&clks 201>;
  201. VDDA-supply = <&reg_1p8v>;
  202. VDDIO-supply = <&reg_3p3v>;
  203. };
  204. touchscreen: egalax_ts@04 {
  205. compatible = "eeti,egalax_ts";
  206. reg = <0x04>;
  207. interrupt-parent = <&gpio7>;
  208. interrupts = <12 2>;
  209. wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
  210. };
  211. };
  212. &ldb {
  213. status = "okay";
  214. lvds-channel@0 {
  215. fsl,data-mapping = "spwg";
  216. fsl,data-width = <18>;
  217. status = "okay";
  218. display-timings {
  219. native-mode = <&timing0>;
  220. timing0: hsd100pxn1 {
  221. clock-frequency = <65000000>;
  222. hactive = <1024>;
  223. vactive = <768>;
  224. hback-porch = <220>;
  225. hfront-porch = <40>;
  226. vback-porch = <21>;
  227. vfront-porch = <7>;
  228. hsync-len = <60>;
  229. vsync-len = <10>;
  230. };
  231. };
  232. };
  233. };
  234. &pcie {
  235. pinctrl-names = "default";
  236. pinctrl-0 = <&pinctrl_pcie>;
  237. reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
  238. status = "okay";
  239. };
  240. &pwm4 {
  241. pinctrl-names = "default";
  242. pinctrl-0 = <&pinctrl_pwm4>;
  243. status = "okay";
  244. };
  245. &ssi1 {
  246. fsl,mode = "i2s-slave";
  247. status = "okay";
  248. };
  249. &uart1 {
  250. pinctrl-names = "default";
  251. pinctrl-0 = <&pinctrl_uart1>;
  252. status = "okay";
  253. };
  254. &uart2 {
  255. pinctrl-names = "default";
  256. pinctrl-0 = <&pinctrl_uart2>;
  257. status = "okay";
  258. };
  259. &uart5 {
  260. pinctrl-names = "default";
  261. pinctrl-0 = <&pinctrl_uart5>;
  262. status = "okay";
  263. };
  264. &usbotg {
  265. vbus-supply = <&reg_usb_otg_vbus>;
  266. pinctrl-names = "default";
  267. pinctrl-0 = <&pinctrl_usbotg>;
  268. disable-over-current;
  269. status = "okay";
  270. };
  271. &usbh1 {
  272. status = "okay";
  273. };
  274. &usdhc3 {
  275. pinctrl-names = "default";
  276. pinctrl-0 = <&pinctrl_usdhc3>;
  277. cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
  278. vmmc-supply = <&reg_3p3v>;
  279. status = "okay";
  280. };
  281. &iomuxc {
  282. imx6qdl-gw52xx {
  283. pinctrl_audmux: audmuxgrp {
  284. fsl,pins = <
  285. MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
  286. MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
  287. MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
  288. MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
  289. MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
  290. >;
  291. };
  292. pinctrl_enet: enetgrp {
  293. fsl,pins = <
  294. MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
  295. MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
  296. MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
  297. MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
  298. MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
  299. MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
  300. MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
  301. MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
  302. MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
  303. MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
  304. MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
  305. MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
  306. MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
  307. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
  308. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
  309. MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
  310. MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 /* PHY Reset */
  311. >;
  312. };
  313. pinctrl_flexcan1: flexcan1grp {
  314. fsl,pins = <
  315. MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
  316. MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
  317. MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* CAN_STBY */
  318. >;
  319. };
  320. pinctrl_gpio_leds: gpioledsgrp {
  321. fsl,pins = <
  322. MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
  323. MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
  324. MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
  325. >;
  326. };
  327. pinctrl_gpmi_nand: gpminandgrp {
  328. fsl,pins = <
  329. MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
  330. MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
  331. MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
  332. MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
  333. MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
  334. MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
  335. MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
  336. MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
  337. MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
  338. MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
  339. MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
  340. MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
  341. MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
  342. MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
  343. MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
  344. MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
  345. >;
  346. };
  347. pinctrl_i2c1: i2c1grp {
  348. fsl,pins = <
  349. MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
  350. MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
  351. >;
  352. };
  353. pinctrl_i2c2: i2c2grp {
  354. fsl,pins = <
  355. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  356. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  357. >;
  358. };
  359. pinctrl_i2c3: i2c3grp {
  360. fsl,pins = <
  361. MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
  362. MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
  363. >;
  364. };
  365. pinctrl_pcie: pciegrp {
  366. fsl,pins = <
  367. MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE_RST# */
  368. >;
  369. };
  370. pinctrl_pps: ppsgrp {
  371. fsl,pins = <
  372. MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
  373. >;
  374. };
  375. pinctrl_pwm4: pwm4grp {
  376. fsl,pins = <
  377. MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
  378. >;
  379. };
  380. pinctrl_uart1: uart1grp {
  381. fsl,pins = <
  382. MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
  383. MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
  384. >;
  385. };
  386. pinctrl_uart2: uart2grp {
  387. fsl,pins = <
  388. MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
  389. MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
  390. >;
  391. };
  392. pinctrl_uart5: uart5grp {
  393. fsl,pins = <
  394. MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
  395. MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
  396. >;
  397. };
  398. pinctrl_usbotg: usbotggrp {
  399. fsl,pins = <
  400. MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
  401. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
  402. >;
  403. };
  404. pinctrl_usdhc3: usdhc3grp {
  405. fsl,pins = <
  406. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  407. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  408. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  409. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  410. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  411. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  412. MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
  413. >;
  414. };
  415. };
  416. };