imx6qdl-gw54xx.dtsi 12 KB

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  1. /*
  2. * Copyright 2013 Gateworks Corporation
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. #include <dt-bindings/gpio/gpio.h>
  12. / {
  13. /* these are used by bootloader for disabling nodes */
  14. aliases {
  15. ethernet1 = &eth1;
  16. led0 = &led0;
  17. led1 = &led1;
  18. led2 = &led2;
  19. nand = &gpmi;
  20. ssi0 = &ssi1;
  21. usb0 = &usbh1;
  22. usb1 = &usbotg;
  23. };
  24. chosen {
  25. bootargs = "console=ttymxc1,115200";
  26. };
  27. backlight {
  28. compatible = "pwm-backlight";
  29. pwms = <&pwm4 0 5000000>;
  30. brightness-levels = <0 4 8 16 32 64 128 255>;
  31. default-brightness-level = <7>;
  32. };
  33. leds {
  34. compatible = "gpio-leds";
  35. pinctrl-names = "default";
  36. pinctrl-0 = <&pinctrl_gpio_leds>;
  37. led0: user1 {
  38. label = "user1";
  39. gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
  40. default-state = "on";
  41. linux,default-trigger = "heartbeat";
  42. };
  43. led1: user2 {
  44. label = "user2";
  45. gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
  46. default-state = "off";
  47. };
  48. led2: user3 {
  49. label = "user3";
  50. gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
  51. default-state = "off";
  52. };
  53. };
  54. memory {
  55. reg = <0x10000000 0x40000000>;
  56. };
  57. pps {
  58. compatible = "pps-gpio";
  59. pinctrl-names = "default";
  60. pinctrl-0 = <&pinctrl_pps>;
  61. gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
  62. status = "okay";
  63. };
  64. regulators {
  65. compatible = "simple-bus";
  66. #address-cells = <1>;
  67. #size-cells = <0>;
  68. reg_1p0v: regulator@0 {
  69. compatible = "regulator-fixed";
  70. reg = <0>;
  71. regulator-name = "1P0V";
  72. regulator-min-microvolt = <1000000>;
  73. regulator-max-microvolt = <1000000>;
  74. regulator-always-on;
  75. };
  76. reg_3p3v: regulator@1 {
  77. compatible = "regulator-fixed";
  78. reg = <1>;
  79. regulator-name = "3P3V";
  80. regulator-min-microvolt = <3300000>;
  81. regulator-max-microvolt = <3300000>;
  82. regulator-always-on;
  83. };
  84. reg_usb_h1_vbus: regulator@2 {
  85. compatible = "regulator-fixed";
  86. reg = <2>;
  87. regulator-name = "usb_h1_vbus";
  88. regulator-min-microvolt = <5000000>;
  89. regulator-max-microvolt = <5000000>;
  90. regulator-always-on;
  91. };
  92. reg_usb_otg_vbus: regulator@3 {
  93. compatible = "regulator-fixed";
  94. reg = <3>;
  95. regulator-name = "usb_otg_vbus";
  96. regulator-min-microvolt = <5000000>;
  97. regulator-max-microvolt = <5000000>;
  98. gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  99. enable-active-high;
  100. };
  101. };
  102. sound {
  103. compatible = "fsl,imx6q-ventana-sgtl5000",
  104. "fsl,imx-audio-sgtl5000";
  105. model = "sgtl5000-audio";
  106. ssi-controller = <&ssi1>;
  107. audio-codec = <&codec>;
  108. audio-routing =
  109. "MIC_IN", "Mic Jack",
  110. "Mic Jack", "Mic Bias",
  111. "Headphone Jack", "HP_OUT";
  112. mux-int-port = <1>;
  113. mux-ext-port = <4>;
  114. };
  115. };
  116. &audmux {
  117. pinctrl-names = "default";
  118. pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
  119. status = "okay";
  120. };
  121. &can1 {
  122. pinctrl-names = "default";
  123. pinctrl-0 = <&pinctrl_flexcan1>;
  124. status = "okay";
  125. };
  126. &fec {
  127. pinctrl-names = "default";
  128. pinctrl-0 = <&pinctrl_enet>;
  129. phy-mode = "rgmii";
  130. phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
  131. status = "okay";
  132. };
  133. &gpmi {
  134. pinctrl-names = "default";
  135. pinctrl-0 = <&pinctrl_gpmi_nand>;
  136. status = "okay";
  137. };
  138. &hdmi {
  139. ddc-i2c-bus = <&i2c3>;
  140. status = "okay";
  141. };
  142. &i2c1 {
  143. clock-frequency = <100000>;
  144. pinctrl-names = "default";
  145. pinctrl-0 = <&pinctrl_i2c1>;
  146. status = "okay";
  147. eeprom1: eeprom@50 {
  148. compatible = "atmel,24c02";
  149. reg = <0x50>;
  150. pagesize = <16>;
  151. };
  152. eeprom2: eeprom@51 {
  153. compatible = "atmel,24c02";
  154. reg = <0x51>;
  155. pagesize = <16>;
  156. };
  157. eeprom3: eeprom@52 {
  158. compatible = "atmel,24c02";
  159. reg = <0x52>;
  160. pagesize = <16>;
  161. };
  162. eeprom4: eeprom@53 {
  163. compatible = "atmel,24c02";
  164. reg = <0x53>;
  165. pagesize = <16>;
  166. };
  167. gpio: pca9555@23 {
  168. compatible = "nxp,pca9555";
  169. reg = <0x23>;
  170. gpio-controller;
  171. #gpio-cells = <2>;
  172. };
  173. rtc: ds1672@68 {
  174. compatible = "dallas,ds1672";
  175. reg = <0x68>;
  176. };
  177. };
  178. &i2c2 {
  179. clock-frequency = <100000>;
  180. pinctrl-names = "default";
  181. pinctrl-0 = <&pinctrl_i2c2>;
  182. status = "okay";
  183. pmic: pfuze100@08 {
  184. compatible = "fsl,pfuze100";
  185. reg = <0x08>;
  186. regulators {
  187. sw1a_reg: sw1ab {
  188. regulator-min-microvolt = <300000>;
  189. regulator-max-microvolt = <1875000>;
  190. regulator-boot-on;
  191. regulator-always-on;
  192. regulator-ramp-delay = <6250>;
  193. };
  194. sw1c_reg: sw1c {
  195. regulator-min-microvolt = <300000>;
  196. regulator-max-microvolt = <1875000>;
  197. regulator-boot-on;
  198. regulator-always-on;
  199. regulator-ramp-delay = <6250>;
  200. };
  201. sw2_reg: sw2 {
  202. regulator-min-microvolt = <800000>;
  203. regulator-max-microvolt = <3950000>;
  204. regulator-boot-on;
  205. regulator-always-on;
  206. };
  207. sw3a_reg: sw3a {
  208. regulator-min-microvolt = <400000>;
  209. regulator-max-microvolt = <1975000>;
  210. regulator-boot-on;
  211. regulator-always-on;
  212. };
  213. sw3b_reg: sw3b {
  214. regulator-min-microvolt = <400000>;
  215. regulator-max-microvolt = <1975000>;
  216. regulator-boot-on;
  217. regulator-always-on;
  218. };
  219. sw4_reg: sw4 {
  220. regulator-min-microvolt = <800000>;
  221. regulator-max-microvolt = <3300000>;
  222. };
  223. swbst_reg: swbst {
  224. regulator-min-microvolt = <5000000>;
  225. regulator-max-microvolt = <5150000>;
  226. };
  227. snvs_reg: vsnvs {
  228. regulator-min-microvolt = <1000000>;
  229. regulator-max-microvolt = <3000000>;
  230. regulator-boot-on;
  231. regulator-always-on;
  232. };
  233. vref_reg: vrefddr {
  234. regulator-boot-on;
  235. regulator-always-on;
  236. };
  237. vgen1_reg: vgen1 {
  238. regulator-min-microvolt = <800000>;
  239. regulator-max-microvolt = <1550000>;
  240. };
  241. vgen2_reg: vgen2 {
  242. regulator-min-microvolt = <800000>;
  243. regulator-max-microvolt = <1550000>;
  244. };
  245. vgen3_reg: vgen3 {
  246. regulator-min-microvolt = <1800000>;
  247. regulator-max-microvolt = <3300000>;
  248. };
  249. vgen4_reg: vgen4 {
  250. regulator-min-microvolt = <1800000>;
  251. regulator-max-microvolt = <3300000>;
  252. regulator-always-on;
  253. };
  254. vgen5_reg: vgen5 {
  255. regulator-min-microvolt = <1800000>;
  256. regulator-max-microvolt = <3300000>;
  257. regulator-always-on;
  258. };
  259. vgen6_reg: vgen6 {
  260. regulator-min-microvolt = <1800000>;
  261. regulator-max-microvolt = <3300000>;
  262. regulator-always-on;
  263. };
  264. };
  265. };
  266. };
  267. &i2c3 {
  268. clock-frequency = <100000>;
  269. pinctrl-names = "default";
  270. pinctrl-0 = <&pinctrl_i2c3>;
  271. status = "okay";
  272. codec: sgtl5000@0a {
  273. compatible = "fsl,sgtl5000";
  274. reg = <0x0a>;
  275. clocks = <&clks 201>;
  276. VDDA-supply = <&sw4_reg>;
  277. VDDIO-supply = <&reg_3p3v>;
  278. };
  279. touchscreen: egalax_ts@04 {
  280. compatible = "eeti,egalax_ts";
  281. reg = <0x04>;
  282. interrupt-parent = <&gpio7>;
  283. interrupts = <12 2>;
  284. wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
  285. };
  286. };
  287. &ldb {
  288. status = "okay";
  289. lvds-channel@1 {
  290. fsl,data-mapping = "spwg";
  291. fsl,data-width = <18>;
  292. status = "okay";
  293. display-timings {
  294. native-mode = <&timing0>;
  295. timing0: hsd100pxn1 {
  296. clock-frequency = <65000000>;
  297. hactive = <1024>;
  298. vactive = <768>;
  299. hback-porch = <220>;
  300. hfront-porch = <40>;
  301. vback-porch = <21>;
  302. vfront-porch = <7>;
  303. hsync-len = <60>;
  304. vsync-len = <10>;
  305. };
  306. };
  307. };
  308. };
  309. &pcie {
  310. pinctrl-names = "default";
  311. pinctrl-0 = <&pinctrl_pcie>;
  312. reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
  313. status = "okay";
  314. eth1: sky2@8 { /* MAC/PHY on bus 8 */
  315. compatible = "marvell,sky2";
  316. };
  317. };
  318. &pwm4 {
  319. pinctrl-names = "default";
  320. pinctrl-0 = <&pinctrl_pwm4>;
  321. status = "okay";
  322. };
  323. &ssi1 {
  324. fsl,mode = "i2s-slave";
  325. status = "okay";
  326. };
  327. &ssi2 {
  328. fsl,mode = "i2s-slave";
  329. status = "okay";
  330. };
  331. &uart1 {
  332. pinctrl-names = "default";
  333. pinctrl-0 = <&pinctrl_uart1>;
  334. status = "okay";
  335. };
  336. &uart2 {
  337. pinctrl-names = "default";
  338. pinctrl-0 = <&pinctrl_uart2>;
  339. status = "okay";
  340. };
  341. &uart5 {
  342. pinctrl-names = "default";
  343. pinctrl-0 = <&pinctrl_uart5>;
  344. status = "okay";
  345. };
  346. &usbotg {
  347. vbus-supply = <&reg_usb_otg_vbus>;
  348. pinctrl-names = "default";
  349. pinctrl-0 = <&pinctrl_usbotg>;
  350. disable-over-current;
  351. status = "okay";
  352. };
  353. &usbh1 {
  354. vbus-supply = <&reg_usb_h1_vbus>;
  355. status = "okay";
  356. };
  357. &usdhc3 {
  358. pinctrl-names = "default";
  359. pinctrl-0 = <&pinctrl_usdhc3>;
  360. cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
  361. vmmc-supply = <&reg_3p3v>;
  362. status = "okay";
  363. };
  364. &iomuxc {
  365. imx6qdl-gw54xx {
  366. pinctrl_audmux: audmuxgrp {
  367. fsl,pins = <
  368. MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
  369. MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
  370. MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
  371. MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
  372. MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
  373. >;
  374. };
  375. pinctrl_enet: enetgrp {
  376. fsl,pins = <
  377. MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
  378. MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
  379. MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
  380. MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
  381. MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
  382. MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
  383. MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
  384. MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
  385. MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
  386. MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
  387. MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
  388. MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
  389. MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
  390. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
  391. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
  392. MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
  393. >;
  394. };
  395. pinctrl_flexcan1: flexcan1grp {
  396. fsl,pins = <
  397. MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
  398. MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
  399. MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
  400. >;
  401. };
  402. pinctrl_gpio_leds: gpioledsgrp {
  403. fsl,pins = <
  404. MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
  405. MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
  406. MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
  407. >;
  408. };
  409. pinctrl_gpmi_nand: gpminandgrp {
  410. fsl,pins = <
  411. MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
  412. MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
  413. MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
  414. MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
  415. MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
  416. MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
  417. MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
  418. MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
  419. MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
  420. MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
  421. MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
  422. MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
  423. MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
  424. MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
  425. MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
  426. MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
  427. >;
  428. };
  429. pinctrl_i2c1: i2c1grp {
  430. fsl,pins = <
  431. MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
  432. MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
  433. >;
  434. };
  435. pinctrl_i2c2: i2c2grp {
  436. fsl,pins = <
  437. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  438. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  439. >;
  440. };
  441. pinctrl_i2c3: i2c3grp {
  442. fsl,pins = <
  443. MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
  444. MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
  445. >;
  446. };
  447. pinctrl_pcie: pciegrp {
  448. fsl,pins = <
  449. MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
  450. MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
  451. >;
  452. };
  453. pinctrl_pps: ppsgrp {
  454. fsl,pins = <
  455. MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
  456. >;
  457. };
  458. pinctrl_pwm4: pwm4grp {
  459. fsl,pins = <
  460. MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
  461. >;
  462. };
  463. pinctrl_uart1: uart1grp {
  464. fsl,pins = <
  465. MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
  466. MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
  467. >;
  468. };
  469. pinctrl_uart2: uart2grp {
  470. fsl,pins = <
  471. MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
  472. MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
  473. >;
  474. };
  475. pinctrl_uart5: uart5grp {
  476. fsl,pins = <
  477. MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
  478. MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
  479. >;
  480. };
  481. pinctrl_usbotg: usbotggrp {
  482. fsl,pins = <
  483. MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
  484. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
  485. >;
  486. };
  487. pinctrl_usdhc3: usdhc3grp {
  488. fsl,pins = <
  489. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  490. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  491. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  492. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  493. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  494. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  495. >;
  496. };
  497. };
  498. };