imx6qdl-gw552x.dtsi 5.2 KB

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  1. /*
  2. * Copyright 2014 Gateworks Corporation
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. #include <dt-bindings/gpio/gpio.h>
  12. / {
  13. /* these are used by bootloader for disabling nodes */
  14. aliases {
  15. led0 = &led0;
  16. led1 = &led1;
  17. led2 = &led2;
  18. nand = &gpmi;
  19. usb0 = &usbh1;
  20. usb1 = &usbotg;
  21. };
  22. chosen {
  23. bootargs = "console=ttymxc1,115200";
  24. };
  25. leds {
  26. compatible = "gpio-leds";
  27. pinctrl-names = "default";
  28. pinctrl-0 = <&pinctrl_gpio_leds>;
  29. led0: user1 {
  30. label = "user1";
  31. gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
  32. default-state = "on";
  33. linux,default-trigger = "heartbeat";
  34. };
  35. led1: user2 {
  36. label = "user2";
  37. gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
  38. default-state = "off";
  39. };
  40. led2: user3 {
  41. label = "user3";
  42. gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
  43. default-state = "off";
  44. };
  45. };
  46. memory {
  47. reg = <0x10000000 0x20000000>;
  48. };
  49. regulators {
  50. compatible = "simple-bus";
  51. #address-cells = <1>;
  52. #size-cells = <0>;
  53. reg_1p0v: regulator@0 {
  54. compatible = "regulator-fixed";
  55. reg = <0>;
  56. regulator-name = "1P0V";
  57. regulator-min-microvolt = <1000000>;
  58. regulator-max-microvolt = <1000000>;
  59. regulator-always-on;
  60. };
  61. reg_3p3v: regulator@2 {
  62. compatible = "regulator-fixed";
  63. reg = <2>;
  64. regulator-name = "3P3V";
  65. regulator-min-microvolt = <3300000>;
  66. regulator-max-microvolt = <3300000>;
  67. regulator-always-on;
  68. };
  69. reg_5p0v: regulator@3 {
  70. compatible = "regulator-fixed";
  71. reg = <3>;
  72. regulator-name = "5P0V";
  73. regulator-min-microvolt = <5000000>;
  74. regulator-max-microvolt = <5000000>;
  75. regulator-always-on;
  76. };
  77. };
  78. };
  79. &gpmi {
  80. pinctrl-names = "default";
  81. pinctrl-0 = <&pinctrl_gpmi_nand>;
  82. status = "okay";
  83. };
  84. &hdmi {
  85. ddc-i2c-bus = <&i2c3>;
  86. status = "okay";
  87. };
  88. &i2c1 {
  89. clock-frequency = <100000>;
  90. pinctrl-names = "default";
  91. pinctrl-0 = <&pinctrl_i2c1>;
  92. status = "okay";
  93. eeprom1: eeprom@50 {
  94. compatible = "atmel,24c02";
  95. reg = <0x50>;
  96. pagesize = <16>;
  97. };
  98. eeprom2: eeprom@51 {
  99. compatible = "atmel,24c02";
  100. reg = <0x51>;
  101. pagesize = <16>;
  102. };
  103. eeprom3: eeprom@52 {
  104. compatible = "atmel,24c02";
  105. reg = <0x52>;
  106. pagesize = <16>;
  107. };
  108. eeprom4: eeprom@53 {
  109. compatible = "atmel,24c02";
  110. reg = <0x53>;
  111. pagesize = <16>;
  112. };
  113. gpio: pca9555@23 {
  114. compatible = "nxp,pca9555";
  115. reg = <0x23>;
  116. gpio-controller;
  117. #gpio-cells = <2>;
  118. };
  119. rtc: ds1672@68 {
  120. compatible = "dallas,ds1672";
  121. reg = <0x68>;
  122. };
  123. };
  124. &i2c2 {
  125. clock-frequency = <100000>;
  126. pinctrl-names = "default";
  127. pinctrl-0 = <&pinctrl_i2c2>;
  128. status = "okay";
  129. };
  130. &i2c3 {
  131. clock-frequency = <100000>;
  132. pinctrl-names = "default";
  133. pinctrl-0 = <&pinctrl_i2c3>;
  134. status = "okay";
  135. };
  136. &pcie {
  137. pinctrl-names = "default";
  138. pinctrl-0 = <&pinctrl_pcie>;
  139. reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
  140. status = "okay";
  141. };
  142. &uart2 {
  143. pinctrl-names = "default";
  144. pinctrl-0 = <&pinctrl_uart2>;
  145. status = "okay";
  146. };
  147. &uart3 {
  148. pinctrl-names = "default";
  149. pinctrl-0 = <&pinctrl_uart3>;
  150. status = "okay";
  151. };
  152. &uart5 {
  153. pinctrl-names = "default";
  154. pinctrl-0 = <&pinctrl_uart5>;
  155. status = "okay"; };
  156. &usbh1 {
  157. status = "okay";
  158. };
  159. &iomuxc {
  160. imx6qdl-gw552x {
  161. pinctrl_gpio_leds: gpioledsgrp {
  162. fsl,pins = <
  163. MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
  164. MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
  165. MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
  166. >;
  167. };
  168. pinctrl_gpmi_nand: gpminandgrp {
  169. fsl,pins = <
  170. MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
  171. MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
  172. MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
  173. MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
  174. MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
  175. MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
  176. MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
  177. MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
  178. MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
  179. MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
  180. MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
  181. MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
  182. MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
  183. MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
  184. MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
  185. MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
  186. >;
  187. };
  188. pinctrl_i2c1: i2c1grp {
  189. fsl,pins = <
  190. MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
  191. MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
  192. >;
  193. };
  194. pinctrl_i2c2: i2c2grp {
  195. fsl,pins = <
  196. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  197. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  198. >;
  199. };
  200. pinctrl_i2c3: i2c3grp {
  201. fsl,pins = <
  202. MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
  203. MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
  204. >;
  205. };
  206. pinctrl_pcie: pciegrp {
  207. fsl,pins = <
  208. MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
  209. >;
  210. };
  211. pinctrl_uart2: uart2grp {
  212. fsl,pins = <
  213. MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
  214. MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
  215. >;
  216. };
  217. pinctrl_uart3: uart3grp {
  218. fsl,pins = <
  219. MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
  220. MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
  221. >;
  222. };
  223. pinctrl_uart5: uart5grp {
  224. fsl,pins = <
  225. MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
  226. MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
  227. >;
  228. };
  229. };
  230. };