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imx6qdl-microsom-ar8035.dtsi

imx6qdl-microsom-ar8035.dtsi 2.0 KB
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  1. /*
    2. 

  2.  * Copyright (C) 2013,2014 Russell King
    3. 

  3.  *
    4. 

  4.  * This describes the hookup for an AR8035 to the iMX6 on the SolidRun
    5. 

  5.  * MicroSOM.
    6. 

  6.  */
    7. 

  7. &fec {
    8. 

  8. 	pinctrl-names = "default";
    9. 

  9. 	pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
    10. 

  10. 	phy-mode = "rgmii";
    11. 

  11. 	phy-reset-duration = <2>;
    12. 

  12. 	phy-reset-gpios = <&gpio4 15 0>;
    13. 

  13. 	status = "okay";
    14. 

  14. };
    15. 

  15. 

  16. &iomuxc {
    17. 

  17. 	enet {
    18. 

  18. 		pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
    19. 

  19. 			fsl,pins = <
    20. 

  20. 				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b8b0
    21. 

  21. 				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
    22. 

  22. 				/* AR8035 reset */
    23. 

  23. 				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x130b0
    24. 

  24. 				/* AR8035 interrupt */
    25. 

  25. 				MX6QDL_PAD_DI0_PIN2__GPIO4_IO18		0x80000000
    26. 

  26. 				/* GPIO16 -> AR8035 25MHz */
    27. 

  27. 				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0xc0000000
    28. 

  28. 				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x80000000
    29. 

  29. 				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
    30. 

  30. 				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
    31. 

  31. 				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
    32. 

  32. 				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
    33. 

  33. 				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
    34. 

  34. 				/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
    35. 

  35. 				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x0a0b1
    36. 

  36. 				/* AR8035 pin strapping: IO voltage: pull up */
    37. 

  37. 				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
    38. 

  38. 				/* AR8035 pin strapping: PHYADDR#0: pull down */
    39. 

  39. 				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x13030
    40. 

  40. 				/* AR8035 pin strapping: PHYADDR#1: pull down */
    41. 

  41. 				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x13030
    42. 

  42. 				/* AR8035 pin strapping: MODE#1: pull up */
    43. 

  43. 				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
    44. 

  44. 				/* AR8035 pin strapping: MODE#3: pull up */
    45. 

  45. 				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
    46. 

  46. 				/* AR8035 pin strapping: MODE#0: pull down */
    47. 

  47. 				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x13030
    48. 

  48. 

  49. 				/*
    50. 

  50. 				 * As the RMII pins are also connected to RGMII
    51. 

  51. 				 * so that an AR8030 can be placed, set these
    52. 

  52. 				 * to high-z with the same pulls as above.
    53. 

  53. 				 * Use the GPIO settings to avoid changing the
    54. 

  54. 				 * input select registers.
    55. 

  55. 				 */
    56. 

  56. 				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x03000
    57. 

  57. 				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x03000
    58. 

  58. 				MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x03000
    59. 

  59. 			>;
    60. 

  60. 		};
    61. 

  61. 	};
    62. 

  62. };
    63.