imx6qdl-nitrogen6x.dtsi 9.6 KB

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  1. /*
  2. * Copyright 2013 Boundary Devices, Inc.
  3. * Copyright 2011 Freescale Semiconductor, Inc.
  4. * Copyright 2011 Linaro Ltd.
  5. *
  6. * The code contained herein is licensed under the GNU General Public
  7. * License. You may obtain a copy of the GNU General Public License
  8. * Version 2 or later at the following locations:
  9. *
  10. * http://www.opensource.org/licenses/gpl-license.html
  11. * http://www.gnu.org/copyleft/gpl.html
  12. */
  13. #include <dt-bindings/gpio/gpio.h>
  14. #include <dt-bindings/input/input.h>
  15. / {
  16. chosen {
  17. stdout-path = &uart2;
  18. };
  19. memory {
  20. reg = <0x10000000 0x40000000>;
  21. };
  22. regulators {
  23. compatible = "simple-bus";
  24. #address-cells = <1>;
  25. #size-cells = <0>;
  26. reg_2p5v: regulator@0 {
  27. compatible = "regulator-fixed";
  28. reg = <0>;
  29. regulator-name = "2P5V";
  30. regulator-min-microvolt = <2500000>;
  31. regulator-max-microvolt = <2500000>;
  32. regulator-always-on;
  33. };
  34. reg_3p3v: regulator@1 {
  35. compatible = "regulator-fixed";
  36. reg = <1>;
  37. regulator-name = "3P3V";
  38. regulator-min-microvolt = <3300000>;
  39. regulator-max-microvolt = <3300000>;
  40. regulator-always-on;
  41. };
  42. reg_usb_otg_vbus: regulator@2 {
  43. compatible = "regulator-fixed";
  44. reg = <2>;
  45. regulator-name = "usb_otg_vbus";
  46. regulator-min-microvolt = <5000000>;
  47. regulator-max-microvolt = <5000000>;
  48. gpio = <&gpio3 22 0>;
  49. enable-active-high;
  50. };
  51. };
  52. gpio-keys {
  53. compatible = "gpio-keys";
  54. pinctrl-names = "default";
  55. pinctrl-0 = <&pinctrl_gpio_keys>;
  56. power {
  57. label = "Power Button";
  58. gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
  59. linux,code = <KEY_POWER>;
  60. gpio-key,wakeup;
  61. };
  62. menu {
  63. label = "Menu";
  64. gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  65. linux,code = <KEY_MENU>;
  66. };
  67. home {
  68. label = "Home";
  69. gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
  70. linux,code = <KEY_HOME>;
  71. };
  72. back {
  73. label = "Back";
  74. gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
  75. linux,code = <KEY_BACK>;
  76. };
  77. volume-up {
  78. label = "Volume Up";
  79. gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
  80. linux,code = <KEY_VOLUMEUP>;
  81. };
  82. volume-down {
  83. label = "Volume Down";
  84. gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
  85. linux,code = <KEY_VOLUMEDOWN>;
  86. };
  87. };
  88. sound {
  89. compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
  90. "fsl,imx-audio-sgtl5000";
  91. model = "imx6q-nitrogen6x-sgtl5000";
  92. ssi-controller = <&ssi1>;
  93. audio-codec = <&codec>;
  94. audio-routing =
  95. "MIC_IN", "Mic Jack",
  96. "Mic Jack", "Mic Bias",
  97. "Headphone Jack", "HP_OUT";
  98. mux-int-port = <1>;
  99. mux-ext-port = <3>;
  100. };
  101. backlight_lcd {
  102. compatible = "pwm-backlight";
  103. pwms = <&pwm1 0 5000000>;
  104. brightness-levels = <0 4 8 16 32 64 128 255>;
  105. default-brightness-level = <7>;
  106. power-supply = <&reg_3p3v>;
  107. status = "okay";
  108. };
  109. backlight_lvds {
  110. compatible = "pwm-backlight";
  111. pwms = <&pwm4 0 5000000>;
  112. brightness-levels = <0 4 8 16 32 64 128 255>;
  113. default-brightness-level = <7>;
  114. power-supply = <&reg_3p3v>;
  115. status = "okay";
  116. };
  117. };
  118. &audmux {
  119. pinctrl-names = "default";
  120. pinctrl-0 = <&pinctrl_audmux>;
  121. status = "okay";
  122. };
  123. &ecspi1 {
  124. fsl,spi-num-chipselects = <1>;
  125. cs-gpios = <&gpio3 19 0>;
  126. pinctrl-names = "default";
  127. pinctrl-0 = <&pinctrl_ecspi1>;
  128. status = "okay";
  129. flash: m25p80@0 {
  130. compatible = "sst,sst25vf016b";
  131. spi-max-frequency = <20000000>;
  132. reg = <0>;
  133. };
  134. };
  135. &fec {
  136. pinctrl-names = "default";
  137. pinctrl-0 = <&pinctrl_enet>;
  138. phy-mode = "rgmii";
  139. phy-reset-gpios = <&gpio1 27 0>;
  140. txen-skew-ps = <0>;
  141. txc-skew-ps = <3000>;
  142. rxdv-skew-ps = <0>;
  143. rxc-skew-ps = <3000>;
  144. rxd0-skew-ps = <0>;
  145. rxd1-skew-ps = <0>;
  146. rxd2-skew-ps = <0>;
  147. rxd3-skew-ps = <0>;
  148. txd0-skew-ps = <0>;
  149. txd1-skew-ps = <0>;
  150. txd2-skew-ps = <0>;
  151. txd3-skew-ps = <0>;
  152. interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
  153. <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
  154. status = "okay";
  155. };
  156. &hdmi {
  157. ddc-i2c-bus = <&i2c2>;
  158. status = "okay";
  159. };
  160. &i2c1 {
  161. clock-frequency = <100000>;
  162. pinctrl-names = "default";
  163. pinctrl-0 = <&pinctrl_i2c1>;
  164. status = "okay";
  165. codec: sgtl5000@0a {
  166. compatible = "fsl,sgtl5000";
  167. reg = <0x0a>;
  168. clocks = <&clks 201>;
  169. VDDA-supply = <&reg_2p5v>;
  170. VDDIO-supply = <&reg_3p3v>;
  171. };
  172. rtc: rtc@6f {
  173. compatible = "isil,isl1208";
  174. reg = <0x6f>;
  175. };
  176. };
  177. &i2c2 {
  178. clock-frequency = <100000>;
  179. pinctrl-names = "default";
  180. pinctrl-0 = <&pinctrl_i2c2>;
  181. status = "okay";
  182. };
  183. &i2c3 {
  184. clock-frequency = <100000>;
  185. pinctrl-names = "default";
  186. pinctrl-0 = <&pinctrl_i2c3>;
  187. status = "okay";
  188. };
  189. &iomuxc {
  190. pinctrl-names = "default";
  191. pinctrl-0 = <&pinctrl_hog>;
  192. imx6q-nitrogen6x {
  193. pinctrl_hog: hoggrp {
  194. fsl,pins = <
  195. /* SGTL5000 sys_mclk */
  196. MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
  197. >;
  198. };
  199. pinctrl_audmux: audmuxgrp {
  200. fsl,pins = <
  201. MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
  202. MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
  203. MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
  204. MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
  205. >;
  206. };
  207. pinctrl_ecspi1: ecspi1grp {
  208. fsl,pins = <
  209. MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
  210. MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
  211. MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
  212. MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
  213. >;
  214. };
  215. pinctrl_enet: enetgrp {
  216. fsl,pins = <
  217. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
  218. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
  219. MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
  220. MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
  221. MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
  222. MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
  223. MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
  224. MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
  225. MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
  226. MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
  227. MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
  228. MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
  229. MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
  230. MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
  231. MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
  232. /* Phy reset */
  233. MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0
  234. MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
  235. >;
  236. };
  237. pinctrl_gpio_keys: gpio_keysgrp {
  238. fsl,pins = <
  239. /* Power Button */
  240. MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
  241. /* Menu Button */
  242. MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
  243. /* Home Button */
  244. MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
  245. /* Back Button */
  246. MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
  247. /* Volume Up Button */
  248. MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
  249. /* Volume Down Button */
  250. MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
  251. >;
  252. };
  253. pinctrl_i2c1: i2c1grp {
  254. fsl,pins = <
  255. MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
  256. MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
  257. >;
  258. };
  259. pinctrl_i2c2: i2c2grp {
  260. fsl,pins = <
  261. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  262. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  263. >;
  264. };
  265. pinctrl_i2c3: i2c3grp {
  266. fsl,pins = <
  267. MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
  268. MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
  269. >;
  270. };
  271. pinctrl_pwm1: pwm1grp {
  272. fsl,pins = <
  273. MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
  274. >;
  275. };
  276. pinctrl_pwm3: pwm3grp {
  277. fsl,pins = <
  278. MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
  279. >;
  280. };
  281. pinctrl_pwm4: pwm4grp {
  282. fsl,pins = <
  283. MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
  284. >;
  285. };
  286. pinctrl_uart1: uart1grp {
  287. fsl,pins = <
  288. MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
  289. MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
  290. >;
  291. };
  292. pinctrl_uart2: uart2grp {
  293. fsl,pins = <
  294. MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
  295. MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
  296. >;
  297. };
  298. pinctrl_usbotg: usbotggrp {
  299. fsl,pins = <
  300. MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
  301. MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
  302. /* power enable, high active */
  303. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
  304. >;
  305. };
  306. pinctrl_usdhc3: usdhc3grp {
  307. fsl,pins = <
  308. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  309. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  310. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  311. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  312. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  313. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  314. MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
  315. >;
  316. };
  317. pinctrl_usdhc4: usdhc4grp {
  318. fsl,pins = <
  319. MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
  320. MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
  321. MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
  322. MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
  323. MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
  324. MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
  325. MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
  326. >;
  327. };
  328. };
  329. };
  330. &ldb {
  331. status = "okay";
  332. lvds-channel@0 {
  333. fsl,data-mapping = "spwg";
  334. fsl,data-width = <18>;
  335. status = "okay";
  336. display-timings {
  337. native-mode = <&timing0>;
  338. timing0: hsd100pxn1 {
  339. clock-frequency = <65000000>;
  340. hactive = <1024>;
  341. vactive = <768>;
  342. hback-porch = <220>;
  343. hfront-porch = <40>;
  344. vback-porch = <21>;
  345. vfront-porch = <7>;
  346. hsync-len = <60>;
  347. vsync-len = <10>;
  348. };
  349. };
  350. };
  351. };
  352. &pcie {
  353. status = "okay";
  354. };
  355. &pwm1 {
  356. pinctrl-names = "default";
  357. pinctrl-0 = <&pinctrl_pwm1>;
  358. status = "okay";
  359. };
  360. &pwm3 {
  361. pinctrl-names = "default";
  362. pinctrl-0 = <&pinctrl_pwm3>;
  363. status = "okay";
  364. };
  365. &pwm4 {
  366. pinctrl-names = "default";
  367. pinctrl-0 = <&pinctrl_pwm4>;
  368. status = "okay";
  369. };
  370. &ssi1 {
  371. status = "okay";
  372. };
  373. &uart1 {
  374. pinctrl-names = "default";
  375. pinctrl-0 = <&pinctrl_uart1>;
  376. status = "okay";
  377. };
  378. &uart2 {
  379. pinctrl-names = "default";
  380. pinctrl-0 = <&pinctrl_uart2>;
  381. status = "okay";
  382. };
  383. &usbh1 {
  384. status = "okay";
  385. };
  386. &usbotg {
  387. vbus-supply = <&reg_usb_otg_vbus>;
  388. pinctrl-names = "default";
  389. pinctrl-0 = <&pinctrl_usbotg>;
  390. disable-over-current;
  391. status = "okay";
  392. };
  393. &usdhc3 {
  394. pinctrl-names = "default";
  395. pinctrl-0 = <&pinctrl_usdhc3>;
  396. cd-gpios = <&gpio7 0 0>;
  397. vmmc-supply = <&reg_3p3v>;
  398. status = "okay";
  399. };
  400. &usdhc4 {
  401. pinctrl-names = "default";
  402. pinctrl-0 = <&pinctrl_usdhc4>;
  403. cd-gpios = <&gpio2 6 0>;
  404. vmmc-supply = <&reg_3p3v>;
  405. status = "okay";
  406. };