imx6qdl-sabrelite.dtsi 9.0 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. #include <dt-bindings/gpio/gpio.h>
  13. #include <dt-bindings/input/input.h>
  14. / {
  15. chosen {
  16. stdout-path = &uart2;
  17. };
  18. memory {
  19. reg = <0x10000000 0x40000000>;
  20. };
  21. regulators {
  22. compatible = "simple-bus";
  23. #address-cells = <1>;
  24. #size-cells = <0>;
  25. reg_2p5v: regulator@0 {
  26. compatible = "regulator-fixed";
  27. reg = <0>;
  28. regulator-name = "2P5V";
  29. regulator-min-microvolt = <2500000>;
  30. regulator-max-microvolt = <2500000>;
  31. regulator-always-on;
  32. };
  33. reg_3p3v: regulator@1 {
  34. compatible = "regulator-fixed";
  35. reg = <1>;
  36. regulator-name = "3P3V";
  37. regulator-min-microvolt = <3300000>;
  38. regulator-max-microvolt = <3300000>;
  39. regulator-always-on;
  40. };
  41. reg_usb_otg_vbus: regulator@2 {
  42. compatible = "regulator-fixed";
  43. reg = <2>;
  44. regulator-name = "usb_otg_vbus";
  45. regulator-min-microvolt = <5000000>;
  46. regulator-max-microvolt = <5000000>;
  47. gpio = <&gpio3 22 0>;
  48. enable-active-high;
  49. };
  50. };
  51. gpio-keys {
  52. compatible = "gpio-keys";
  53. pinctrl-names = "default";
  54. pinctrl-0 = <&pinctrl_gpio_keys>;
  55. power {
  56. label = "Power Button";
  57. gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
  58. linux,code = <KEY_POWER>;
  59. gpio-key,wakeup;
  60. };
  61. menu {
  62. label = "Menu";
  63. gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  64. linux,code = <KEY_MENU>;
  65. };
  66. home {
  67. label = "Home";
  68. gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
  69. linux,code = <KEY_HOME>;
  70. };
  71. back {
  72. label = "Back";
  73. gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
  74. linux,code = <KEY_BACK>;
  75. };
  76. volume-up {
  77. label = "Volume Up";
  78. gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
  79. linux,code = <KEY_VOLUMEUP>;
  80. };
  81. volume-down {
  82. label = "Volume Down";
  83. gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
  84. linux,code = <KEY_VOLUMEDOWN>;
  85. };
  86. };
  87. sound {
  88. compatible = "fsl,imx6q-sabrelite-sgtl5000",
  89. "fsl,imx-audio-sgtl5000";
  90. model = "imx6q-sabrelite-sgtl5000";
  91. ssi-controller = <&ssi1>;
  92. audio-codec = <&codec>;
  93. audio-routing =
  94. "MIC_IN", "Mic Jack",
  95. "Mic Jack", "Mic Bias",
  96. "Headphone Jack", "HP_OUT";
  97. mux-int-port = <1>;
  98. mux-ext-port = <4>;
  99. };
  100. backlight_lcd {
  101. compatible = "pwm-backlight";
  102. pwms = <&pwm1 0 5000000>;
  103. brightness-levels = <0 4 8 16 32 64 128 255>;
  104. default-brightness-level = <7>;
  105. power-supply = <&reg_3p3v>;
  106. status = "okay";
  107. };
  108. backlight_lvds {
  109. compatible = "pwm-backlight";
  110. pwms = <&pwm4 0 5000000>;
  111. brightness-levels = <0 4 8 16 32 64 128 255>;
  112. default-brightness-level = <7>;
  113. power-supply = <&reg_3p3v>;
  114. status = "okay";
  115. };
  116. };
  117. &audmux {
  118. pinctrl-names = "default";
  119. pinctrl-0 = <&pinctrl_audmux>;
  120. status = "okay";
  121. };
  122. &ecspi1 {
  123. fsl,spi-num-chipselects = <1>;
  124. cs-gpios = <&gpio3 19 0>;
  125. pinctrl-names = "default";
  126. pinctrl-0 = <&pinctrl_ecspi1>;
  127. status = "okay";
  128. flash: m25p80@0 {
  129. compatible = "sst,sst25vf016b";
  130. spi-max-frequency = <20000000>;
  131. reg = <0>;
  132. };
  133. };
  134. &fec {
  135. pinctrl-names = "default";
  136. pinctrl-0 = <&pinctrl_enet>;
  137. phy-mode = "rgmii";
  138. phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
  139. txen-skew-ps = <0>;
  140. txc-skew-ps = <3000>;
  141. rxdv-skew-ps = <0>;
  142. rxc-skew-ps = <3000>;
  143. rxd0-skew-ps = <0>;
  144. rxd1-skew-ps = <0>;
  145. rxd2-skew-ps = <0>;
  146. rxd3-skew-ps = <0>;
  147. txd0-skew-ps = <0>;
  148. txd1-skew-ps = <0>;
  149. txd2-skew-ps = <0>;
  150. txd3-skew-ps = <0>;
  151. interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
  152. <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
  153. status = "okay";
  154. };
  155. &i2c1 {
  156. clock-frequency = <100000>;
  157. pinctrl-names = "default";
  158. pinctrl-0 = <&pinctrl_i2c1>;
  159. status = "okay";
  160. codec: sgtl5000@0a {
  161. compatible = "fsl,sgtl5000";
  162. reg = <0x0a>;
  163. clocks = <&clks 201>;
  164. VDDA-supply = <&reg_2p5v>;
  165. VDDIO-supply = <&reg_3p3v>;
  166. };
  167. };
  168. &iomuxc {
  169. pinctrl-names = "default";
  170. pinctrl-0 = <&pinctrl_hog>;
  171. imx6q-sabrelite {
  172. pinctrl_hog: hoggrp {
  173. fsl,pins = <
  174. /* SGTL5000 sys_mclk */
  175. MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
  176. >;
  177. };
  178. pinctrl_audmux: audmuxgrp {
  179. fsl,pins = <
  180. MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
  181. MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
  182. MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
  183. MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
  184. >;
  185. };
  186. pinctrl_ecspi1: ecspi1grp {
  187. fsl,pins = <
  188. MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
  189. MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
  190. MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
  191. MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
  192. >;
  193. };
  194. pinctrl_enet: enetgrp {
  195. fsl,pins = <
  196. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
  197. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
  198. MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
  199. MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
  200. MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
  201. MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
  202. MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
  203. MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
  204. MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
  205. MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
  206. MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
  207. MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
  208. MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
  209. MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
  210. MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
  211. /* Phy reset */
  212. MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
  213. MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
  214. >;
  215. };
  216. pinctrl_gpio_keys: gpio_keysgrp {
  217. fsl,pins = <
  218. /* Power Button */
  219. MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
  220. /* Menu Button */
  221. MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
  222. /* Home Button */
  223. MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
  224. /* Back Button */
  225. MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
  226. /* Volume Up Button */
  227. MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
  228. /* Volume Down Button */
  229. MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
  230. >;
  231. };
  232. pinctrl_i2c1: i2c1grp {
  233. fsl,pins = <
  234. MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
  235. MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
  236. >;
  237. };
  238. pinctrl_pwm1: pwm1grp {
  239. fsl,pins = <
  240. MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
  241. >;
  242. };
  243. pinctrl_pwm3: pwm3grp {
  244. fsl,pins = <
  245. MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
  246. >;
  247. };
  248. pinctrl_pwm4: pwm4grp {
  249. fsl,pins = <
  250. MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
  251. >;
  252. };
  253. pinctrl_uart1: uart1grp {
  254. fsl,pins = <
  255. MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
  256. MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
  257. >;
  258. };
  259. pinctrl_uart2: uart2grp {
  260. fsl,pins = <
  261. MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
  262. MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
  263. >;
  264. };
  265. pinctrl_usbotg: usbotggrp {
  266. fsl,pins = <
  267. MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
  268. MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
  269. /* power enable, high active */
  270. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
  271. >;
  272. };
  273. pinctrl_usdhc3: usdhc3grp {
  274. fsl,pins = <
  275. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  276. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  277. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  278. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  279. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  280. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  281. MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
  282. MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
  283. >;
  284. };
  285. pinctrl_usdhc4: usdhc4grp {
  286. fsl,pins = <
  287. MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
  288. MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
  289. MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
  290. MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
  291. MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
  292. MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
  293. MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
  294. >;
  295. };
  296. };
  297. };
  298. &ldb {
  299. status = "okay";
  300. lvds-channel@0 {
  301. fsl,data-mapping = "spwg";
  302. fsl,data-width = <18>;
  303. status = "okay";
  304. display-timings {
  305. native-mode = <&timing0>;
  306. timing0: hsd100pxn1 {
  307. clock-frequency = <65000000>;
  308. hactive = <1024>;
  309. vactive = <768>;
  310. hback-porch = <220>;
  311. hfront-porch = <40>;
  312. vback-porch = <21>;
  313. vfront-porch = <7>;
  314. hsync-len = <60>;
  315. vsync-len = <10>;
  316. };
  317. };
  318. };
  319. };
  320. &pcie {
  321. status = "okay";
  322. };
  323. &pwm1 {
  324. pinctrl-names = "default";
  325. pinctrl-0 = <&pinctrl_pwm1>;
  326. status = "okay";
  327. };
  328. &pwm3 {
  329. pinctrl-names = "default";
  330. pinctrl-0 = <&pinctrl_pwm3>;
  331. status = "okay";
  332. };
  333. &pwm4 {
  334. pinctrl-names = "default";
  335. pinctrl-0 = <&pinctrl_pwm4>;
  336. status = "okay";
  337. };
  338. &ssi1 {
  339. status = "okay";
  340. };
  341. &uart1 {
  342. pinctrl-names = "default";
  343. pinctrl-0 = <&pinctrl_uart1>;
  344. status = "okay";
  345. };
  346. &uart2 {
  347. pinctrl-names = "default";
  348. pinctrl-0 = <&pinctrl_uart2>;
  349. status = "okay";
  350. };
  351. &usbh1 {
  352. status = "okay";
  353. };
  354. &usbotg {
  355. vbus-supply = <&reg_usb_otg_vbus>;
  356. pinctrl-names = "default";
  357. pinctrl-0 = <&pinctrl_usbotg>;
  358. disable-over-current;
  359. status = "okay";
  360. };
  361. &usdhc3 {
  362. pinctrl-names = "default";
  363. pinctrl-0 = <&pinctrl_usdhc3>;
  364. cd-gpios = <&gpio7 0 0>;
  365. wp-gpios = <&gpio7 1 0>;
  366. vmmc-supply = <&reg_3p3v>;
  367. status = "okay";
  368. };
  369. &usdhc4 {
  370. pinctrl-names = "default";
  371. pinctrl-0 = <&pinctrl_usdhc4>;
  372. cd-gpios = <&gpio2 6 0>;
  373. vmmc-supply = <&reg_3p3v>;
  374. status = "okay";
  375. };