keystone.dtsi 7.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289
  1. /*
  2. * Copyright 2013 Texas Instruments, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #include <dt-bindings/interrupt-controller/arm-gic.h>
  9. #include <dt-bindings/gpio/gpio.h>
  10. #include "skeleton.dtsi"
  11. / {
  12. model = "Texas Instruments Keystone 2 SoC";
  13. #address-cells = <2>;
  14. #size-cells = <2>;
  15. interrupt-parent = <&gic>;
  16. aliases {
  17. serial0 = &uart0;
  18. };
  19. memory {
  20. reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
  21. };
  22. gic: interrupt-controller {
  23. compatible = "arm,cortex-a15-gic";
  24. #interrupt-cells = <3>;
  25. interrupt-controller;
  26. reg = <0x0 0x02561000 0x0 0x1000>,
  27. <0x0 0x02562000 0x0 0x2000>,
  28. <0x0 0x02564000 0x0 0x1000>,
  29. <0x0 0x02566000 0x0 0x2000>;
  30. interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
  31. IRQ_TYPE_LEVEL_HIGH)>;
  32. };
  33. timer {
  34. compatible = "arm,armv7-timer";
  35. interrupts =
  36. <GIC_PPI 13
  37. (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  38. <GIC_PPI 14
  39. (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  40. <GIC_PPI 11
  41. (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
  42. <GIC_PPI 10
  43. (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
  44. };
  45. pmu {
  46. compatible = "arm,cortex-a15-pmu";
  47. interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
  48. <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
  49. <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
  50. <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
  51. };
  52. soc {
  53. #address-cells = <1>;
  54. #size-cells = <1>;
  55. compatible = "ti,keystone","simple-bus";
  56. interrupt-parent = <&gic>;
  57. ranges = <0x0 0x0 0x0 0xc0000000>;
  58. dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
  59. pllctrl: pll-controller@02310000 {
  60. compatible = "ti,keystone-pllctrl", "syscon";
  61. reg = <0x02310000 0x200>;
  62. };
  63. devctrl: device-state-control@02620000 {
  64. compatible = "ti,keystone-devctrl", "syscon";
  65. reg = <0x02620000 0x1000>;
  66. };
  67. rstctrl: reset-controller {
  68. compatible = "ti,keystone-reset";
  69. ti,syscon-pll = <&pllctrl 0xe4>;
  70. ti,syscon-dev = <&devctrl 0x328>;
  71. ti,wdt-list = <0>;
  72. };
  73. /include/ "keystone-clocks.dtsi"
  74. uart0: serial@02530c00 {
  75. compatible = "ns16550a";
  76. current-speed = <115200>;
  77. reg-shift = <2>;
  78. reg-io-width = <4>;
  79. reg = <0x02530c00 0x100>;
  80. clocks = <&clkuart0>;
  81. interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
  82. };
  83. uart1: serial@02531000 {
  84. compatible = "ns16550a";
  85. current-speed = <115200>;
  86. reg-shift = <2>;
  87. reg-io-width = <4>;
  88. reg = <0x02531000 0x100>;
  89. clocks = <&clkuart1>;
  90. interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
  91. };
  92. i2c0: i2c@2530000 {
  93. compatible = "ti,davinci-i2c";
  94. reg = <0x02530000 0x400>;
  95. clock-frequency = <100000>;
  96. clocks = <&clki2c>;
  97. interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>;
  98. #address-cells = <1>;
  99. #size-cells = <0>;
  100. };
  101. i2c1: i2c@2530400 {
  102. compatible = "ti,davinci-i2c";
  103. reg = <0x02530400 0x400>;
  104. clock-frequency = <100000>;
  105. clocks = <&clki2c>;
  106. interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>;
  107. #address-cells = <1>;
  108. #size-cells = <0>;
  109. };
  110. i2c2: i2c@2530800 {
  111. compatible = "ti,davinci-i2c";
  112. reg = <0x02530800 0x400>;
  113. clock-frequency = <100000>;
  114. clocks = <&clki2c>;
  115. interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>;
  116. #address-cells = <1>;
  117. #size-cells = <0>;
  118. };
  119. spi0: spi@21000400 {
  120. compatible = "ti,dm6441-spi";
  121. reg = <0x21000400 0x200>;
  122. num-cs = <4>;
  123. ti,davinci-spi-intr-line = <0>;
  124. interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>;
  125. clocks = <&clkspi>;
  126. #address-cells = <1>;
  127. #size-cells = <0>;
  128. };
  129. spi1: spi@21000600 {
  130. compatible = "ti,dm6441-spi";
  131. reg = <0x21000600 0x200>;
  132. num-cs = <4>;
  133. ti,davinci-spi-intr-line = <0>;
  134. interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>;
  135. clocks = <&clkspi>;
  136. #address-cells = <1>;
  137. #size-cells = <0>;
  138. };
  139. spi2: spi@21000800 {
  140. compatible = "ti,dm6441-spi";
  141. reg = <0x21000800 0x200>;
  142. num-cs = <4>;
  143. ti,davinci-spi-intr-line = <0>;
  144. interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
  145. clocks = <&clkspi>;
  146. #address-cells = <1>;
  147. #size-cells = <0>;
  148. };
  149. usb_phy: usb_phy@2620738 {
  150. compatible = "ti,keystone-usbphy";
  151. #address-cells = <1>;
  152. #size-cells = <1>;
  153. reg = <0x2620738 24>;
  154. status = "disabled";
  155. };
  156. usb: usb@2680000 {
  157. compatible = "ti,keystone-dwc3";
  158. #address-cells = <1>;
  159. #size-cells = <1>;
  160. reg = <0x2680000 0x10000>;
  161. clocks = <&clkusb>;
  162. clock-names = "usb";
  163. interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
  164. ranges;
  165. dma-coherent;
  166. dma-ranges;
  167. status = "disabled";
  168. dwc3@2690000 {
  169. compatible = "synopsys,dwc3";
  170. reg = <0x2690000 0x70000>;
  171. interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
  172. usb-phy = <&usb_phy>, <&usb_phy>;
  173. };
  174. };
  175. wdt: wdt@022f0080 {
  176. compatible = "ti,keystone-wdt","ti,davinci-wdt";
  177. reg = <0x022f0080 0x80>;
  178. clocks = <&clkwdtimer0>;
  179. };
  180. clock_event: timer@22f0000 {
  181. compatible = "ti,keystone-timer";
  182. reg = <0x022f0000 0x80>;
  183. interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>;
  184. clocks = <&clktimer15>;
  185. };
  186. gpio0: gpio@260bf00 {
  187. compatible = "ti,keystone-gpio";
  188. reg = <0x0260bf00 0x100>;
  189. gpio-controller;
  190. #gpio-cells = <2>;
  191. /* HW Interrupts mapped to GPIO pins */
  192. interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
  193. <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
  194. <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
  195. <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
  196. <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
  197. <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
  198. <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
  199. <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
  200. <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
  201. <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
  202. <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
  203. <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
  204. <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
  205. <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
  206. <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
  207. <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
  208. <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
  209. <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
  210. <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
  211. <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
  212. <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
  213. <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
  214. <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
  215. <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
  216. <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
  217. <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
  218. <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
  219. <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
  220. <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
  221. <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
  222. <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
  223. <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
  224. clocks = <&clkgpio>;
  225. clock-names = "gpio";
  226. ti,ngpio = <32>;
  227. ti,davinci-gpio-unbanked = <32>;
  228. };
  229. aemif: aemif@21000A00 {
  230. compatible = "ti,keystone-aemif", "ti,davinci-aemif";
  231. #address-cells = <2>;
  232. #size-cells = <1>;
  233. clocks = <&clkaemif>;
  234. clock-names = "aemif";
  235. clock-ranges;
  236. reg = <0x21000A00 0x00000100>;
  237. ranges = <0 0 0x30000000 0x10000000
  238. 1 0 0x21000A00 0x00000100>;
  239. };
  240. mdio: mdio@02090300 {
  241. compatible = "ti,keystone_mdio", "ti,davinci_mdio";
  242. #address-cells = <1>;
  243. #size-cells = <0>;
  244. reg = <0x02090300 0x100>;
  245. status = "disabled";
  246. clocks = <&clkpa>;
  247. clock-names = "fck";
  248. bus_freq = <2500000>;
  249. };
  250. kirq0: keystone_irq@26202a0 {
  251. compatible = "ti,keystone-irq";
  252. interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
  253. interrupt-controller;
  254. #interrupt-cells = <1>;
  255. ti,syscon-dev = <&devctrl 0x2a0>;
  256. };
  257. };
  258. };