kirkwood-openblocks_a7.dts 3.6 KB

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  1. /*
  2. * Device Tree file for OpenBlocks A7 board
  3. *
  4. * Copyright (C) 2013 Free Electrons
  5. *
  6. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. */
  12. /dts-v1/;
  13. #include "kirkwood.dtsi"
  14. #include "kirkwood-6282.dtsi"
  15. / {
  16. model = "Plat'Home OpenBlocksA7";
  17. compatible = "plathome,openblocks-a7", "marvell,kirkwood-88f6283", "marvell,kirkwood";
  18. memory {
  19. device_type = "memory";
  20. reg = <0x00000000 0x40000000>; /* 1 GB */
  21. };
  22. chosen {
  23. bootargs = "console=ttyS0,115200n8 earlyprintk";
  24. stdout-path = &uart0;
  25. };
  26. ocp@f1000000 {
  27. serial@12000 {
  28. status = "okay";
  29. };
  30. serial@12100 {
  31. status = "okay";
  32. };
  33. sata@80000 {
  34. nr-ports = <1>;
  35. status = "okay";
  36. };
  37. i2c@11100 {
  38. status = "okay";
  39. s24c02: s24c02@50 {
  40. compatible = "atmel,24c02";
  41. reg = <0x50>;
  42. };
  43. };
  44. pinctrl: pin-controller@10000 {
  45. pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header>;
  46. pinctrl-names = "default";
  47. pmx_uart0: pmx-uart0 {
  48. marvell,pins = "mpp10", "mpp11", "mpp15",
  49. "mpp16";
  50. marvell,function = "uart0";
  51. };
  52. pmx_uart1: pmx-uart1 {
  53. marvell,pins = "mpp13", "mpp14", "mpp8",
  54. "mpp9";
  55. marvell,function = "uart1";
  56. };
  57. pmx_sysrst: pmx-sysrst {
  58. marvell,pins = "mpp6";
  59. marvell,function = "sysrst";
  60. };
  61. pmx_dip_switches: pmx-dip-switches {
  62. marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47";
  63. marvell,function = "gpio";
  64. };
  65. /*
  66. * Accessible on connector J202. The MPP
  67. * listed below are pin 1-7, pin 8 is unused,
  68. * pin 9 is external reset input and pin 10 is
  69. * ground.
  70. */
  71. pmx_gpio_header: pmx-gpio-header {
  72. marvell,pins = "mpp17", "mpp7", "mpp29", "mpp28",
  73. "mpp35", "mpp34", "mpp40";
  74. marvell,function = "gpio";
  75. };
  76. pmx_gpio_init: pmx-init {
  77. marvell,pins = "mpp38";
  78. marvell,function = "gpio";
  79. };
  80. pmx_usb_oc: pmx-usb-oc {
  81. marvell,pins = "mpp39";
  82. marvell,function = "gpio";
  83. };
  84. pmx_leds: pmx-leds {
  85. marvell,pins = "mpp41", "mpp42", "mpp43";
  86. marvell,function = "gpio";
  87. };
  88. };
  89. };
  90. gpio-leds {
  91. compatible = "gpio-leds";
  92. pinctrl-0 = <&pmx_leds>;
  93. pinctrl-names = "default";
  94. led-red {
  95. label = "obsa7:red:stat";
  96. gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
  97. };
  98. led-green {
  99. label = "obsa7:green:stat";
  100. gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
  101. };
  102. led-yellow {
  103. label = "obsa7:yellow:stat";
  104. gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
  105. };
  106. };
  107. gpio_keys {
  108. compatible = "gpio-keys";
  109. pinctrl-0 = <&pmx_gpio_init>;
  110. pinctrl-names = "default";
  111. #address-cells = <1>;
  112. #size-cells = <0>;
  113. button@1 {
  114. label = "Init Button";
  115. linux,code = <KEY_POWER>;
  116. gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
  117. };
  118. };
  119. };
  120. &nand {
  121. chip-delay = <25>;
  122. status = "okay";
  123. partition@0 {
  124. label = "uboot";
  125. reg = <0x0 0x1c0000>;
  126. };
  127. partition@1c0000 {
  128. label = "env";
  129. reg = <0x1c0000 0x2c0000>;
  130. };
  131. partition@480000 {
  132. label = "test";
  133. reg = <0x480000 0x160000>;
  134. };
  135. partition@5e0000 {
  136. label = "conf";
  137. reg = <0x5e0000 0x540000>;
  138. };
  139. partition@b20000 {
  140. label = "linux";
  141. reg = <0xb20000 0x3d40000>;
  142. };
  143. partition@4860000 {
  144. label = "user";
  145. reg = <0x4860000 0xb7a0000>;
  146. };
  147. };
  148. &mdio {
  149. status = "okay";
  150. ethphy0: ethernet-phy@0 {
  151. reg = <0>;
  152. };
  153. ethphy1: ethernet-phy@1 {
  154. reg = <1>;
  155. };
  156. };
  157. &eth0 {
  158. status = "okay";
  159. ethernet0-port@0 {
  160. phy-handle = <&ethphy0>;
  161. };
  162. };
  163. &eth1 {
  164. status = "okay";
  165. ethernet1-port@0 {
  166. phy-handle = <&ethphy1>;
  167. };
  168. };