mlt8735m_f3gh.dts 14 KB

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  1. /dts-v1/;
  2. #include "mt6735m.dtsi"
  3. #include "mlt8735m_f3gh_bat_setting.dtsi"
  4. #include "cust.dtsi"
  5. / {
  6. memory@00000000 {
  7. device_type = "memory";
  8. reg = <0 0x40000000 0 0x3F000000>;
  9. };
  10. bus {
  11. compatible = "simple-bus";
  12. #address-cells = <1>;
  13. #size-cells = <1>;
  14. ranges = <0 0 0 0xffffffff>;
  15. MTKFB@5e200000 {
  16. compatible = "mediatek,MTKFB";
  17. reg = <0x7F000000 0x1000000>;
  18. };
  19. };
  20. led0:led@0 {
  21. compatible = "mediatek,red";
  22. led_mode = <0>;
  23. data = <1>;
  24. pwm_config = <0 0 0 0 0>;
  25. };
  26. led1:led@1 {
  27. compatible = "mediatek,green";
  28. led_mode = <0>;
  29. data = <1>;
  30. pwm_config = <0 0 0 0 0>;
  31. };
  32. led2:led@2 {
  33. compatible = "mediatek,blue";
  34. led_mode = <0>;
  35. data = <1>;
  36. pwm_config = <0 0 0 0 0>;
  37. };
  38. led3:led@3 {
  39. compatible = "mediatek,jogball-backlight";
  40. led_mode = <0>;
  41. data = <1>;
  42. pwm_config = <0 0 0 0 0>;
  43. };
  44. led4:led@4 {
  45. compatible = "mediatek,keyboard-backlight";
  46. led_mode = <0>;
  47. data = <1>;
  48. pwm_config = <0 0 0 0 0>;
  49. };
  50. led5:led@5 {
  51. compatible = "mediatek,button-backlight";
  52. led_mode = <0>;
  53. data = <1>;
  54. pwm_config = <0 0 0 0 0>;
  55. };
  56. led6:led@6 {
  57. compatible = "mediatek,lcd-backlight";
  58. led_mode = <5>;
  59. data = <1>;
  60. pwm_config = <0 0 0 0 0>;
  61. };
  62. vibrator0:vibrator@0 {
  63. compatible = "mediatek,vibrator";
  64. vib_timer = <25>;
  65. vib_limit = <9>;
  66. vib_vol= <5>;
  67. };
  68. /* sensor standardization */
  69. cust_accel@0 {
  70. compatible = "mediatek,bma222e_new";
  71. i2c_num = <2>;
  72. i2c_addr = <0x18 0 0 0>;
  73. direction = <5>;
  74. power_id = <0xffff>;
  75. power_vol = <0>;
  76. firlen = <16>;
  77. is_batch_supported = <0>;
  78. };
  79. cust_alsps@0 {
  80. compatible = "mediatek,apds9930";
  81. i2c_num = <2>;
  82. i2c_addr = <0x72 0x48 0x78 0x00>;
  83. polling_mode_ps = <0>;
  84. polling_mode_als = <1>;
  85. power_id = <0xffff>;
  86. power_vol = <0>;
  87. als_level = <1 2 5 10 20 30 40 80 200 300 400 600 1000 1600 2000>;
  88. als_value = <80 400 800 1200 1800 2000 2300 2300 12000 12000 12000 48000 48000 72000 81920 81920>;
  89. ps_threshold_high = <120>;
  90. ps_threshold_low = <100>;
  91. is_batch_supported_ps = <0>;
  92. is_batch_supported_als = <0>;
  93. };
  94. cust_mag@0 {
  95. compatible = "mediatek,akm09911";
  96. i2c_num = <2>;
  97. i2c_addr = <0x0D 0 0 0>;
  98. direction = <1>;
  99. power_id = <0xffff>;
  100. power_vol = <0>;
  101. is_batch_supported = <0>;
  102. };
  103. cust_gyro@0 {
  104. compatible = "mediatek,itg1010";
  105. i2c_num = <2>;
  106. i2c_addr = <0x68 0 0 0>;
  107. direction = <3>;
  108. power_id = <0xffff>;
  109. power_vol = <0>;
  110. firlen = <0>;
  111. is_batch_supported = <0>;
  112. };
  113. };
  114. /* sensor gpio standization */
  115. &pio {
  116. alsps_intpin_cfg: alspspincfg {
  117. pins_cmd_dat {
  118. pins = <PINMUX_GPIO65__FUNC_GPIO65>;
  119. slew-rate = <0>;
  120. bias-pull-up = <00>;
  121. };
  122. };
  123. alsps_intpin_default: alspsdefaultcfg {
  124. };
  125. gyro_intpin_cfg: gyropincfg {
  126. pins_cmd_dat {
  127. pins = <PINMUX_GPIO67__FUNC_GPIO67>;
  128. slew-rate = <0>;
  129. bias-pull-down = <00>;
  130. };
  131. };
  132. gyro_intpin_default: gyrodefaultcfg {
  133. };
  134. };
  135. &alsps {
  136. pinctrl-names = "pin_default", "pin_cfg";
  137. pinctrl-0 = <&alsps_intpin_default>;
  138. pinctrl-1 = <&alsps_intpin_cfg>;
  139. status = "okay";
  140. };
  141. &gyro {
  142. pinctrl-names = "pin_default", "pin_cfg";
  143. pinctrl-0 = <&gyro_intpin_default>;
  144. pinctrl-1 = <&gyro_intpin_cfg>;
  145. status = "okay";
  146. };
  147. /* sensor end */
  148. &accdet {
  149. interrupt-parent = <&eintc>;
  150. interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
  151. eint-debounce = <256>;
  152. accdet-gpio = <&pio 86 0>;
  153. accdet-mic-vol = <7>;
  154. headset-mode-setting = <0x500 0x200 1 0x1f0 0x800 0x800 0x20>;
  155. accdet-plugout-debounce = <20>;
  156. /*1:ACC mode, 2:low cost without in bias, 6:low cost with in bias*/
  157. accdet-mic-mode = <6>;
  158. /*0--MD_MAX--UP_MAX--DW_MAX*/
  159. headset-three-key-threshold = <0 80 220 500>;
  160. /*0--MD_MAX--VOICE_MAX--UP_MAX--DW_MAX*/
  161. headset-four-key-threshold = <0 58 121 192 450>;
  162. pinctrl-names = "default", "state_eint_as_int";
  163. pinctrl-0 = <&accdet_pins_default>;
  164. pinctrl-1 = <&accdet_pins_eint_as_int>;
  165. status = "okay";
  166. };
  167. &touch {
  168. tpd-resolution = <800 1280>;
  169. use-tpd-button = <0>;
  170. tpd-key-num = <3>;
  171. tpd-key-local= <139 172 158 0>;
  172. tpd-key-dim-local = <90 883 100 40 230 883 100 40 370 883 100 40 0 0 0 0>;
  173. tpd-max-touch-num = <5>;
  174. tpd-filter-enable = <1>;
  175. tpd-filter-pixel-density = <93>;
  176. tpd-filter-custom-prameters = <0 0 0 0 0 0 0 0 0 0 0 0>;
  177. tpd-filter-custom-speed = <0 0 0>;
  178. pinctrl-names = "default", "state_eint_as_int", "state_eint_output0", "state_eint_output1",
  179. "state_rst_output0", "state_rst_output1";
  180. pinctrl-0 = <&CTP_pins_default>;
  181. pinctrl-1 = <&CTP_pins_eint_as_int>;
  182. pinctrl-2 = <&CTP_pins_eint_output0>;
  183. pinctrl-3 = <&CTP_pins_eint_output1>;
  184. pinctrl-4 = <&CTP_pins_rst_output0>;
  185. pinctrl-5 = <&CTP_pins_rst_output1>;
  186. status = "okay";
  187. };
  188. &pio {
  189. accdet_pins_default: eint86default {
  190. };
  191. accdet_pins_eint_as_int: eint86 {
  192. pins_cmd_dat {
  193. pins = <PINMUX_GPIO86__FUNC_GPIO86>;
  194. bias-disable;
  195. };
  196. };
  197. CTP_pins_default: eint0default {
  198. };
  199. CTP_pins_eint_as_int: eint@0 {
  200. pins_cmd_dat {
  201. pins = <PINMUX_GPIO10__FUNC_GPIO10>;
  202. slew-rate = <0>;
  203. bias-disable;
  204. };
  205. };
  206. CTP_pins_eint_output0: eintoutput0 {
  207. pins_cmd_dat {
  208. pins = <PINMUX_GPIO10__FUNC_GPIO10>;
  209. slew-rate = <1>;
  210. output-low;
  211. };
  212. };
  213. CTP_pins_eint_output1: eintoutput1 {
  214. pins_cmd_dat {
  215. pins = <PINMUX_GPIO10__FUNC_GPIO10>;
  216. slew-rate = <1>;
  217. output-high;
  218. };
  219. };
  220. CTP_pins_rst_output0: rstoutput0 {
  221. pins_cmd_dat {
  222. pins = <PINMUX_GPIO62__FUNC_GPIO62>;
  223. slew-rate = <1>;
  224. output-low;
  225. };
  226. };
  227. CTP_pins_rst_output1: rstoutput1 {
  228. pins_cmd_dat {
  229. pins = <PINMUX_GPIO62__FUNC_GPIO62>;
  230. slew-rate = <1>;
  231. output-high;
  232. };
  233. };
  234. };
  235. /* TOUCH end */
  236. /* CAMERA GPIO standardization */
  237. &pio {
  238. camera_pins_cam0_rst0: cam0@0 {
  239. pins_cmd_dat {
  240. pins = <PINMUX_GPIO44__FUNC_GPIO44>;/*GPIO_CAMERA_CMRST_PIN*/
  241. slew-rate = <1>; /*direction 0:in, 1:out*/
  242. output-low;/*direction out used only. output_low or high*/
  243. };
  244. };
  245. camera_pins_cam0_rst1: cam0@1 {
  246. pins_cmd_dat {
  247. pins = <PINMUX_GPIO44__FUNC_GPIO44>;/*GPIO_CAMERA_CMRST_PIN*/
  248. slew-rate = <1>;
  249. output-high;
  250. };
  251. };
  252. camera_pins_cam0_pnd0: cam0@2 {
  253. pins_cmd_dat {
  254. pins = <PINMUX_GPIO82__FUNC_GPIO82>;/*GPIO_CAMERA_CMPDN_PIN*/
  255. slew-rate = <1>;
  256. output-low;
  257. };
  258. };
  259. camera_pins_cam0_pnd1: cam0@3 {
  260. pins_cmd_dat {
  261. pins = <PINMUX_GPIO82__FUNC_GPIO82>;/*GPIO_CAMERA_CMPDN_PIN*/
  262. slew-rate = <1>;
  263. output-high;
  264. };
  265. };
  266. camera_pins_cam1_rst0: cam1@0 {
  267. pins_cmd_dat {
  268. pins = <PINMUX_GPIO44__FUNC_GPIO44>;/*GPIO_CAMERA_CMRST1_PIN*/
  269. slew-rate = <1>; /*direction 0:in, 1:out*/
  270. output-low;/*direction out used only. output_low or high*/
  271. };
  272. };
  273. camera_pins_cam1_rst1: cam1@1 {
  274. pins_cmd_dat {
  275. pins = <PINMUX_GPIO44__FUNC_GPIO44>;/*GPIO_CAMERA_CMRST1_PIN*/
  276. slew-rate = <1>;
  277. output-high;
  278. };
  279. };
  280. camera_pins_cam1_pnd0: cam1@2 {
  281. pins_cmd_dat {
  282. pins = <PINMUX_GPIO12__FUNC_GPIO12>;/*GPIO_CAMERA_CMPDN1_PIN*/
  283. slew-rate = <1>;
  284. output-low;
  285. };
  286. };
  287. camera_pins_cam1_pnd1: cam1@3 {
  288. pins_cmd_dat {
  289. pins = <PINMUX_GPIO12__FUNC_GPIO12>;/*GPIO_CAMERA_CMPDN1_PIN*/
  290. slew-rate = <1>;
  291. output-high;
  292. };
  293. };
  294. camera_pins_cam_ldo0_0: cam@0 {
  295. pins_cmd_dat {
  296. pins = <PINMUX_GPIO11__FUNC_GPIO11>;/*GPIO_SPI_MOSI_PIN*/
  297. slew-rate = <1>;
  298. output-low;
  299. };
  300. };
  301. camera_pins_cam_ldo0_1: cam@1 {
  302. pins_cmd_dat {
  303. pins = <PINMUX_GPIO11__FUNC_GPIO11>;/*GPIO_SPI_MOSI_PIN*/
  304. slew-rate = <1>;
  305. output-high;
  306. };
  307. };
  308. camera_pins_default: camdefault {
  309. };
  310. };
  311. &kd_camera_hw1 {
  312. pinctrl-names = "default", "cam0_rst0", "cam0_rst1", "cam0_pnd0", "cam0_pnd1",
  313. "cam1_rst0", "cam1_rst1", "cam1_pnd0", "cam1_pnd1","cam_ldo0_0", "cam_ldo0_1";
  314. pinctrl-0 = <&camera_pins_default>;
  315. pinctrl-1 = <&camera_pins_cam0_rst0>;
  316. pinctrl-2 = <&camera_pins_cam0_rst1>;
  317. pinctrl-3 = <&camera_pins_cam0_pnd0>;
  318. pinctrl-4 = <&camera_pins_cam0_pnd1>;
  319. pinctrl-5 = <&camera_pins_cam1_rst0>;
  320. pinctrl-6 = <&camera_pins_cam1_rst1>;
  321. pinctrl-7 = <&camera_pins_cam1_pnd0>;
  322. pinctrl-8 = <&camera_pins_cam1_pnd1>;
  323. pinctrl-9 = <&camera_pins_cam_ldo0_0>;
  324. pinctrl-10 = <&camera_pins_cam_ldo0_1>;
  325. status = "okay";
  326. };
  327. /* CAMERA GPIO end */
  328. /* CONSYS GPIO standardization */
  329. &pio {
  330. consys_pins_default: default {
  331. };
  332. gpslna_pins_init: gpslna@0 {
  333. pins_cmd_dat {
  334. pins = <PINMUX_GPIO77__FUNC_GPIO77>;
  335. slew-rate = <0>;
  336. bias-disable;
  337. output-low;
  338. };
  339. };
  340. gpslna_pins_oh: gpslna@1 {
  341. pins_cmd_dat {
  342. pins = <PINMUX_GPIO77__FUNC_GPIO77>;
  343. slew-rate = <1>;
  344. output-high;
  345. };
  346. };
  347. gpslna_pins_ol: gpslna@2 {
  348. pins_cmd_dat {
  349. pins = <PINMUX_GPIO77__FUNC_GPIO77>;
  350. slew-rate = <1>;
  351. output-low;
  352. };
  353. };
  354. };
  355. &consys {
  356. pinctrl-names = "default", "gps_lna_state_init", "gps_lna_state_oh", "gps_lna_state_ol";
  357. pinctrl-0 = <&consys_pins_default>;
  358. pinctrl-1 = <&gpslna_pins_init>;
  359. pinctrl-2 = <&gpslna_pins_oh>;
  360. pinctrl-3 = <&gpslna_pins_ol>;
  361. status = "okay";
  362. };
  363. /* CONSYS end */
  364. /* mmc start */
  365. &mmc0 {
  366. clk_src = /bits/ 8 <MSDC50_CLKSRC_400MHZ>;
  367. bus-width = <8>;
  368. max-frequency = <200000000>;
  369. cap-mmc-highspeed;
  370. msdc-sys-suspend;
  371. mmc-ddr-1_8v;
  372. mmc-hs200-1_8v;
  373. mmc-hs400-1_8v;
  374. non-removable;
  375. pinctl = <&mmc0_pins_default>;
  376. register_setting = <&mmc0_register_setting_default>;
  377. host_function = /bits/ 8 <MSDC_EMMC>;
  378. bootable;
  379. status = "okay";
  380. };
  381. &mmc1 {
  382. clk_src = /bits/ 8 <MSDC30_CLKSRC_200MHZ>;
  383. bus-width = <4>;
  384. max-frequency = <200000000>;
  385. msdc-sys-suspend;
  386. sd_need_power;
  387. cap-sd-highspeed;
  388. sd-uhs-sdr12;
  389. sd-uhs-sdr25;
  390. sd-uhs-sdr50;
  391. sd-uhs-sdr104;
  392. sd-uhs-ddr50;
  393. pinctl = <&mmc1_pins_default>;
  394. pinctl_sdr104 = <&mmc1_pins_sdr104>;
  395. pinctl_sdr50 = <&mmc1_pins_sdr50>;
  396. pinctl_ddr50 = <&mmc1_pins_ddr50>;
  397. register_setting = <&mmc1_register_setting_default>;
  398. host_function = /bits/ 8 <MSDC_SD>;
  399. cd_level = /bits/ 8 <MSDC_CD_HIGH>;
  400. cd-gpios = <&pio 76 0>;
  401. status = "okay";
  402. };
  403. &pio {
  404. mmc0_pins_default: mmc0@default {
  405. pins_cmd {
  406. drive-strength = /bits/ 8 <2>;
  407. };
  408. pins_dat {
  409. drive-strength = /bits/ 8 <2>;
  410. };
  411. pins_clk {
  412. drive-strength = /bits/ 8 <2>;
  413. };
  414. pins_rst {
  415. drive-strength = /bits/ 8 <2>;
  416. };
  417. pins_ds {
  418. drive-strength = /bits/ 8 <2>;
  419. };
  420. };
  421. mmc0_register_setting_default: mmc0@register_default {
  422. dat0rddly = /bits/ 8 <0>;
  423. dat1rddly = /bits/ 8 <0>;
  424. dat2rddly = /bits/ 8 <0>;
  425. dat3rddly = /bits/ 8 <0>;
  426. dat4rddly = /bits/ 8 <0>;
  427. dat5rddly = /bits/ 8 <0>;
  428. dat6rddly = /bits/ 8 <0>;
  429. dat7rddly = /bits/ 8 <0>;
  430. datwrddly = /bits/ 8 <0>;
  431. cmdrrddly = /bits/ 8 <0>;
  432. cmdrddly = /bits/ 8 <0>;
  433. cmd_edge = /bits/ 8 <MSDC_SMPL_FALLING>;
  434. rdata_edge = /bits/ 8 <MSDC_SMPL_FALLING>;
  435. wdata_edge = /bits/ 8 <MSDC_SMPL_FALLING>;
  436. ett-hs200-cells = <12>;
  437. ett-hs200-default = <OFFSET_MSDC_PATCH_BIT0 MSDC_PB0_INT_DAT_LATCH_CK_SEL 0x0
  438. OFFSET_MSDC_PATCH_BIT0 MSDC_PB0_CKGEN_MSDC_DLY_SEL 0x0
  439. OFFSET_MSDC_PATCH_BIT1 MSDC_PB1_CMD_RSP_TA_CNTR 0x1
  440. OFFSET_MSDC_IOCON MSDC_IOCON_RSPL 0x1
  441. OFFSET_MSDC_PAD_TUNE0 MSDC_PAD_TUNE0_CMDRDLY 0x0
  442. OFFSET_MSDC_PAD_TUNE0 MSDC_PAD_TUNE0_CMDRRDLY 0x6
  443. OFFSET_MSDC_PATCH_BIT1 MSDC_PB1_WRDAT_CRCS_TA_CNTR 0x1
  444. OFFSET_MSDC_PAD_TUNE0 MSDC_PAD_TUNE0_DATWRDLY 0xf
  445. OFFSET_MSDC_IOCON MSDC_IOCON_W_D0SPL 0x1
  446. OFFSET_MSDC_DAT_RDDLY0 MSDC_DAT_RDDLY0_D0 0x5
  447. OFFSET_MSDC_PAD_TUNE0 MSDC_PAD_TUNE0_DATRRDLY 0x12
  448. OFFSET_MSDC_IOCON MSDC_IOCON_R_D_SMPL 0x0>;
  449. ett-hs400-cells = <8>;
  450. ett-hs400-default = <OFFSET_MSDC_PATCH_BIT0 MSDC_PB0_INT_DAT_LATCH_CK_SEL 0x0
  451. OFFSET_MSDC_PATCH_BIT0 MSDC_PB0_CKGEN_MSDC_DLY_SEL 0x0
  452. OFFSET_EMMC50_PAD_DS_TUNE MSDC_EMMC50_PAD_DS_TUNE_DLY1 0x5
  453. OFFSET_EMMC50_PAD_DS_TUNE MSDC_EMMC50_PAD_DS_TUNE_DLY3 0x12
  454. OFFSET_MSDC_PATCH_BIT1 MSDC_PB1_CMD_RSP_TA_CNTR 0x1
  455. OFFSET_MSDC_IOCON MSDC_IOCON_RSPL 0x1
  456. OFFSET_MSDC_PAD_TUNE0 MSDC_PAD_TUNE0_CMDRDLY 0x0
  457. OFFSET_MSDC_PAD_TUNE0 MSDC_PAD_TUNE0_CMDRRDLY 0xb>;
  458. };
  459. mmc1_pins_default: mmc1@default {
  460. pins_cmd {
  461. drive-strength = /bits/ 8 <3>;
  462. };
  463. pins_dat {
  464. drive-strength = /bits/ 8 <3>;
  465. };
  466. pins_clk {
  467. drive-strength = /bits/ 8 <3>;
  468. };
  469. };
  470. mmc1_pins_sdr104: mmc1@sdr104 {
  471. pins_cmd {
  472. drive-strength = /bits/ 8 <2>;
  473. };
  474. pins_dat {
  475. drive-strength = /bits/ 8 <2>;
  476. };
  477. pins_clk {
  478. drive-strength = /bits/ 8 <3>;
  479. };
  480. };
  481. mmc1_pins_sdr50: mmc1@sdr50 {
  482. pins_cmd {
  483. drive-strength = /bits/ 8 <2>;
  484. };
  485. pins_dat {
  486. drive-strength = /bits/ 8 <2>;
  487. };
  488. pins_clk {
  489. drive-strength = /bits/ 8 <3>;
  490. };
  491. };
  492. mmc1_pins_ddr50: mmc1@ddr50 {
  493. pins_cmd {
  494. drive-strength = /bits/ 8 <2>;
  495. };
  496. pins_dat {
  497. drive-strength = /bits/ 8 <2>;
  498. };
  499. pins_clk {
  500. drive-strength = /bits/ 8 <3>;
  501. };
  502. };
  503. mmc1_register_setting_default: mmc1@register_default {
  504. dat0rddly = /bits/ 8 <0>;
  505. dat1rddly = /bits/ 8 <0>;
  506. dat2rddly = /bits/ 8 <0>;
  507. dat3rddly = /bits/ 8 <0>;
  508. datwrddly = /bits/ 8 <0>;
  509. cmdrrddly = /bits/ 8 <0>;
  510. cmdrddly = /bits/ 8 <0>;
  511. cmd_edge = /bits/ 8 <MSDC_SMPL_FALLING>;
  512. rdata_edge = /bits/ 8 <MSDC_SMPL_FALLING>;
  513. wdata_edge = /bits/ 8 <MSDC_SMPL_FALLING>;
  514. };
  515. };
  516. /* mmc end */
  517. /* USB GPIO Kernal Standardization start */
  518. &pio {
  519. usb_default: usb_default {
  520. };
  521. gpio67_mode5_iddig: iddig_irq_init {
  522. pins_cmd_dat {
  523. pins = <PINMUX_GPIO67__FUNC_IDDIG>;
  524. slew-rate = <0>;
  525. bias-pull-up = <00>;
  526. };
  527. };
  528. gpio83_mode2_drvvbus: drvvbus_init {
  529. pins_cmd_dat {
  530. pins = <PINMUX_GPIO83__FUNC_USB_DRVVBUS>;
  531. slew-rate = <1>;
  532. bias-pull-up = <00>;
  533. };
  534. };
  535. gpio83_mode2_drvvbus_low: drvvbus_low {
  536. pins_cmd_dat {
  537. pins = <PINMUX_GPIO83__FUNC_USB_DRVVBUS>;
  538. slew-rate = <1>;
  539. output-low;
  540. };
  541. };
  542. gpio83_mode2_drvvbus_high: drvvbus_high {
  543. pins_cmd_dat {
  544. pins = <PINMUX_GPIO83__FUNC_USB_DRVVBUS>;
  545. slew-rate = <1>;
  546. output-high;
  547. };
  548. };
  549. };
  550. &usb0 {
  551. iddig_gpio = <67 1>;
  552. pinctrl-names = "usb_default", "iddig_irq_init", "drvvbus_init", "drvvbus_low", "drvvbus_high";
  553. pinctrl-0 = <&usb_default>;
  554. pinctrl-1 = <&gpio67_mode5_iddig>;
  555. pinctrl-2 = <&gpio83_mode2_drvvbus>;
  556. pinctrl-3 = <&gpio83_mode2_drvvbus_low>;
  557. pinctrl-4 = <&gpio83_mode2_drvvbus_high>;
  558. status = "okay";
  559. };
  560. /* USB GPIO Kernal Standardization end */
  561. /* LCM set */
  562. &lcm {
  563. lcm_power_gpio = <&pio 19 0>;
  564. lcm_reset_gpio = <&pio 146 0>;
  565. reg-lcm-supply = <&mt_pmic_vcama_ldo_reg>;
  566. };
  567. /* LCM end */
  568. /* i2c start */
  569. &i2c3 {
  570. ncp1854@36 {
  571. status = "okay";
  572. compatible = "ncp1854";
  573. reg = <0x36>;
  574. disable_ncp1854_fctry_mod = <1>;
  575. pinctrl-names = "drvvbus_init", "drvvbus_low";
  576. pinctrl-0 = <&gpio83_mode2_drvvbus>;
  577. pinctrl-1 = <&gpio83_mode2_drvvbus_low>;
  578. };
  579. };
  580. /* i2c end */