omap3-cm-t3x30.dtsi 2.4 KB

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  1. /*
  2. * Common support for CompuLab CM-T3x30 CoMs
  3. */
  4. #include "omap3-cm-t3x.dtsi"
  5. / {
  6. cpus {
  7. cpu@0 {
  8. cpu0-supply = <&vcc>;
  9. };
  10. };
  11. };
  12. &omap3_pmx_core {
  13. smsc1_pins: pinmux_smsc1_pins {
  14. pinctrl-single,pins = <
  15. OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs5.gpmc_ncs5 */
  16. OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 */
  17. >;
  18. };
  19. hsusb0_pins: pinmux_hsusb0_pins {
  20. pinctrl-single,pins = <
  21. OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
  22. OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
  23. OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
  24. OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
  25. OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */
  26. OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
  27. OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
  28. OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data3 */
  29. OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data4 */
  30. OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data5 */
  31. OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data6 */
  32. OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
  33. >;
  34. };
  35. };
  36. #include "omap-gpmc-smsc911x.dtsi"
  37. &gpmc {
  38. ranges = <5 0 0x2c000000 0x01000000>;
  39. smsc1: ethernet@gpmc {
  40. compatible = "smsc,lan9221", "smsc,lan9115";
  41. pinctrl-names = "default";
  42. pinctrl-0 = <&smsc1_pins>;
  43. interrupt-parent = <&gpio6>;
  44. interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
  45. reg = <5 0 0xff>;
  46. };
  47. };
  48. &i2c1 {
  49. twl: twl@48 {
  50. reg = <0x48>;
  51. interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  52. interrupt-parent = <&intc>;
  53. };
  54. };
  55. #include "twl4030.dtsi"
  56. #include "twl4030_omap3.dtsi"
  57. &mmc1 {
  58. vmmc-supply = <&vmmc1>;
  59. };
  60. &twl_gpio {
  61. ti,use-leds;
  62. /* pullups: BIT(0) */
  63. ti,pullups = <0x000001>;
  64. };
  65. &hsusb1_phy {
  66. reset-gpios = <&twl_gpio 6 GPIO_ACTIVE_LOW>;
  67. };
  68. &hsusb2_phy {
  69. reset-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>;
  70. };
  71. &usb_otg_hs {
  72. pinctrl-names = "default";
  73. pinctrl-0 = <&hsusb0_pins>;
  74. interface-type = <0>;
  75. usb-phy = <&usb2_phy>;
  76. phys = <&usb2_phy>;
  77. phy-names = "usb2-phy";
  78. mode = <3>;
  79. power = <50>;
  80. };