orion5x-maxtor-shared-storage-2.dts 3.6 KB

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  1. /*
  2. * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  3. * Copyright (C) Sylver Bruneau <sylver.bruneau@googlemail.com>
  4. *
  5. * This file is licensed under the terms of the GNU General Public
  6. * License version 2. This program is licensed "as is" without any
  7. * warranty of any kind, whether express or implied.
  8. */
  9. /dts-v1/;
  10. #include <dt-bindings/gpio/gpio.h>
  11. #include <dt-bindings/input/input.h>
  12. #include <dt-bindings/interrupt-controller/irq.h>
  13. #include "orion5x-mv88f5182.dtsi"
  14. / {
  15. model = "Maxtor Shared Storage II";
  16. compatible = "maxtor,shared-storage-2", "marvell,orion5x-88f5182", "marvell,orion5x";
  17. memory {
  18. reg = <0x00000000 0x4000000>; /* 64 MB */
  19. };
  20. chosen {
  21. bootargs = "console=ttyS0,115200n8 earlyprintk";
  22. linux,stdout-path = &uart0;
  23. };
  24. soc {
  25. ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
  26. <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
  27. <MBUS_ID(0x01, 0x0f) 0 0xff800000 0x40000>;
  28. };
  29. gpio-keys {
  30. compatible = "gpio-keys";
  31. pinctrl-0 = <&pmx_buttons>;
  32. pinctrl-names = "default";
  33. #address-cells = <1>;
  34. #size-cells = <0>;
  35. power {
  36. label = "Power";
  37. linux,code = <KEY_POWER>;
  38. gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  39. };
  40. reset {
  41. label = "Reset";
  42. linux,code = <KEY_RESTART>;
  43. gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  44. };
  45. };
  46. };
  47. &devbus_bootcs {
  48. status = "okay";
  49. devbus,keep-config;
  50. /*
  51. * Currently the MTD code does not recognize the MX29LV400CBCT
  52. * as a bottom-type device. This could cause risks of
  53. * accidentally erasing critical flash sectors. We thus define
  54. * a single, write-protected partition covering the whole
  55. * flash. TODO: once the flash part TOP/BOTTOM detection
  56. * issue is sorted out in the MTD code, break this into at
  57. * least three partitions: 'u-boot code', 'u-boot environment'
  58. * and 'whatever is left'.
  59. */
  60. flash@0 {
  61. compatible = "cfi-flash";
  62. reg = <0 0x40000>;
  63. bank-width = <1>;
  64. #address-cells = <1>;
  65. #size-cells = <1>;
  66. };
  67. };
  68. &mdio {
  69. status = "okay";
  70. ethphy: ethernet-phy {
  71. reg = <8>;
  72. };
  73. };
  74. &ehci0 {
  75. status = "okay";
  76. };
  77. &eth {
  78. status = "okay";
  79. ethernet-port@0 {
  80. phy-handle = <&ethphy>;
  81. };
  82. };
  83. &i2c {
  84. status = "okay";
  85. clock-frequency = <100000>;
  86. #address-cells = <1>;
  87. rtc@68 {
  88. compatible = "st,m41t81";
  89. reg = <0x68>;
  90. pinctrl-0 = <&pmx_rtc>;
  91. pinctrl-names = "default";
  92. interrupt-parent = <&gpio0>;
  93. interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
  94. };
  95. };
  96. &pinctrl {
  97. pinctrl-0 = <&pmx_leds &pmx_misc>;
  98. pinctrl-names = "default";
  99. pmx_buttons: pmx-buttons {
  100. marvell,pins = "mpp11", "mpp12";
  101. marvell,function = "gpio";
  102. };
  103. /*
  104. * MPP0: Power LED
  105. * MPP1: Error LED
  106. */
  107. pmx_leds: pmx-leds {
  108. marvell,pins = "mpp0", "mpp1";
  109. marvell,function = "gpio";
  110. };
  111. /*
  112. * MPP4: HDD ind. (Single/Dual)
  113. * MPP5: HD0 5V control
  114. * MPP6: HD0 12V control
  115. * MPP7: HD1 5V control
  116. * MPP8: HD1 12V control
  117. */
  118. pmx_misc: pmx-misc {
  119. marvell,pins = "mpp4", "mpp5", "mpp6", "mpp7", "mpp8", "mpp10";
  120. marvell,function = "gpio";
  121. };
  122. pmx_rtc: pmx-rtc {
  123. marvell,pins = "mpp3";
  124. marvell,function = "gpio";
  125. };
  126. pmx_sata0_led_active: pmx-sata0-led-active {
  127. marvell,pins = "mpp14";
  128. marvell,function = "sata0";
  129. };
  130. pmx_sata1_led_active: pmx-sata1-led-active {
  131. marvell,pins = "mpp15";
  132. marvell,function = "sata1";
  133. };
  134. /*
  135. * Non MPP GPIOs:
  136. * GPIO 22: USB port 1 fuse (0 = Fail, 1 = Ok)
  137. * GPIO 23: Blue front LED off
  138. * GPIO 24: Inhibit board power off (0 = Disabled, 1 = Enabled)
  139. */
  140. };
  141. &sata {
  142. pinctrl-0 = <&pmx_sata0_led_active
  143. &pmx_sata1_led_active>;
  144. pinctrl-names = "default";
  145. status = "okay";
  146. nr-ports = <2>;
  147. };
  148. &uart0 {
  149. status = "okay";
  150. };