pm9g45.dts 3.0 KB

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  1. /*
  2. * pm9g45.dts - Device Tree file for Ronetix pm9g45 board
  3. *
  4. * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  5. *
  6. * Licensed under GPLv2.
  7. */
  8. /dts-v1/;
  9. #include "at91sam9g45.dtsi"
  10. / {
  11. model = "Ronetix pm9g45";
  12. compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9";
  13. chosen {
  14. bootargs = "console=ttyS0,115200";
  15. };
  16. memory {
  17. reg = <0x70000000 0x8000000>;
  18. };
  19. clocks {
  20. #address-cells = <1>;
  21. #size-cells = <1>;
  22. ranges;
  23. main_clock: clock@0 {
  24. compatible = "atmel,osc", "fixed-clock";
  25. clock-frequency = <12000000>;
  26. };
  27. slow_xtal {
  28. clock-frequency = <32768>;
  29. };
  30. main_xtal {
  31. clock-frequency = <12000000>;
  32. };
  33. };
  34. ahb {
  35. apb {
  36. dbgu: serial@ffffee00 {
  37. status = "okay";
  38. };
  39. pinctrl@fffff200 {
  40. board {
  41. pinctrl_board_nand: nand0-board {
  42. atmel,pins =
  43. <AT91_PIOD 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD3 gpio RDY pin pull_up*/
  44. AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
  45. };
  46. };
  47. mmc {
  48. pinctrl_board_mmc: mmc0-board {
  49. atmel,pins =
  50. <AT91_PIOD 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD6 gpio CD pin pull_up and deglitch */
  51. };
  52. };
  53. };
  54. mmc0: mmc@fff80000 {
  55. pinctrl-0 = <
  56. &pinctrl_board_mmc
  57. &pinctrl_mmc0_slot0_clk_cmd_dat0
  58. &pinctrl_mmc0_slot0_dat1_3>;
  59. status = "okay";
  60. slot@0 {
  61. reg = <0>;
  62. bus-width = <4>;
  63. cd-gpios = <&pioD 6 GPIO_ACTIVE_HIGH>;
  64. };
  65. };
  66. macb0: ethernet@fffbc000 {
  67. phy-mode = "rmii";
  68. status = "okay";
  69. };
  70. };
  71. nand0: nand@40000000 {
  72. nand-bus-width = <8>;
  73. nand-ecc-mode = "soft";
  74. nand-on-flash-bbt;
  75. pinctrl-0 = <&pinctrl_board_nand>;
  76. gpios = <&pioD 3 GPIO_ACTIVE_HIGH
  77. &pioC 14 GPIO_ACTIVE_HIGH
  78. 0
  79. >;
  80. status = "okay";
  81. at91bootstrap@0 {
  82. label = "at91bootstrap";
  83. reg = <0x0 0x20000>;
  84. };
  85. barebox@20000 {
  86. label = "barebox";
  87. reg = <0x20000 0x40000>;
  88. };
  89. bareboxenv@60000 {
  90. label = "bareboxenv";
  91. reg = <0x60000 0x1A0000>;
  92. };
  93. kernel@200000 {
  94. label = "bareboxenv2";
  95. reg = <0x200000 0x300000>;
  96. };
  97. kernel@500000 {
  98. label = "root";
  99. reg = <0x500000 0x400000>;
  100. };
  101. data@900000 {
  102. label = "data";
  103. reg = <0x900000 0x8340000>;
  104. };
  105. };
  106. usb0: ohci@00700000 {
  107. status = "okay";
  108. num-ports = <2>;
  109. };
  110. usb1: ehci@00800000 {
  111. status = "okay";
  112. };
  113. };
  114. leds {
  115. compatible = "gpio-leds";
  116. led0 {
  117. label = "led0";
  118. gpios = <&pioD 0 GPIO_ACTIVE_LOW>;
  119. linux,default-trigger = "nand-disk";
  120. };
  121. led1 {
  122. label = "led1";
  123. gpios = <&pioD 31 GPIO_ACTIVE_HIGH>;
  124. linux,default-trigger = "heartbeat";
  125. };
  126. };
  127. gpio_keys {
  128. compatible = "gpio-keys";
  129. #address-cells = <1>;
  130. #size-cells = <0>;
  131. right {
  132. label = "SW4";
  133. gpios = <&pioE 7 GPIO_ACTIVE_LOW>;
  134. linux,code = <106>;
  135. };
  136. up {
  137. label = "SW3";
  138. gpios = <&pioE 8 GPIO_ACTIVE_LOW>;
  139. linux,code = <103>;
  140. };
  141. };
  142. };