s3c64xx.dtsi 5.0 KB

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  1. /*
  2. * Samsung's S3C64xx SoC series common device tree source
  3. *
  4. * Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
  5. *
  6. * Samsung's S3C64xx SoC series device nodes are listed in this file.
  7. * Particular SoCs from S3C64xx series can include this file and provide
  8. * values for SoCs specfic bindings.
  9. *
  10. * Note: This file does not include device nodes for all the controllers in
  11. * S3C64xx SoCs. As device tree coverage for S3C64xx increases, additional
  12. * nodes can be added to this file.
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License version 2 as
  16. * published by the Free Software Foundation.
  17. */
  18. #include "skeleton.dtsi"
  19. #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
  20. / {
  21. aliases {
  22. i2c0 = &i2c0;
  23. pinctrl0 = &pinctrl0;
  24. serial0 = &uart0;
  25. serial1 = &uart1;
  26. serial2 = &uart2;
  27. serial3 = &uart3;
  28. };
  29. cpus {
  30. #address-cells = <1>;
  31. #size-cells = <0>;
  32. cpu@0 {
  33. device_type = "cpu";
  34. compatible = "arm,arm1176jzf-s", "arm,arm1176";
  35. reg = <0x0>;
  36. };
  37. };
  38. soc: soc {
  39. compatible = "simple-bus";
  40. #address-cells = <1>;
  41. #size-cells = <1>;
  42. ranges;
  43. vic0: interrupt-controller@71200000 {
  44. compatible = "arm,pl192-vic";
  45. interrupt-controller;
  46. reg = <0x71200000 0x1000>;
  47. #interrupt-cells = <1>;
  48. };
  49. vic1: interrupt-controller@71300000 {
  50. compatible = "arm,pl192-vic";
  51. interrupt-controller;
  52. reg = <0x71300000 0x1000>;
  53. #interrupt-cells = <1>;
  54. };
  55. sdhci0: sdhci@7c200000 {
  56. compatible = "samsung,s3c6410-sdhci";
  57. reg = <0x7c200000 0x100>;
  58. interrupt-parent = <&vic1>;
  59. interrupts = <24>;
  60. clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
  61. clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>,
  62. <&clocks SCLK_MMC0>;
  63. status = "disabled";
  64. };
  65. sdhci1: sdhci@7c300000 {
  66. compatible = "samsung,s3c6410-sdhci";
  67. reg = <0x7c300000 0x100>;
  68. interrupt-parent = <&vic1>;
  69. interrupts = <25>;
  70. clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
  71. clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>,
  72. <&clocks SCLK_MMC1>;
  73. status = "disabled";
  74. };
  75. sdhci2: sdhci@7c400000 {
  76. compatible = "samsung,s3c6410-sdhci";
  77. reg = <0x7c400000 0x100>;
  78. interrupt-parent = <&vic1>;
  79. interrupts = <17>;
  80. clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
  81. clocks = <&clocks HCLK_HSMMC2>, <&clocks HCLK_HSMMC2>,
  82. <&clocks SCLK_MMC2>;
  83. status = "disabled";
  84. };
  85. watchdog: watchdog@7e004000 {
  86. compatible = "samsung,s3c2410-wdt";
  87. reg = <0x7e004000 0x1000>;
  88. interrupt-parent = <&vic0>;
  89. interrupts = <26>;
  90. clock-names = "watchdog";
  91. clocks = <&clocks PCLK_WDT>;
  92. status = "disabled";
  93. };
  94. i2c0: i2c@7f004000 {
  95. compatible = "samsung,s3c2440-i2c";
  96. reg = <0x7f004000 0x1000>;
  97. interrupt-parent = <&vic1>;
  98. interrupts = <18>;
  99. clock-names = "i2c";
  100. clocks = <&clocks PCLK_IIC0>;
  101. status = "disabled";
  102. #address-cells = <1>;
  103. #size-cells = <0>;
  104. };
  105. uart0: serial@7f005000 {
  106. compatible = "samsung,s3c6400-uart";
  107. reg = <0x7f005000 0x100>;
  108. interrupt-parent = <&vic1>;
  109. interrupts = <5>;
  110. clock-names = "uart", "clk_uart_baud2",
  111. "clk_uart_baud3";
  112. clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
  113. <&clocks SCLK_UART>;
  114. status = "disabled";
  115. };
  116. uart1: serial@7f005400 {
  117. compatible = "samsung,s3c6400-uart";
  118. reg = <0x7f005400 0x100>;
  119. interrupt-parent = <&vic1>;
  120. interrupts = <6>;
  121. clock-names = "uart", "clk_uart_baud2",
  122. "clk_uart_baud3";
  123. clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
  124. <&clocks SCLK_UART>;
  125. status = "disabled";
  126. };
  127. uart2: serial@7f005800 {
  128. compatible = "samsung,s3c6400-uart";
  129. reg = <0x7f005800 0x100>;
  130. interrupt-parent = <&vic1>;
  131. interrupts = <7>;
  132. clock-names = "uart", "clk_uart_baud2",
  133. "clk_uart_baud3";
  134. clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
  135. <&clocks SCLK_UART>;
  136. status = "disabled";
  137. };
  138. uart3: serial@7f005c00 {
  139. compatible = "samsung,s3c6400-uart";
  140. reg = <0x7f005c00 0x100>;
  141. interrupt-parent = <&vic1>;
  142. interrupts = <8>;
  143. clock-names = "uart", "clk_uart_baud2",
  144. "clk_uart_baud3";
  145. clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>,
  146. <&clocks SCLK_UART>;
  147. status = "disabled";
  148. };
  149. pwm: pwm@7f006000 {
  150. compatible = "samsung,s3c6400-pwm";
  151. reg = <0x7f006000 0x1000>;
  152. interrupt-parent = <&vic0>;
  153. interrupts = <23>, <24>, <25>, <27>, <28>;
  154. clock-names = "timers";
  155. clocks = <&clocks PCLK_PWM>;
  156. samsung,pwm-outputs = <0>, <1>;
  157. #pwm-cells = <3>;
  158. };
  159. pinctrl0: pinctrl@7f008000 {
  160. compatible = "samsung,s3c64xx-pinctrl";
  161. reg = <0x7f008000 0x1000>;
  162. interrupt-parent = <&vic1>;
  163. interrupts = <21>;
  164. pctrl_int_map: pinctrl-interrupt-map {
  165. interrupt-map = <0 &vic0 0>,
  166. <1 &vic0 1>,
  167. <2 &vic1 0>,
  168. <3 &vic1 1>;
  169. #address-cells = <0>;
  170. #size-cells = <0>;
  171. #interrupt-cells = <1>;
  172. };
  173. wakeup-interrupt-controller {
  174. compatible = "samsung,s3c64xx-wakeup-eint";
  175. interrupts = <0>, <1>, <2>, <3>;
  176. interrupt-parent = <&pctrl_int_map>;
  177. };
  178. };
  179. };
  180. };
  181. #include "s3c64xx-pinctrl.dtsi"