s5pv210.dtsi 15 KB

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  1. /*
  2. * Samsung's S5PV210 SoC device tree source
  3. *
  4. * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
  5. *
  6. * Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
  7. * Tomasz Figa <t.figa@samsung.com>
  8. *
  9. * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
  10. * based board files can include this file and provide values for board specfic
  11. * bindings.
  12. *
  13. * Note: This file does not include device nodes for all the controllers in
  14. * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
  15. * nodes can be added to this file.
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License version 2 as
  19. * published by the Free Software Foundation.
  20. */
  21. #include "skeleton.dtsi"
  22. #include <dt-bindings/clock/s5pv210.h>
  23. #include <dt-bindings/clock/s5pv210-audss.h>
  24. / {
  25. aliases {
  26. csis0 = &csis0;
  27. fimc0 = &fimc0;
  28. fimc1 = &fimc1;
  29. fimc2 = &fimc2;
  30. i2c0 = &i2c0;
  31. i2c1 = &i2c1;
  32. i2c2 = &i2c2;
  33. i2s0 = &i2s0;
  34. i2s1 = &i2s1;
  35. i2s2 = &i2s2;
  36. pinctrl0 = &pinctrl0;
  37. spi0 = &spi0;
  38. spi1 = &spi1;
  39. };
  40. cpus {
  41. #address-cells = <1>;
  42. #size-cells = <0>;
  43. cpu@0 {
  44. device_type = "cpu";
  45. compatible = "arm,cortex-a8";
  46. reg = <0>;
  47. };
  48. };
  49. soc {
  50. compatible = "simple-bus";
  51. #address-cells = <1>;
  52. #size-cells = <1>;
  53. ranges;
  54. external-clocks {
  55. compatible = "simple-bus";
  56. #address-cells = <1>;
  57. #size-cells = <0>;
  58. xxti: oscillator@0 {
  59. compatible = "fixed-clock";
  60. reg = <0>;
  61. clock-frequency = <0>;
  62. clock-output-names = "xxti";
  63. #clock-cells = <0>;
  64. };
  65. xusbxti: oscillator@1 {
  66. compatible = "fixed-clock";
  67. reg = <1>;
  68. clock-frequency = <0>;
  69. clock-output-names = "xusbxti";
  70. #clock-cells = <0>;
  71. };
  72. };
  73. onenand: onenand@b0000000 {
  74. compatible = "samsung,s5pv210-onenand";
  75. reg = <0xb0600000 0x2000>,
  76. <0xb0000000 0x20000>,
  77. <0xb0040000 0x20000>;
  78. interrupt-parent = <&vic1>;
  79. interrupts = <31>;
  80. clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
  81. clock-names = "bus", "onenand";
  82. #address-cells = <1>;
  83. #size-cells = <1>;
  84. status = "disabled";
  85. };
  86. chipid@e0000000 {
  87. compatible = "samsung,s5pv210-chipid";
  88. reg = <0xe0000000 0x1000>;
  89. };
  90. clocks: clock-controller@e0100000 {
  91. compatible = "samsung,s5pv210-clock", "simple-bus";
  92. reg = <0xe0100000 0x10000>;
  93. clock-names = "xxti", "xusbxti";
  94. clocks = <&xxti>, <&xusbxti>;
  95. #clock-cells = <1>;
  96. #address-cells = <1>;
  97. #size-cells = <1>;
  98. ranges;
  99. pmu_syscon: syscon@e0108000 {
  100. compatible = "samsung-s5pv210-pmu", "syscon";
  101. reg = <0xe0108000 0x8000>;
  102. };
  103. };
  104. pinctrl0: pinctrl@e0200000 {
  105. compatible = "samsung,s5pv210-pinctrl";
  106. reg = <0xe0200000 0x1000>;
  107. interrupt-parent = <&vic0>;
  108. interrupts = <30>;
  109. wakeup-interrupt-controller {
  110. compatible = "samsung,exynos4210-wakeup-eint";
  111. interrupts = <16>;
  112. interrupt-parent = <&vic0>;
  113. };
  114. };
  115. amba {
  116. #address-cells = <1>;
  117. #size-cells = <1>;
  118. compatible = "arm,amba-bus";
  119. ranges;
  120. pdma0: dma@e0900000 {
  121. compatible = "arm,pl330", "arm,primecell";
  122. reg = <0xe0900000 0x1000>;
  123. interrupt-parent = <&vic0>;
  124. interrupts = <19>;
  125. clocks = <&clocks CLK_PDMA0>;
  126. clock-names = "apb_pclk";
  127. #dma-cells = <1>;
  128. #dma-channels = <8>;
  129. #dma-requests = <32>;
  130. };
  131. pdma1: dma@e0a00000 {
  132. compatible = "arm,pl330", "arm,primecell";
  133. reg = <0xe0a00000 0x1000>;
  134. interrupt-parent = <&vic0>;
  135. interrupts = <20>;
  136. clocks = <&clocks CLK_PDMA1>;
  137. clock-names = "apb_pclk";
  138. #dma-cells = <1>;
  139. #dma-channels = <8>;
  140. #dma-requests = <32>;
  141. };
  142. };
  143. spi0: spi@e1300000 {
  144. compatible = "samsung,s5pv210-spi";
  145. reg = <0xe1300000 0x1000>;
  146. interrupt-parent = <&vic1>;
  147. interrupts = <15>;
  148. dmas = <&pdma0 7>, <&pdma0 6>;
  149. dma-names = "tx", "rx";
  150. clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
  151. clock-names = "spi", "spi_busclk0";
  152. pinctrl-names = "default";
  153. pinctrl-0 = <&spi0_bus>;
  154. #address-cells = <1>;
  155. #size-cells = <0>;
  156. status = "disabled";
  157. };
  158. spi1: spi@e1400000 {
  159. compatible = "samsung,s5pv210-spi";
  160. reg = <0xe1400000 0x1000>;
  161. interrupt-parent = <&vic1>;
  162. interrupts = <16>;
  163. dmas = <&pdma1 7>, <&pdma1 6>;
  164. dma-names = "tx", "rx";
  165. clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
  166. clock-names = "spi", "spi_busclk0";
  167. pinctrl-names = "default";
  168. pinctrl-0 = <&spi1_bus>;
  169. #address-cells = <1>;
  170. #size-cells = <0>;
  171. status = "disabled";
  172. };
  173. keypad: keypad@e1600000 {
  174. compatible = "samsung,s5pv210-keypad";
  175. reg = <0xe1600000 0x1000>;
  176. interrupt-parent = <&vic2>;
  177. interrupts = <25>;
  178. clocks = <&clocks CLK_KEYIF>;
  179. clock-names = "keypad";
  180. status = "disabled";
  181. };
  182. i2c0: i2c@e1800000 {
  183. compatible = "samsung,s3c2440-i2c";
  184. reg = <0xe1800000 0x1000>;
  185. interrupt-parent = <&vic1>;
  186. interrupts = <14>;
  187. clocks = <&clocks CLK_I2C0>;
  188. clock-names = "i2c";
  189. pinctrl-names = "default";
  190. pinctrl-0 = <&i2c0_bus>;
  191. #address-cells = <1>;
  192. #size-cells = <0>;
  193. status = "disabled";
  194. };
  195. i2c2: i2c@e1a00000 {
  196. compatible = "samsung,s3c2440-i2c";
  197. reg = <0xe1a00000 0x1000>;
  198. interrupt-parent = <&vic1>;
  199. interrupts = <19>;
  200. clocks = <&clocks CLK_I2C2>;
  201. clock-names = "i2c";
  202. pinctrl-0 = <&i2c2_bus>;
  203. pinctrl-names = "default";
  204. #address-cells = <1>;
  205. #size-cells = <0>;
  206. status = "disabled";
  207. };
  208. audio-subsystem {
  209. compatible = "samsung,s5pv210-audss", "simple-bus";
  210. #address-cells = <1>;
  211. #size-cells = <1>;
  212. ranges;
  213. clk_audss: clock-controller@eee10000 {
  214. compatible = "samsung,s5pv210-audss-clock";
  215. reg = <0xeee10000 0x1000>;
  216. clock-names = "hclk", "xxti",
  217. "fout_epll",
  218. "sclk_audio0";
  219. clocks = <&clocks DOUT_HCLKP>, <&xxti>,
  220. <&clocks FOUT_EPLL>,
  221. <&clocks SCLK_AUDIO0>;
  222. #clock-cells = <1>;
  223. };
  224. i2s0: i2s@eee30000 {
  225. compatible = "samsung,s5pv210-i2s";
  226. reg = <0xeee30000 0x1000>;
  227. interrupt-parent = <&vic2>;
  228. interrupts = <16>;
  229. dma-names = "rx", "tx", "tx-sec";
  230. dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
  231. clock-names = "iis",
  232. "i2s_opclk0",
  233. "i2s_opclk1";
  234. clocks = <&clk_audss CLK_I2S>,
  235. <&clk_audss CLK_I2S>,
  236. <&clk_audss CLK_DOUT_AUD_BUS>;
  237. samsung,idma-addr = <0xc0010000>;
  238. pinctrl-names = "default";
  239. pinctrl-0 = <&i2s0_bus>;
  240. #sound-dai-cells = <0>;
  241. status = "disabled";
  242. };
  243. };
  244. i2s1: i2s@e2100000 {
  245. compatible = "samsung,s3c6410-i2s";
  246. reg = <0xe2100000 0x1000>;
  247. interrupt-parent = <&vic2>;
  248. interrupts = <17>;
  249. dma-names = "rx", "tx";
  250. dmas = <&pdma1 12>, <&pdma1 13>;
  251. clock-names = "iis", "i2s_opclk0";
  252. clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
  253. pinctrl-names = "default";
  254. pinctrl-0 = <&i2s1_bus>;
  255. #sound-dai-cells = <0>;
  256. status = "disabled";
  257. };
  258. i2s2: i2s@e2a00000 {
  259. compatible = "samsung,s3c6410-i2s";
  260. reg = <0xe2a00000 0x1000>;
  261. interrupt-parent = <&vic2>;
  262. interrupts = <18>;
  263. dma-names = "rx", "tx";
  264. dmas = <&pdma1 14>, <&pdma1 15>;
  265. clock-names = "iis", "i2s_opclk0";
  266. clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
  267. pinctrl-names = "default";
  268. pinctrl-0 = <&i2s2_bus>;
  269. #sound-dai-cells = <0>;
  270. status = "disabled";
  271. };
  272. pwm: pwm@e2500000 {
  273. compatible = "samsung,s5pc100-pwm";
  274. reg = <0xe2500000 0x1000>;
  275. interrupt-parent = <&vic0>;
  276. interrupts = <21>, <22>, <23>, <24>, <25>;
  277. clock-names = "timers";
  278. clocks = <&clocks CLK_PWM>;
  279. #pwm-cells = <3>;
  280. };
  281. watchdog: watchdog@e2700000 {
  282. compatible = "samsung,s3c2410-wdt";
  283. reg = <0xe2700000 0x1000>;
  284. interrupt-parent = <&vic0>;
  285. interrupts = <26>;
  286. clock-names = "watchdog";
  287. clocks = <&clocks CLK_WDT>;
  288. };
  289. rtc: rtc@e2800000 {
  290. compatible = "samsung,s3c6410-rtc";
  291. reg = <0xe2800000 0x100>;
  292. interrupt-parent = <&vic0>;
  293. interrupts = <28>, <29>;
  294. clocks = <&clocks CLK_RTC>;
  295. clock-names = "rtc";
  296. status = "disabled";
  297. };
  298. uart0: serial@e2900000 {
  299. compatible = "samsung,s5pv210-uart";
  300. reg = <0xe2900000 0x400>;
  301. interrupt-parent = <&vic1>;
  302. interrupts = <10>;
  303. clock-names = "uart", "clk_uart_baud0",
  304. "clk_uart_baud1";
  305. clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
  306. <&clocks SCLK_UART0>;
  307. status = "disabled";
  308. };
  309. uart1: serial@e2900400 {
  310. compatible = "samsung,s5pv210-uart";
  311. reg = <0xe2900400 0x400>;
  312. interrupt-parent = <&vic1>;
  313. interrupts = <11>;
  314. clock-names = "uart", "clk_uart_baud0",
  315. "clk_uart_baud1";
  316. clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
  317. <&clocks SCLK_UART1>;
  318. status = "disabled";
  319. };
  320. uart2: serial@e2900800 {
  321. compatible = "samsung,s5pv210-uart";
  322. reg = <0xe2900800 0x400>;
  323. interrupt-parent = <&vic1>;
  324. interrupts = <12>;
  325. clock-names = "uart", "clk_uart_baud0",
  326. "clk_uart_baud1";
  327. clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
  328. <&clocks SCLK_UART2>;
  329. status = "disabled";
  330. };
  331. uart3: serial@e2900c00 {
  332. compatible = "samsung,s5pv210-uart";
  333. reg = <0xe2900c00 0x400>;
  334. interrupt-parent = <&vic1>;
  335. interrupts = <13>;
  336. clock-names = "uart", "clk_uart_baud0",
  337. "clk_uart_baud1";
  338. clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
  339. <&clocks SCLK_UART3>;
  340. status = "disabled";
  341. };
  342. sdhci0: sdhci@eb000000 {
  343. compatible = "samsung,s3c6410-sdhci";
  344. reg = <0xeb000000 0x100000>;
  345. interrupt-parent = <&vic1>;
  346. interrupts = <26>;
  347. clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
  348. clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
  349. <&clocks SCLK_MMC0>;
  350. status = "disabled";
  351. };
  352. sdhci1: sdhci@eb100000 {
  353. compatible = "samsung,s3c6410-sdhci";
  354. reg = <0xeb100000 0x100000>;
  355. interrupt-parent = <&vic1>;
  356. interrupts = <27>;
  357. clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
  358. clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
  359. <&clocks SCLK_MMC1>;
  360. status = "disabled";
  361. };
  362. sdhci2: sdhci@eb200000 {
  363. compatible = "samsung,s3c6410-sdhci";
  364. reg = <0xeb200000 0x100000>;
  365. interrupt-parent = <&vic1>;
  366. interrupts = <28>;
  367. clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
  368. clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
  369. <&clocks SCLK_MMC2>;
  370. status = "disabled";
  371. };
  372. sdhci3: sdhci@eb300000 {
  373. compatible = "samsung,s3c6410-sdhci";
  374. reg = <0xeb300000 0x100000>;
  375. interrupt-parent = <&vic3>;
  376. interrupts = <2>;
  377. clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3";
  378. clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
  379. <&clocks SCLK_MMC3>;
  380. status = "disabled";
  381. };
  382. hsotg: hsotg@ec000000 {
  383. compatible = "samsung,s3c6400-hsotg";
  384. reg = <0xec000000 0x20000>;
  385. interrupt-parent = <&vic1>;
  386. interrupts = <24>;
  387. clocks = <&clocks CLK_USB_OTG>;
  388. clock-names = "otg";
  389. phy-names = "usb2-phy";
  390. phys = <&usbphy 0>;
  391. status = "disabled";
  392. };
  393. usbphy: usbphy@ec100000 {
  394. compatible = "samsung,s5pv210-usb2-phy";
  395. reg = <0xec100000 0x100>;
  396. samsung,pmureg-phandle = <&pmu_syscon>;
  397. clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
  398. clock-names = "phy", "ref";
  399. #phy-cells = <1>;
  400. status = "disabled";
  401. };
  402. ehci: ehci@ec200000 {
  403. compatible = "samsung,exynos4210-ehci";
  404. reg = <0xec200000 0x100>;
  405. interrupts = <23>;
  406. interrupt-parent = <&vic1>;
  407. clocks = <&clocks CLK_USB_HOST>;
  408. clock-names = "usbhost";
  409. #address-cells = <1>;
  410. #size-cells = <0>;
  411. status = "disabled";
  412. port@0 {
  413. reg = <0>;
  414. phys = <&usbphy 1>;
  415. };
  416. };
  417. ohci: ohci@ec300000 {
  418. compatible = "samsung,exynos4210-ohci";
  419. reg = <0xec300000 0x100>;
  420. interrupts = <23>;
  421. clocks = <&clocks CLK_USB_HOST>;
  422. clock-names = "usbhost";
  423. #address-cells = <1>;
  424. #size-cells = <0>;
  425. status = "disabled";
  426. port@0 {
  427. reg = <0>;
  428. phys = <&usbphy 1>;
  429. };
  430. };
  431. mfc: codec@f1700000 {
  432. compatible = "samsung,mfc-v5";
  433. reg = <0xf1700000 0x10000>;
  434. interrupt-parent = <&vic2>;
  435. interrupts = <14>;
  436. clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
  437. clock-names = "sclk_mfc", "mfc";
  438. };
  439. vic0: interrupt-controller@f2000000 {
  440. compatible = "arm,pl192-vic";
  441. interrupt-controller;
  442. reg = <0xf2000000 0x1000>;
  443. #interrupt-cells = <1>;
  444. };
  445. vic1: interrupt-controller@f2100000 {
  446. compatible = "arm,pl192-vic";
  447. interrupt-controller;
  448. reg = <0xf2100000 0x1000>;
  449. #interrupt-cells = <1>;
  450. };
  451. vic2: interrupt-controller@f2200000 {
  452. compatible = "arm,pl192-vic";
  453. interrupt-controller;
  454. reg = <0xf2200000 0x1000>;
  455. #interrupt-cells = <1>;
  456. };
  457. vic3: interrupt-controller@f2300000 {
  458. compatible = "arm,pl192-vic";
  459. interrupt-controller;
  460. reg = <0xf2300000 0x1000>;
  461. #interrupt-cells = <1>;
  462. };
  463. fimd: fimd@f8000000 {
  464. compatible = "samsung,exynos4210-fimd";
  465. interrupt-parent = <&vic2>;
  466. reg = <0xf8000000 0x20000>;
  467. interrupt-names = "fifo", "vsync", "lcd_sys";
  468. interrupts = <0>, <1>, <2>;
  469. clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
  470. clock-names = "sclk_fimd", "fimd";
  471. status = "disabled";
  472. };
  473. g2d: g2d@fa000000 {
  474. compatible = "samsung,s5pv210-g2d";
  475. reg = <0xfa000000 0x1000>;
  476. interrupt-parent = <&vic2>;
  477. interrupts = <9>;
  478. clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
  479. clock-names = "sclk_fimg2d", "fimg2d";
  480. };
  481. mdma1: mdma@fa200000 {
  482. compatible = "arm,pl330", "arm,primecell";
  483. reg = <0xfa200000 0x1000>;
  484. interrupt-parent = <&vic0>;
  485. interrupts = <18>;
  486. clocks = <&clocks CLK_MDMA>;
  487. clock-names = "apb_pclk";
  488. #dma-cells = <1>;
  489. #dma-channels = <8>;
  490. #dma-requests = <1>;
  491. };
  492. i2c1: i2c@fab00000 {
  493. compatible = "samsung,s3c2440-i2c";
  494. reg = <0xfab00000 0x1000>;
  495. interrupt-parent = <&vic2>;
  496. interrupts = <13>;
  497. clocks = <&clocks CLK_I2C1>;
  498. clock-names = "i2c";
  499. pinctrl-names = "default";
  500. pinctrl-0 = <&i2c1_bus>;
  501. #address-cells = <1>;
  502. #size-cells = <0>;
  503. status = "disabled";
  504. };
  505. camera: camera {
  506. compatible = "samsung,fimc", "simple-bus";
  507. pinctrl-names = "default";
  508. pinctrl-0 = <>;
  509. clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
  510. clock-names = "sclk_cam0", "sclk_cam1";
  511. #address-cells = <1>;
  512. #size-cells = <1>;
  513. ranges;
  514. clock_cam: clock-controller {
  515. #clock-cells = <1>;
  516. };
  517. csis0: csis@fa600000 {
  518. compatible = "samsung,s5pv210-csis";
  519. reg = <0xfa600000 0x4000>;
  520. interrupt-parent = <&vic2>;
  521. interrupts = <29>;
  522. clocks = <&clocks CLK_CSIS>,
  523. <&clocks SCLK_CSIS>;
  524. clock-names = "clk_csis",
  525. "sclk_csis";
  526. bus-width = <4>;
  527. status = "disabled";
  528. #address-cells = <1>;
  529. #size-cells = <0>;
  530. };
  531. fimc0: fimc@fb200000 {
  532. compatible = "samsung,s5pv210-fimc";
  533. reg = <0xfb200000 0x1000>;
  534. interrupts = <5>;
  535. interrupt-parent = <&vic2>;
  536. clocks = <&clocks CLK_FIMC0>,
  537. <&clocks SCLK_FIMC0>;
  538. clock-names = "fimc",
  539. "sclk_fimc";
  540. samsung,pix-limits = <4224 8192 1920 4224>;
  541. samsung,mainscaler-ext;
  542. samsung,cam-if;
  543. };
  544. fimc1: fimc@fb300000 {
  545. compatible = "samsung,s5pv210-fimc";
  546. reg = <0xfb300000 0x1000>;
  547. interrupt-parent = <&vic2>;
  548. interrupts = <6>;
  549. clocks = <&clocks CLK_FIMC1>,
  550. <&clocks SCLK_FIMC1>;
  551. clock-names = "fimc",
  552. "sclk_fimc";
  553. samsung,pix-limits = <4224 8192 1920 4224>;
  554. samsung,mainscaler-ext;
  555. samsung,cam-if;
  556. };
  557. fimc2: fimc@fb400000 {
  558. compatible = "samsung,s5pv210-fimc";
  559. reg = <0xfb400000 0x1000>;
  560. interrupt-parent = <&vic2>;
  561. interrupts = <7>;
  562. clocks = <&clocks CLK_FIMC2>,
  563. <&clocks SCLK_FIMC2>;
  564. clock-names = "fimc",
  565. "sclk_fimc";
  566. samsung,pix-limits = <4224 8192 1920 4224>;
  567. samsung,mainscaler-ext;
  568. samsung,lcd-wb;
  569. };
  570. };
  571. };
  572. };
  573. #include "s5pv210-pinctrl.dtsi"