sh73a0.dtsi 8.3 KB

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  1. /*
  2. * Device Tree Source for the SH73A0 SoC
  3. *
  4. * Copyright (C) 2012 Renesas Solutions Corp.
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. /include/ "skeleton.dtsi"
  11. #include <dt-bindings/interrupt-controller/irq.h>
  12. / {
  13. compatible = "renesas,sh73a0";
  14. interrupt-parent = <&gic>;
  15. cpus {
  16. #address-cells = <1>;
  17. #size-cells = <0>;
  18. cpu@0 {
  19. device_type = "cpu";
  20. compatible = "arm,cortex-a9";
  21. reg = <0>;
  22. clock-frequency = <1196000000>;
  23. };
  24. cpu@1 {
  25. device_type = "cpu";
  26. compatible = "arm,cortex-a9";
  27. reg = <1>;
  28. clock-frequency = <1196000000>;
  29. };
  30. };
  31. gic: interrupt-controller@f0001000 {
  32. compatible = "arm,cortex-a9-gic";
  33. #interrupt-cells = <3>;
  34. interrupt-controller;
  35. reg = <0xf0001000 0x1000>,
  36. <0xf0000100 0x100>;
  37. };
  38. pmu {
  39. compatible = "arm,cortex-a9-pmu";
  40. interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>,
  41. <0 56 IRQ_TYPE_LEVEL_HIGH>;
  42. };
  43. cmt1: timer@e6138000 {
  44. compatible = "renesas,cmt-48-sh73a0", "renesas,cmt-48";
  45. reg = <0xe6138000 0x200>;
  46. interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>;
  47. renesas,channels-mask = <0x3f>;
  48. status = "disabled";
  49. };
  50. irqpin0: irqpin@e6900000 {
  51. compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
  52. #interrupt-cells = <2>;
  53. interrupt-controller;
  54. reg = <0xe6900000 4>,
  55. <0xe6900010 4>,
  56. <0xe6900020 1>,
  57. <0xe6900040 1>,
  58. <0xe6900060 1>;
  59. interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH
  60. 0 2 IRQ_TYPE_LEVEL_HIGH
  61. 0 3 IRQ_TYPE_LEVEL_HIGH
  62. 0 4 IRQ_TYPE_LEVEL_HIGH
  63. 0 5 IRQ_TYPE_LEVEL_HIGH
  64. 0 6 IRQ_TYPE_LEVEL_HIGH
  65. 0 7 IRQ_TYPE_LEVEL_HIGH
  66. 0 8 IRQ_TYPE_LEVEL_HIGH>;
  67. };
  68. irqpin1: irqpin@e6900004 {
  69. compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
  70. #interrupt-cells = <2>;
  71. interrupt-controller;
  72. reg = <0xe6900004 4>,
  73. <0xe6900014 4>,
  74. <0xe6900024 1>,
  75. <0xe6900044 1>,
  76. <0xe6900064 1>;
  77. interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH
  78. 0 10 IRQ_TYPE_LEVEL_HIGH
  79. 0 11 IRQ_TYPE_LEVEL_HIGH
  80. 0 12 IRQ_TYPE_LEVEL_HIGH
  81. 0 13 IRQ_TYPE_LEVEL_HIGH
  82. 0 14 IRQ_TYPE_LEVEL_HIGH
  83. 0 15 IRQ_TYPE_LEVEL_HIGH
  84. 0 16 IRQ_TYPE_LEVEL_HIGH>;
  85. control-parent;
  86. };
  87. irqpin2: irqpin@e6900008 {
  88. compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
  89. #interrupt-cells = <2>;
  90. interrupt-controller;
  91. reg = <0xe6900008 4>,
  92. <0xe6900018 4>,
  93. <0xe6900028 1>,
  94. <0xe6900048 1>,
  95. <0xe6900068 1>;
  96. interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH
  97. 0 18 IRQ_TYPE_LEVEL_HIGH
  98. 0 19 IRQ_TYPE_LEVEL_HIGH
  99. 0 20 IRQ_TYPE_LEVEL_HIGH
  100. 0 21 IRQ_TYPE_LEVEL_HIGH
  101. 0 22 IRQ_TYPE_LEVEL_HIGH
  102. 0 23 IRQ_TYPE_LEVEL_HIGH
  103. 0 24 IRQ_TYPE_LEVEL_HIGH>;
  104. };
  105. irqpin3: irqpin@e690000c {
  106. compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
  107. #interrupt-cells = <2>;
  108. interrupt-controller;
  109. reg = <0xe690000c 4>,
  110. <0xe690001c 4>,
  111. <0xe690002c 1>,
  112. <0xe690004c 1>,
  113. <0xe690006c 1>;
  114. interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH
  115. 0 26 IRQ_TYPE_LEVEL_HIGH
  116. 0 27 IRQ_TYPE_LEVEL_HIGH
  117. 0 28 IRQ_TYPE_LEVEL_HIGH
  118. 0 29 IRQ_TYPE_LEVEL_HIGH
  119. 0 30 IRQ_TYPE_LEVEL_HIGH
  120. 0 31 IRQ_TYPE_LEVEL_HIGH
  121. 0 32 IRQ_TYPE_LEVEL_HIGH>;
  122. };
  123. i2c0: i2c@e6820000 {
  124. #address-cells = <1>;
  125. #size-cells = <0>;
  126. compatible = "renesas,rmobile-iic";
  127. reg = <0xe6820000 0x425>;
  128. interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH
  129. 0 168 IRQ_TYPE_LEVEL_HIGH
  130. 0 169 IRQ_TYPE_LEVEL_HIGH
  131. 0 170 IRQ_TYPE_LEVEL_HIGH>;
  132. status = "disabled";
  133. };
  134. i2c1: i2c@e6822000 {
  135. #address-cells = <1>;
  136. #size-cells = <0>;
  137. compatible = "renesas,rmobile-iic";
  138. reg = <0xe6822000 0x425>;
  139. interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH
  140. 0 52 IRQ_TYPE_LEVEL_HIGH
  141. 0 53 IRQ_TYPE_LEVEL_HIGH
  142. 0 54 IRQ_TYPE_LEVEL_HIGH>;
  143. status = "disabled";
  144. };
  145. i2c2: i2c@e6824000 {
  146. #address-cells = <1>;
  147. #size-cells = <0>;
  148. compatible = "renesas,rmobile-iic";
  149. reg = <0xe6824000 0x425>;
  150. interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH
  151. 0 172 IRQ_TYPE_LEVEL_HIGH
  152. 0 173 IRQ_TYPE_LEVEL_HIGH
  153. 0 174 IRQ_TYPE_LEVEL_HIGH>;
  154. status = "disabled";
  155. };
  156. i2c3: i2c@e6826000 {
  157. #address-cells = <1>;
  158. #size-cells = <0>;
  159. compatible = "renesas,rmobile-iic";
  160. reg = <0xe6826000 0x425>;
  161. interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH
  162. 0 184 IRQ_TYPE_LEVEL_HIGH
  163. 0 185 IRQ_TYPE_LEVEL_HIGH
  164. 0 186 IRQ_TYPE_LEVEL_HIGH>;
  165. status = "disabled";
  166. };
  167. i2c4: i2c@e6828000 {
  168. #address-cells = <1>;
  169. #size-cells = <0>;
  170. compatible = "renesas,rmobile-iic";
  171. reg = <0xe6828000 0x425>;
  172. interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH
  173. 0 188 IRQ_TYPE_LEVEL_HIGH
  174. 0 189 IRQ_TYPE_LEVEL_HIGH
  175. 0 190 IRQ_TYPE_LEVEL_HIGH>;
  176. status = "disabled";
  177. };
  178. mmcif: mmc@e6bd0000 {
  179. compatible = "renesas,sh-mmcif";
  180. reg = <0xe6bd0000 0x100>;
  181. interrupts = <0 140 IRQ_TYPE_LEVEL_HIGH
  182. 0 141 IRQ_TYPE_LEVEL_HIGH>;
  183. reg-io-width = <4>;
  184. status = "disabled";
  185. };
  186. sdhi0: sd@ee100000 {
  187. compatible = "renesas,sdhi-sh73a0";
  188. reg = <0xee100000 0x100>;
  189. interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH
  190. 0 84 IRQ_TYPE_LEVEL_HIGH
  191. 0 85 IRQ_TYPE_LEVEL_HIGH>;
  192. cap-sd-highspeed;
  193. status = "disabled";
  194. };
  195. /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
  196. sdhi1: sd@ee120000 {
  197. compatible = "renesas,sdhi-sh73a0";
  198. reg = <0xee120000 0x100>;
  199. interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH
  200. 0 89 IRQ_TYPE_LEVEL_HIGH>;
  201. toshiba,mmc-wrprotect-disable;
  202. cap-sd-highspeed;
  203. status = "disabled";
  204. };
  205. sdhi2: sd@ee140000 {
  206. compatible = "renesas,sdhi-sh73a0";
  207. reg = <0xee140000 0x100>;
  208. interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH
  209. 0 105 IRQ_TYPE_LEVEL_HIGH>;
  210. toshiba,mmc-wrprotect-disable;
  211. cap-sd-highspeed;
  212. status = "disabled";
  213. };
  214. scifa0: serial@e6c40000 {
  215. compatible = "renesas,scifa-sh73a0", "renesas,scifa";
  216. reg = <0xe6c40000 0x100>;
  217. interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
  218. status = "disabled";
  219. };
  220. scifa1: serial@e6c50000 {
  221. compatible = "renesas,scifa-sh73a0", "renesas,scifa";
  222. reg = <0xe6c50000 0x100>;
  223. interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
  224. status = "disabled";
  225. };
  226. scifa2: serial@e6c60000 {
  227. compatible = "renesas,scifa-sh73a0", "renesas,scifa";
  228. reg = <0xe6c60000 0x100>;
  229. interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
  230. status = "disabled";
  231. };
  232. scifa3: serial@e6c70000 {
  233. compatible = "renesas,scifa-sh73a0", "renesas,scifa";
  234. reg = <0xe6c70000 0x100>;
  235. interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
  236. status = "disabled";
  237. };
  238. scifa4: serial@e6c80000 {
  239. compatible = "renesas,scifa-sh73a0", "renesas,scifa";
  240. reg = <0xe6c80000 0x100>;
  241. interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
  242. status = "disabled";
  243. };
  244. scifa5: serial@e6cb0000 {
  245. compatible = "renesas,scifa-sh73a0", "renesas,scifa";
  246. reg = <0xe6cb0000 0x100>;
  247. interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
  248. status = "disabled";
  249. };
  250. scifa6: serial@e6cc0000 {
  251. compatible = "renesas,scifa-sh73a0", "renesas,scifa";
  252. reg = <0xe6cc0000 0x100>;
  253. interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
  254. status = "disabled";
  255. };
  256. scifa7: serial@e6cd0000 {
  257. compatible = "renesas,scifa-sh73a0", "renesas,scifa";
  258. reg = <0xe6cd0000 0x100>;
  259. interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>;
  260. status = "disabled";
  261. };
  262. scifb8: serial@e6c30000 {
  263. compatible = "renesas,scifb-sh73a0", "renesas,scifb";
  264. reg = <0xe6c30000 0x100>;
  265. interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
  266. status = "disabled";
  267. };
  268. pfc: pfc@e6050000 {
  269. compatible = "renesas,pfc-sh73a0";
  270. reg = <0xe6050000 0x8000>,
  271. <0xe605801c 0x1c>;
  272. gpio-controller;
  273. #gpio-cells = <2>;
  274. interrupts-extended =
  275. <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
  276. <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
  277. <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
  278. <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
  279. <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
  280. <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
  281. <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
  282. <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
  283. };
  284. sh_fsi2: sound@ec230000 {
  285. #sound-dai-cells = <1>;
  286. compatible = "renesas,sh_fsi2";
  287. reg = <0xec230000 0x400>;
  288. interrupts = <0 146 0x4>;
  289. status = "disabled";
  290. };
  291. };