socfpga_cyclone5.dtsi 1.2 KB

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  1. /*
  2. * Copyright (C) 2012 Altera Corporation <www.altera.com>
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. /dts-v1/;
  18. /* First 4KB has trampoline code for secondary cores. */
  19. /memreserve/ 0x00000000 0x0001000;
  20. #include "socfpga.dtsi"
  21. / {
  22. soc {
  23. clkmgr@ffd04000 {
  24. clocks {
  25. osc1 {
  26. clock-frequency = <25000000>;
  27. };
  28. };
  29. };
  30. mmc0: dwmmc0@ff704000 {
  31. num-slots = <1>;
  32. broken-cd;
  33. bus-width = <4>;
  34. cap-mmc-highspeed;
  35. cap-sd-highspeed;
  36. };
  37. ethernet@ff702000 {
  38. phy-mode = "rgmii";
  39. phy-addr = <0xffffffff>; /* probe for phy addr */
  40. status = "okay";
  41. };
  42. sysmgr@ffd08000 {
  43. cpu1-start-addr = <0xffd080c4>;
  44. };
  45. };
  46. };