spear1340.dtsi 4.0 KB

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  1. /*
  2. * DTS file for all SPEAr1340 SoCs
  3. *
  4. * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  5. *
  6. * The code contained herein is licensed under the GNU General Public
  7. * License. You may obtain a copy of the GNU General Public License
  8. * Version 2 or later at the following locations:
  9. *
  10. * http://www.opensource.org/licenses/gpl-license.html
  11. * http://www.gnu.org/copyleft/gpl.html
  12. */
  13. /include/ "spear13xx.dtsi"
  14. / {
  15. compatible = "st,spear1340";
  16. ahb {
  17. spics: spics@e0700000{
  18. compatible = "st,spear-spics-gpio";
  19. reg = <0xe0700000 0x1000>;
  20. st-spics,peripcfg-reg = <0x42c>;
  21. st-spics,sw-enable-bit = <21>;
  22. st-spics,cs-value-bit = <20>;
  23. st-spics,cs-enable-mask = <3>;
  24. st-spics,cs-enable-shift = <18>;
  25. gpio-controller;
  26. #gpio-cells = <2>;
  27. status = "disabled";
  28. };
  29. miphy0: miphy@eb800000 {
  30. compatible = "st,spear1340-miphy";
  31. reg = <0xeb800000 0x4000>;
  32. misc = <&misc>;
  33. #phy-cells = <1>;
  34. status = "disabled";
  35. };
  36. ahci0: ahci@b1000000 {
  37. compatible = "snps,spear-ahci";
  38. reg = <0xb1000000 0x10000>;
  39. interrupts = <0 72 0x4>;
  40. phys = <&miphy0 0>;
  41. phy-names = "sata-phy";
  42. status = "disabled";
  43. };
  44. pcie0: pcie@b1000000 {
  45. compatible = "st,spear1340-pcie", "snps,dw-pcie";
  46. reg = <0xb1000000 0x4000>, <0x80000000 0x20000>;
  47. reg-names = "dbi", "config";
  48. interrupts = <0 68 0x4>;
  49. interrupt-map-mask = <0 0 0 0>;
  50. interrupt-map = <0x0 0 &gic 0 68 0x4>;
  51. num-lanes = <1>;
  52. phys = <&miphy0 1>;
  53. phy-names = "pcie-phy";
  54. #address-cells = <3>;
  55. #size-cells = <2>;
  56. device_type = "pci";
  57. ranges = <0x81000000 0 0 0x80020000 0 0x00010000 /* downstream I/O */
  58. 0x82000000 0 0x80030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */
  59. status = "disabled";
  60. };
  61. i2s-play@b2400000 {
  62. compatible = "snps,designware-i2s";
  63. reg = <0xb2400000 0x10000>;
  64. interrupt-names = "play_irq";
  65. interrupts = <0 98 0x4
  66. 0 99 0x4>;
  67. play;
  68. channel = <8>;
  69. status = "disabled";
  70. };
  71. i2s-rec@b2000000 {
  72. compatible = "snps,designware-i2s";
  73. reg = <0xb2000000 0x10000>;
  74. interrupt-names = "record_irq";
  75. interrupts = <0 100 0x4
  76. 0 101 0x4>;
  77. record;
  78. channel = <8>;
  79. status = "disabled";
  80. };
  81. pinmux: pinmux@e0700000 {
  82. compatible = "st,spear1340-pinmux";
  83. reg = <0xe0700000 0x1000>;
  84. #gpio-range-cells = <3>;
  85. };
  86. pwm: pwm@e0180000 {
  87. compatible ="st,spear13xx-pwm";
  88. reg = <0xe0180000 0x1000>;
  89. #pwm-cells = <2>;
  90. status = "disabled";
  91. };
  92. spdif-in@d0100000 {
  93. compatible = "st,spdif-in";
  94. reg = < 0xd0100000 0x20000
  95. 0xd0110000 0x10000 >;
  96. interrupts = <0 84 0x4>;
  97. status = "disabled";
  98. };
  99. spdif-out@d0000000 {
  100. compatible = "st,spdif-out";
  101. reg = <0xd0000000 0x20000>;
  102. interrupts = <0 85 0x4>;
  103. status = "disabled";
  104. };
  105. spi1: spi@5d400000 {
  106. compatible = "arm,pl022", "arm,primecell";
  107. reg = <0x5d400000 0x1000>;
  108. #address-cells = <1>;
  109. #size-cells = <0>;
  110. interrupts = <0 99 0x4>;
  111. status = "disabled";
  112. };
  113. apb {
  114. i2c1: i2c@b4000000 {
  115. #address-cells = <1>;
  116. #size-cells = <0>;
  117. compatible = "snps,designware-i2c";
  118. reg = <0xb4000000 0x1000>;
  119. interrupts = <0 104 0x4>;
  120. write-16bit;
  121. status = "disabled";
  122. };
  123. serial@b4100000 {
  124. compatible = "arm,pl011", "arm,primecell";
  125. reg = <0xb4100000 0x1000>;
  126. interrupts = <0 105 0x4>;
  127. status = "disabled";
  128. dmas = <&dwdma0 0x600 0 0 1>, /* 0xC << 11 */
  129. <&dwdma0 0x680 0 1 0>; /* 0xD << 7 */
  130. dma-names = "tx", "rx";
  131. };
  132. thermal@e07008c4 {
  133. st,thermal-flags = <0x2a00>;
  134. };
  135. gpiopinctrl: gpio@e2800000 {
  136. compatible = "st,spear-plgpio";
  137. reg = <0xe2800000 0x1000>;
  138. interrupts = <0 107 0x4>;
  139. #interrupt-cells = <1>;
  140. interrupt-controller;
  141. gpio-controller;
  142. #gpio-cells = <2>;
  143. gpio-ranges = <&pinmux 0 0 252>;
  144. status = "disabled";
  145. st-plgpio,ngpio = <250>;
  146. st-plgpio,wdata-reg = <0x40>;
  147. st-plgpio,dir-reg = <0x00>;
  148. st-plgpio,ie-reg = <0x80>;
  149. st-plgpio,rdata-reg = <0x20>;
  150. st-plgpio,mis-reg = <0xa0>;
  151. st-plgpio,eit-reg = <0x60>;
  152. };
  153. };
  154. };
  155. };