ste-href-ab8505.dtsi 5.3 KB

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  1. /*
  2. * Copyright 2014 Linaro Ltd.
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. / {
  12. soc {
  13. prcmu@80157000 {
  14. ab8505 {
  15. ab8505-gpio {
  16. /* Hog a few default settings */
  17. pinctrl-names = "default";
  18. pinctrl-0 = <&gpio2_default_mode>,
  19. <&gpio10_default_mode>,
  20. <&gpio11_default_mode>,
  21. <&gpio13_default_mode>,
  22. <&gpio34_default_mode>,
  23. <&gpio50_default_mode>,
  24. <&pwm_default_mode>,
  25. <&adi2_default_mode>,
  26. <&modsclsda_default_mode>,
  27. <&resethw_default_mode>,
  28. <&service_default_mode>;
  29. /*
  30. * Pins 2, 10, 11, 13, 34 and 50
  31. * are muxed in as GPIO, and configured as INPUT PULL DOWN
  32. */
  33. gpio2 {
  34. gpio2_default_mode: gpio2_default {
  35. default_mux {
  36. ste,function = "gpio";
  37. ste,pins = "gpio2_a_1";
  38. };
  39. default_cfg {
  40. ste,pins = "GPIO2_R5";
  41. input-enable;
  42. bias-pull-down;
  43. };
  44. };
  45. };
  46. gpio10 {
  47. gpio10_default_mode: gpio10_default {
  48. default_mux {
  49. ste,function = "gpio";
  50. ste,pins = "gpio10_d_1";
  51. };
  52. default_cfg {
  53. ste,pins = "GPIO10_B16";
  54. input-enable;
  55. bias-pull-down;
  56. };
  57. };
  58. };
  59. gpio11 {
  60. gpio11_default_mode: gpio11_default {
  61. default_mux {
  62. ste,function = "gpio";
  63. ste,pins = "gpio11_d_1";
  64. };
  65. default_cfg {
  66. ste,pins = "GPIO11_B17";
  67. input-enable;
  68. bias-pull-down;
  69. };
  70. };
  71. };
  72. gpio13 {
  73. gpio13_default_mode: gpio13_default {
  74. default_mux {
  75. ste,function = "gpio";
  76. ste,pins = "gpio13_d_1";
  77. };
  78. default_cfg {
  79. ste,pins = "GPIO13_D17";
  80. input-enable;
  81. bias-disable;
  82. };
  83. };
  84. };
  85. gpio34 {
  86. gpio34_default_mode: gpio34_default {
  87. default_mux {
  88. ste,function = "gpio";
  89. ste,pins = "gpio34_a_1";
  90. };
  91. default_cfg {
  92. ste,pins = "GPIO34_H14";
  93. input-enable;
  94. bias-pull-down;
  95. };
  96. };
  97. };
  98. gpio50 {
  99. gpio50_default_mode: gpio50_default {
  100. default_mux {
  101. ste,function = "gpio";
  102. ste,pins = "gpio50_d_1";
  103. };
  104. default_cfg {
  105. ste,pins = "GPIO50_L4";
  106. input-enable;
  107. bias-disable;
  108. };
  109. };
  110. };
  111. /* This sets up the PWM pin 14 */
  112. pwm {
  113. pwm_default_mode: pwm_default {
  114. default_mux {
  115. ste,function = "pwmout";
  116. ste,pins = "pwmout1_d_1";
  117. };
  118. default_cfg {
  119. ste,pins = "GPIO14_C16";
  120. input-enable;
  121. bias-pull-down;
  122. };
  123. };
  124. };
  125. /* This sets up audio interface 2 */
  126. adi2 {
  127. adi2_default_mode: adi2_default {
  128. default_mux {
  129. ste,function = "adi2";
  130. ste,pins = "adi2_d_1";
  131. };
  132. default_cfg {
  133. ste,pins = "GPIO17_P2",
  134. "GPIO18_N3",
  135. "GPIO19_T1",
  136. "GPIO20_P3";
  137. input-enable;
  138. bias-pull-down;
  139. };
  140. };
  141. };
  142. /* Modem I2C setup (SCL and SDA pins) */
  143. modsclsda {
  144. modsclsda_default_mode: modsclsda_default {
  145. default_mux {
  146. ste,function = "modsclsda";
  147. ste,pins = "modsclsda_d_1";
  148. };
  149. default_cfg {
  150. ste,pins = "GPIO40_J15",
  151. "GPIO41_J14";
  152. input-enable;
  153. bias-pull-down;
  154. };
  155. };
  156. };
  157. resethw {
  158. resethw_default_mode: resethw_default {
  159. default_mux {
  160. ste,function = "resethw";
  161. ste,pins = "resethw_d_1";
  162. };
  163. default_cfg {
  164. ste,pins = "GPIO52_D16";
  165. input-enable;
  166. bias-pull-down;
  167. };
  168. };
  169. };
  170. service {
  171. service_default_mode: service_default {
  172. default_mux {
  173. ste,function = "service";
  174. ste,pins = "service_d_1";
  175. };
  176. default_cfg {
  177. ste,pins = "GPIO53_D15";
  178. input-enable;
  179. bias-pull-down;
  180. };
  181. };
  182. };
  183. /*
  184. * Clock output pins associated with regulators.
  185. */
  186. sysclkreq2 {
  187. sysclkreq2_default_mode: sysclkreq2_default {
  188. default_mux {
  189. ste,function = "sysclkreq";
  190. ste,pins = "sysclkreq2_d_1";
  191. };
  192. default_cfg {
  193. ste,pins = "GPIO1_N4";
  194. input-enable;
  195. bias-disable;
  196. };
  197. };
  198. sysclkreq2_sleep_mode: sysclkreq2_sleep {
  199. default_mux {
  200. ste,function = "gpio";
  201. ste,pins = "gpio1_a_1";
  202. };
  203. default_cfg {
  204. ste,pins = "GPIO1_N4";
  205. input-enable;
  206. bias-pull-down;
  207. };
  208. };
  209. };
  210. sysclkreq4 {
  211. sysclkreq4_default_mode: sysclkreq4_default {
  212. default_mux {
  213. ste,function = "sysclkreq";
  214. ste,pins = "sysclkreq4_d_1";
  215. };
  216. default_cfg {
  217. ste,pins = "GPIO3_P5";
  218. input-enable;
  219. bias-disable;
  220. };
  221. };
  222. sysclkreq4_sleep_mode: sysclkreq4_sleep {
  223. default_mux {
  224. ste,function = "gpio";
  225. ste,pins = "gpio3_a_1";
  226. };
  227. default_cfg {
  228. ste,pins = "GPIO3_P5";
  229. input-enable;
  230. bias-pull-down;
  231. };
  232. };
  233. };
  234. };
  235. };
  236. };
  237. };
  238. };