ste-hrefprev60.dtsi 2.7 KB

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  1. /*
  2. * Copyright 2012 ST-Ericsson AB
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. *
  11. * Device Tree for the HREF+ prior to the v60 variant.
  12. */
  13. #include "ste-dbx5x0.dtsi"
  14. #include "ste-href-ab8500.dtsi"
  15. #include "ste-href.dtsi"
  16. / {
  17. gpio_keys {
  18. button@1 {
  19. gpios = <&tc3589x_gpio 7 0x4>;
  20. };
  21. };
  22. soc {
  23. i2c@80004000 {
  24. tps61052@33 {
  25. compatible = "tps61052";
  26. reg = <0x33>;
  27. };
  28. tc35892@42 {
  29. compatible = "toshiba,tc35892";
  30. reg = <0x42>;
  31. interrupt-parent = <&gpio6>;
  32. interrupts = <25 IRQ_TYPE_EDGE_RISING>;
  33. pinctrl-names = "default";
  34. pinctrl-0 = <&tc35892_hrefprev60_mode>;
  35. interrupt-controller;
  36. #interrupt-cells = <1>;
  37. tc3589x_gpio: tc3589x_gpio {
  38. compatible = "tc3589x-gpio";
  39. interrupts = <0>;
  40. interrupt-controller;
  41. #interrupt-cells = <2>;
  42. gpio-controller;
  43. #gpio-cells = <2>;
  44. };
  45. };
  46. };
  47. ssp@80002000 {
  48. /*
  49. * On the first generation boards, this SSP/SPI port was connected
  50. * to the AB8500.
  51. */
  52. pinctrl-names = "default";
  53. pinctrl-0 = <&ssp0_hrefprev60_mode>;
  54. };
  55. // External Micro SD slot
  56. sdi0_per1@80126000 {
  57. cd-gpios = <&tc3589x_gpio 3 0x4>;
  58. };
  59. vmmci: regulator-gpio {
  60. gpios = <&tc3589x_gpio 18 0x4>;
  61. enable-gpio = <&tc3589x_gpio 17 0x4>;
  62. };
  63. pinctrl {
  64. /* Set this up using hogs */
  65. pinctrl-names = "default";
  66. pinctrl-0 = <&ipgpio_hrefprev60_mode>;
  67. ssp0 {
  68. ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
  69. hrefprev60_mux {
  70. ste,function = "ssp0";
  71. ste,pins = "ssp0_a_1";
  72. };
  73. hrefprev60_cfg1 {
  74. ste,pins = "GPIO145_C13"; /* RXD */
  75. ste,config = <&in_pd>;
  76. };
  77. };
  78. };
  79. sdi0 {
  80. /* This additional pin needed on early MOP500 and HREFs previous to v60 */
  81. sdi0_default_mode: sdi0_default {
  82. hrefprev60_mux {
  83. ste,function = "mc0";
  84. ste,pins = "mc0dat31dir_a_1";
  85. };
  86. hrefprev60_cfg1 {
  87. ste,pins = "GPIO21_AB3"; /* DAT31DIR */
  88. ste,config = <&out_hi>;
  89. };
  90. };
  91. };
  92. tc35892 {
  93. tc35892_hrefprev60_mode: tc35892_hrefprev60 {
  94. hrefprev60_cfg {
  95. ste,pins = "GPIO217_AH12";
  96. ste,config = <&gpio_in_pu>;
  97. };
  98. };
  99. };
  100. ipgpio {
  101. ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
  102. hrefprev60_mux {
  103. ste,function = "ipgpio";
  104. ste,pins = "ipgpio0_c_1", "ipgpio1_c_1";
  105. };
  106. hrefprev60_cfg1 {
  107. ste,pins = "GPIO6_AF6", "GPIO7_AG5";
  108. ste,config = <&in_pu>;
  109. };
  110. };
  111. };
  112. };
  113. };
  114. };