versatile-pb.dts 1.3 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758
  1. #include <versatile-ab.dts>
  2. / {
  3. model = "ARM Versatile PB";
  4. compatible = "arm,versatile-pb";
  5. amba {
  6. gpio2: gpio@101e6000 {
  7. compatible = "arm,pl061", "arm,primecell";
  8. reg = <0x101e6000 0x1000>;
  9. interrupts = <8>;
  10. gpio-controller;
  11. #gpio-cells = <2>;
  12. interrupt-controller;
  13. #interrupt-cells = <2>;
  14. clocks = <&pclk>;
  15. clock-names = "apb_pclk";
  16. };
  17. gpio3: gpio@101e7000 {
  18. compatible = "arm,pl061", "arm,primecell";
  19. reg = <0x101e7000 0x1000>;
  20. interrupts = <9>;
  21. gpio-controller;
  22. #gpio-cells = <2>;
  23. interrupt-controller;
  24. #interrupt-cells = <2>;
  25. clocks = <&pclk>;
  26. clock-names = "apb_pclk";
  27. };
  28. fpga {
  29. uart@9000 {
  30. compatible = "arm,pl011", "arm,primecell";
  31. reg = <0x9000 0x1000>;
  32. interrupt-parent = <&sic>;
  33. interrupts = <6>;
  34. clocks = <&xtal24mhz>, <&pclk>;
  35. clock-names = "uartclk", "apb_pclk";
  36. };
  37. sci@a000 {
  38. compatible = "arm,primecell";
  39. reg = <0xa000 0x1000>;
  40. interrupt-parent = <&sic>;
  41. interrupts = <5>;
  42. clocks = <&xtal24mhz>;
  43. clock-names = "apb_pclk";
  44. };
  45. mmc@b000 {
  46. compatible = "arm,pl180", "arm,primecell";
  47. reg = <0xb000 0x1000>;
  48. interrupts-extended = <&vic 23 &sic 2>;
  49. clocks = <&xtal24mhz>, <&pclk>;
  50. clock-names = "mclk", "apb_pclk";
  51. };
  52. };
  53. };
  54. };