vf610-twr.dts 5.9 KB

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  1. /*
  2. * Copyright 2013 Freescale Semiconductor, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. */
  9. /dts-v1/;
  10. #include "vf610.dtsi"
  11. / {
  12. model = "VF610 Tower Board";
  13. compatible = "fsl,vf610-twr", "fsl,vf610";
  14. chosen {
  15. bootargs = "console=ttyLP1,115200";
  16. };
  17. memory {
  18. reg = <0x80000000 0x8000000>;
  19. };
  20. clocks {
  21. audio_ext {
  22. compatible = "fixed-clock";
  23. #clock-cells = <0>;
  24. clock-frequency = <24576000>;
  25. };
  26. enet_ext {
  27. compatible = "fixed-clock";
  28. #clock-cells = <0>;
  29. clock-frequency = <50000000>;
  30. };
  31. };
  32. regulators {
  33. compatible = "simple-bus";
  34. #address-cells = <1>;
  35. #size-cells = <0>;
  36. reg_3p3v: regulator@0 {
  37. compatible = "regulator-fixed";
  38. reg = <0>;
  39. regulator-name = "3P3V";
  40. regulator-min-microvolt = <3300000>;
  41. regulator-max-microvolt = <3300000>;
  42. regulator-always-on;
  43. };
  44. reg_vcc_3v3_mcu: regulator@1 {
  45. compatible = "regulator-fixed";
  46. reg = <1>;
  47. regulator-name = "vcc_3v3_mcu";
  48. regulator-min-microvolt = <3300000>;
  49. regulator-max-microvolt = <3300000>;
  50. };
  51. };
  52. sound {
  53. compatible = "simple-audio-card";
  54. simple-audio-card,format = "i2s";
  55. simple-audio-card,widgets =
  56. "Microphone", "Microphone Jack",
  57. "Headphone", "Headphone Jack",
  58. "Speaker", "Speaker Ext",
  59. "Line", "Line In Jack";
  60. simple-audio-card,routing =
  61. "MIC_IN", "Microphone Jack",
  62. "Microphone Jack", "Mic Bias",
  63. "LINE_IN", "Line In Jack",
  64. "Headphone Jack", "HP_OUT",
  65. "Speaker Ext", "LINE_OUT";
  66. simple-audio-card,cpu {
  67. sound-dai = <&sai2>;
  68. frame-master;
  69. bitclock-master;
  70. };
  71. simple-audio-card,codec {
  72. sound-dai = <&codec>;
  73. frame-master;
  74. bitclock-master;
  75. };
  76. };
  77. };
  78. &adc0 {
  79. pinctrl-names = "default";
  80. pinctrl-0 = <&pinctrl_adc0_ad5>;
  81. vref-supply = <&reg_vcc_3v3_mcu>;
  82. status = "okay";
  83. };
  84. &dspi0 {
  85. bus-num = <0>;
  86. pinctrl-names = "default";
  87. pinctrl-0 = <&pinctrl_dspi0>;
  88. status = "okay";
  89. sflash: at26df081a@0 {
  90. #address-cells = <1>;
  91. #size-cells = <1>;
  92. compatible = "atmel,at26df081a";
  93. spi-max-frequency = <16000000>;
  94. spi-cpol;
  95. spi-cpha;
  96. reg = <0>;
  97. };
  98. };
  99. &esdhc1 {
  100. pinctrl-names = "default";
  101. pinctrl-0 = <&pinctrl_esdhc1>;
  102. bus-width = <4>;
  103. status = "okay";
  104. };
  105. &fec0 {
  106. phy-mode = "rmii";
  107. pinctrl-names = "default";
  108. pinctrl-0 = <&pinctrl_fec0>;
  109. status = "okay";
  110. };
  111. &fec1 {
  112. phy-mode = "rmii";
  113. pinctrl-names = "default";
  114. pinctrl-0 = <&pinctrl_fec1>;
  115. status = "okay";
  116. };
  117. &i2c0 {
  118. clock-frequency = <100000>;
  119. pinctrl-names = "default";
  120. pinctrl-0 = <&pinctrl_i2c0>;
  121. status = "okay";
  122. codec: sgtl5000@0a {
  123. #sound-dai-cells = <0>;
  124. compatible = "fsl,sgtl5000";
  125. reg = <0x0a>;
  126. VDDA-supply = <&reg_3p3v>;
  127. VDDIO-supply = <&reg_3p3v>;
  128. clocks = <&clks VF610_CLK_SAI2>;
  129. };
  130. };
  131. &iomuxc {
  132. vf610-twr {
  133. pinctrl_adc0_ad5: adc0ad5grp {
  134. fsl,pins = <
  135. VF610_PAD_PTC30__ADC0_SE5 0xa1
  136. >;
  137. };
  138. pinctrl_dspi0: dspi0grp {
  139. fsl,pins = <
  140. VF610_PAD_PTB19__DSPI0_CS0 0x1182
  141. VF610_PAD_PTB20__DSPI0_SIN 0x1181
  142. VF610_PAD_PTB21__DSPI0_SOUT 0x1182
  143. VF610_PAD_PTB22__DSPI0_SCK 0x1182
  144. >;
  145. };
  146. pinctrl_esdhc1: esdhc1grp {
  147. fsl,pins = <
  148. VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
  149. VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
  150. VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
  151. VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
  152. VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
  153. VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
  154. VF610_PAD_PTA7__GPIO_134 0x219d
  155. >;
  156. };
  157. pinctrl_fec0: fec0grp {
  158. fsl,pins = <
  159. VF610_PAD_PTA6__RMII_CLKIN 0x30d1
  160. VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d3
  161. VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d1
  162. VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1
  163. VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1
  164. VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1
  165. VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1
  166. VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2
  167. VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2
  168. VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2
  169. >;
  170. };
  171. pinctrl_fec1: fec1grp {
  172. fsl,pins = <
  173. VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2
  174. VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
  175. VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
  176. VF610_PAD_PTC12__ENET_RMII_RXD1 0x30d1
  177. VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1
  178. VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1
  179. VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
  180. VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2
  181. VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2
  182. >;
  183. };
  184. pinctrl_i2c0: i2c0grp {
  185. fsl,pins = <
  186. VF610_PAD_PTB14__I2C0_SCL 0x30d3
  187. VF610_PAD_PTB15__I2C0_SDA 0x30d3
  188. >;
  189. };
  190. pinctrl_pwm0: pwm0grp {
  191. fsl,pins = <
  192. VF610_PAD_PTB0__FTM0_CH0 0x1582
  193. VF610_PAD_PTB1__FTM0_CH1 0x1582
  194. VF610_PAD_PTB2__FTM0_CH2 0x1582
  195. VF610_PAD_PTB3__FTM0_CH3 0x1582
  196. >;
  197. };
  198. pinctrl_sai2: sai2grp {
  199. fsl,pins = <
  200. VF610_PAD_PTA16__SAI2_TX_BCLK 0x02ed
  201. VF610_PAD_PTA18__SAI2_TX_DATA 0x02ee
  202. VF610_PAD_PTA19__SAI2_TX_SYNC 0x02ed
  203. VF610_PAD_PTA21__SAI2_RX_BCLK 0x02ed
  204. VF610_PAD_PTA22__SAI2_RX_DATA 0x02ed
  205. VF610_PAD_PTA23__SAI2_RX_SYNC 0x02ed
  206. VF610_PAD_PTB18__EXT_AUDIO_MCLK 0x02ed
  207. >;
  208. };
  209. pinctrl_uart1: uart1grp {
  210. fsl,pins = <
  211. VF610_PAD_PTB4__UART1_TX 0x21a2
  212. VF610_PAD_PTB5__UART1_RX 0x21a1
  213. >;
  214. };
  215. pinctrl_uart2: uart2grp {
  216. fsl,pins = <
  217. VF610_PAD_PTB6__UART2_TX 0x21a2
  218. VF610_PAD_PTB7__UART2_RX 0x21a1
  219. >;
  220. };
  221. };
  222. };
  223. &pwm0 {
  224. pinctrl-names = "default";
  225. pinctrl-0 = <&pinctrl_pwm0>;
  226. status = "okay";
  227. };
  228. &sai2 {
  229. #sound-dai-cells = <0>;
  230. pinctrl-names = "default";
  231. pinctrl-0 = <&pinctrl_sai2>;
  232. status = "okay";
  233. };
  234. &uart1 {
  235. pinctrl-names = "default";
  236. pinctrl-0 = <&pinctrl_uart1>;
  237. status = "okay";
  238. };
  239. &uart2 {
  240. pinctrl-names = "default";
  241. pinctrl-0 = <&pinctrl_uart2>;
  242. status = "okay";
  243. };
  244. &usbdev0 {
  245. disable-over-current;
  246. status = "okay";
  247. };
  248. &usbh1 {
  249. disable-over-current;
  250. status = "okay";
  251. };