platsmp.c 4.7 KB

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  1. /*
  2. * Symmetric Multi Processing (SMP) support for Armada XP
  3. *
  4. * Copyright (C) 2012 Marvell
  5. *
  6. * Lior Amsalem <alior@marvell.com>
  7. * Yehuda Yitschak <yehuday@marvell.com>
  8. * Gregory CLEMENT <gregory.clement@free-electrons.com>
  9. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  10. *
  11. * This file is licensed under the terms of the GNU General Public
  12. * License version 2. This program is licensed "as is" without any
  13. * warranty of any kind, whether express or implied.
  14. *
  15. * The Armada XP SoC has 4 ARMv7 PJ4B CPUs running in full HW coherency
  16. * This file implements the routines for preparing the SMP infrastructure
  17. * and waking up the secondary CPUs
  18. */
  19. #include <linux/init.h>
  20. #include <linux/smp.h>
  21. #include <linux/clk.h>
  22. #include <linux/of.h>
  23. #include <linux/of_address.h>
  24. #include <linux/mbus.h>
  25. #include <asm/cacheflush.h>
  26. #include <asm/smp_plat.h>
  27. #include "common.h"
  28. #include "armada-370-xp.h"
  29. #include "pmsu.h"
  30. #include "coherency.h"
  31. #define AXP_BOOTROM_BASE 0xfff00000
  32. #define AXP_BOOTROM_SIZE 0x100000
  33. static struct clk *__init get_cpu_clk(int cpu)
  34. {
  35. struct clk *cpu_clk;
  36. struct device_node *np = of_get_cpu_node(cpu, NULL);
  37. if (WARN(!np, "missing cpu node\n"))
  38. return NULL;
  39. cpu_clk = of_clk_get(np, 0);
  40. if (WARN_ON(IS_ERR(cpu_clk)))
  41. return NULL;
  42. return cpu_clk;
  43. }
  44. static void __init set_secondary_cpus_clock(void)
  45. {
  46. int thiscpu, cpu;
  47. unsigned long rate;
  48. struct clk *cpu_clk;
  49. thiscpu = smp_processor_id();
  50. cpu_clk = get_cpu_clk(thiscpu);
  51. if (!cpu_clk)
  52. return;
  53. clk_prepare_enable(cpu_clk);
  54. rate = clk_get_rate(cpu_clk);
  55. /* set all the other CPU clk to the same rate than the boot CPU */
  56. for_each_possible_cpu(cpu) {
  57. if (cpu == thiscpu)
  58. continue;
  59. cpu_clk = get_cpu_clk(cpu);
  60. if (!cpu_clk)
  61. return;
  62. clk_set_rate(cpu_clk, rate);
  63. clk_prepare_enable(cpu_clk);
  64. }
  65. }
  66. static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
  67. {
  68. int ret, hw_cpu;
  69. pr_info("Booting CPU %d\n", cpu);
  70. hw_cpu = cpu_logical_map(cpu);
  71. mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup);
  72. /*
  73. * This is needed to wake up CPUs in the offline state after
  74. * using CPU hotplug.
  75. */
  76. arch_send_wakeup_ipi_mask(cpumask_of(cpu));
  77. /*
  78. * This is needed to take secondary CPUs out of reset on the
  79. * initial boot.
  80. */
  81. ret = mvebu_cpu_reset_deassert(hw_cpu);
  82. if (ret) {
  83. pr_warn("unable to boot CPU: %d\n", ret);
  84. return ret;
  85. }
  86. return 0;
  87. }
  88. /*
  89. * When a CPU is brought back online, either through CPU hotplug, or
  90. * because of the boot of a kexec'ed kernel, the PMSU configuration
  91. * for this CPU might be in the deep idle state, preventing this CPU
  92. * from receiving interrupts. Here, we therefore take out the current
  93. * CPU from this state, which was entered by armada_xp_cpu_die()
  94. * below.
  95. */
  96. static void armada_xp_secondary_init(unsigned int cpu)
  97. {
  98. mvebu_v7_pmsu_idle_exit();
  99. }
  100. static void __init armada_xp_smp_init_cpus(void)
  101. {
  102. unsigned int ncores = num_possible_cpus();
  103. if (ncores == 0 || ncores > ARMADA_XP_MAX_CPUS)
  104. panic("Invalid number of CPUs in DT\n");
  105. }
  106. static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
  107. {
  108. struct device_node *node;
  109. struct resource res;
  110. int err;
  111. set_secondary_cpus_clock();
  112. flush_cache_all();
  113. set_cpu_coherent();
  114. /*
  115. * In order to boot the secondary CPUs we need to ensure
  116. * the bootROM is mapped at the correct address.
  117. */
  118. node = of_find_compatible_node(NULL, NULL, "marvell,bootrom");
  119. if (!node)
  120. panic("Cannot find 'marvell,bootrom' compatible node");
  121. err = of_address_to_resource(node, 0, &res);
  122. if (err < 0)
  123. panic("Cannot get 'bootrom' node address");
  124. if (res.start != AXP_BOOTROM_BASE ||
  125. resource_size(&res) != AXP_BOOTROM_SIZE)
  126. panic("The address for the BootROM is incorrect");
  127. }
  128. #ifdef CONFIG_HOTPLUG_CPU
  129. static void armada_xp_cpu_die(unsigned int cpu)
  130. {
  131. /*
  132. * CPU hotplug is implemented by putting offline CPUs into the
  133. * deep idle sleep state.
  134. */
  135. armada_370_xp_pmsu_idle_enter(true);
  136. }
  137. /*
  138. * We need a dummy function, so that platform_can_cpu_hotplug() knows
  139. * we support CPU hotplug. However, the function does not need to do
  140. * anything, because CPUs going offline can enter the deep idle state
  141. * by themselves, without any help from a still alive CPU.
  142. */
  143. static int armada_xp_cpu_kill(unsigned int cpu)
  144. {
  145. return 1;
  146. }
  147. #endif
  148. struct smp_operations armada_xp_smp_ops __initdata = {
  149. .smp_init_cpus = armada_xp_smp_init_cpus,
  150. .smp_prepare_cpus = armada_xp_smp_prepare_cpus,
  151. .smp_boot_secondary = armada_xp_boot_secondary,
  152. .smp_secondary_init = armada_xp_secondary_init,
  153. #ifdef CONFIG_HOTPLUG_CPU
  154. .cpu_die = armada_xp_cpu_die,
  155. .cpu_kill = armada_xp_cpu_kill,
  156. #endif
  157. };
  158. CPU_METHOD_OF_DECLARE(armada_xp_smp, "marvell,armada-xp-smp",
  159. &armada_xp_smp_ops);