devs.c 30 KB

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  1. /* linux/arch/arm/plat-samsung/devs.c
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * Base SAMSUNG platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/amba/pl330.h>
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/list.h>
  17. #include <linux/timer.h>
  18. #include <linux/init.h>
  19. #include <linux/serial_core.h>
  20. #include <linux/serial_s3c.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/io.h>
  23. #include <linux/slab.h>
  24. #include <linux/string.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/fb.h>
  27. #include <linux/gfp.h>
  28. #include <linux/mtd/mtd.h>
  29. #include <linux/mtd/onenand.h>
  30. #include <linux/mtd/partitions.h>
  31. #include <linux/mmc/host.h>
  32. #include <linux/ioport.h>
  33. #include <linux/sizes.h>
  34. #include <linux/platform_data/s3c-hsudc.h>
  35. #include <linux/platform_data/s3c-hsotg.h>
  36. #include <linux/platform_data/dma-s3c24xx.h>
  37. #include <media/s5p_hdmi.h>
  38. #include <asm/irq.h>
  39. #include <asm/mach/arch.h>
  40. #include <asm/mach/map.h>
  41. #include <asm/mach/irq.h>
  42. #include <mach/dma.h>
  43. #include <mach/irqs.h>
  44. #include <mach/map.h>
  45. #include <plat/cpu.h>
  46. #include <plat/devs.h>
  47. #include <plat/adc.h>
  48. #include <linux/platform_data/ata-samsung_cf.h>
  49. #include <plat/fb.h>
  50. #include <plat/fb-s3c2410.h>
  51. #include <linux/platform_data/hwmon-s3c.h>
  52. #include <linux/platform_data/i2c-s3c2410.h>
  53. #include <plat/keypad.h>
  54. #include <linux/platform_data/mmc-s3cmci.h>
  55. #include <linux/platform_data/mtd-nand-s3c2410.h>
  56. #include <plat/pwm-core.h>
  57. #include <plat/sdhci.h>
  58. #include <linux/platform_data/touchscreen-s3c2410.h>
  59. #include <linux/platform_data/usb-s3c2410_udc.h>
  60. #include <linux/platform_data/usb-ohci-s3c2410.h>
  61. #include <plat/usb-phy.h>
  62. #include <plat/regs-spi.h>
  63. #include <linux/platform_data/spi-s3c64xx.h>
  64. static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
  65. /* AC97 */
  66. #ifdef CONFIG_CPU_S3C2440
  67. static struct resource s3c_ac97_resource[] = {
  68. [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
  69. [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
  70. [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
  71. [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
  72. [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
  73. };
  74. struct platform_device s3c_device_ac97 = {
  75. .name = "samsung-ac97",
  76. .id = -1,
  77. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  78. .resource = s3c_ac97_resource,
  79. .dev = {
  80. .dma_mask = &samsung_device_dma_mask,
  81. .coherent_dma_mask = DMA_BIT_MASK(32),
  82. }
  83. };
  84. #endif /* CONFIG_CPU_S3C2440 */
  85. /* ADC */
  86. #ifdef CONFIG_PLAT_S3C24XX
  87. static struct resource s3c_adc_resource[] = {
  88. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  89. [1] = DEFINE_RES_IRQ(IRQ_TC),
  90. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  91. };
  92. struct platform_device s3c_device_adc = {
  93. .name = "s3c24xx-adc",
  94. .id = -1,
  95. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  96. .resource = s3c_adc_resource,
  97. };
  98. #endif /* CONFIG_PLAT_S3C24XX */
  99. #if defined(CONFIG_SAMSUNG_DEV_ADC)
  100. static struct resource s3c_adc_resource[] = {
  101. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  102. [1] = DEFINE_RES_IRQ(IRQ_TC),
  103. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  104. };
  105. struct platform_device s3c_device_adc = {
  106. .name = "samsung-adc",
  107. .id = -1,
  108. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  109. .resource = s3c_adc_resource,
  110. };
  111. #endif /* CONFIG_SAMSUNG_DEV_ADC */
  112. /* Camif Controller */
  113. #ifdef CONFIG_CPU_S3C2440
  114. static struct resource s3c_camif_resource[] = {
  115. [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
  116. [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
  117. [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
  118. };
  119. struct platform_device s3c_device_camif = {
  120. .name = "s3c2440-camif",
  121. .id = -1,
  122. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  123. .resource = s3c_camif_resource,
  124. .dev = {
  125. .dma_mask = &samsung_device_dma_mask,
  126. .coherent_dma_mask = DMA_BIT_MASK(32),
  127. }
  128. };
  129. #endif /* CONFIG_CPU_S3C2440 */
  130. /* FB */
  131. #ifdef CONFIG_S3C_DEV_FB
  132. static struct resource s3c_fb_resource[] = {
  133. [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
  134. [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
  135. [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
  136. [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
  137. };
  138. struct platform_device s3c_device_fb = {
  139. .name = "s3c-fb",
  140. .id = -1,
  141. .num_resources = ARRAY_SIZE(s3c_fb_resource),
  142. .resource = s3c_fb_resource,
  143. .dev = {
  144. .dma_mask = &samsung_device_dma_mask,
  145. .coherent_dma_mask = DMA_BIT_MASK(32),
  146. },
  147. };
  148. void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
  149. {
  150. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  151. &s3c_device_fb);
  152. }
  153. #endif /* CONFIG_S3C_DEV_FB */
  154. /* HWMON */
  155. #ifdef CONFIG_S3C_DEV_HWMON
  156. struct platform_device s3c_device_hwmon = {
  157. .name = "s3c-hwmon",
  158. .id = -1,
  159. .dev.parent = &s3c_device_adc.dev,
  160. };
  161. void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
  162. {
  163. s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
  164. &s3c_device_hwmon);
  165. }
  166. #endif /* CONFIG_S3C_DEV_HWMON */
  167. /* HSMMC */
  168. #ifdef CONFIG_S3C_DEV_HSMMC
  169. static struct resource s3c_hsmmc_resource[] = {
  170. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
  171. [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
  172. };
  173. struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
  174. .max_width = 4,
  175. .host_caps = (MMC_CAP_4_BIT_DATA |
  176. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  177. };
  178. struct platform_device s3c_device_hsmmc0 = {
  179. .name = "s3c-sdhci",
  180. .id = 0,
  181. .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
  182. .resource = s3c_hsmmc_resource,
  183. .dev = {
  184. .dma_mask = &samsung_device_dma_mask,
  185. .coherent_dma_mask = DMA_BIT_MASK(32),
  186. .platform_data = &s3c_hsmmc0_def_platdata,
  187. },
  188. };
  189. void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
  190. {
  191. s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
  192. }
  193. #endif /* CONFIG_S3C_DEV_HSMMC */
  194. #ifdef CONFIG_S3C_DEV_HSMMC1
  195. static struct resource s3c_hsmmc1_resource[] = {
  196. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
  197. [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
  198. };
  199. struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
  200. .max_width = 4,
  201. .host_caps = (MMC_CAP_4_BIT_DATA |
  202. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  203. };
  204. struct platform_device s3c_device_hsmmc1 = {
  205. .name = "s3c-sdhci",
  206. .id = 1,
  207. .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
  208. .resource = s3c_hsmmc1_resource,
  209. .dev = {
  210. .dma_mask = &samsung_device_dma_mask,
  211. .coherent_dma_mask = DMA_BIT_MASK(32),
  212. .platform_data = &s3c_hsmmc1_def_platdata,
  213. },
  214. };
  215. void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
  216. {
  217. s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
  218. }
  219. #endif /* CONFIG_S3C_DEV_HSMMC1 */
  220. /* HSMMC2 */
  221. #ifdef CONFIG_S3C_DEV_HSMMC2
  222. static struct resource s3c_hsmmc2_resource[] = {
  223. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
  224. [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
  225. };
  226. struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
  227. .max_width = 4,
  228. .host_caps = (MMC_CAP_4_BIT_DATA |
  229. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  230. };
  231. struct platform_device s3c_device_hsmmc2 = {
  232. .name = "s3c-sdhci",
  233. .id = 2,
  234. .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
  235. .resource = s3c_hsmmc2_resource,
  236. .dev = {
  237. .dma_mask = &samsung_device_dma_mask,
  238. .coherent_dma_mask = DMA_BIT_MASK(32),
  239. .platform_data = &s3c_hsmmc2_def_platdata,
  240. },
  241. };
  242. void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
  243. {
  244. s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
  245. }
  246. #endif /* CONFIG_S3C_DEV_HSMMC2 */
  247. #ifdef CONFIG_S3C_DEV_HSMMC3
  248. static struct resource s3c_hsmmc3_resource[] = {
  249. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
  250. [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
  251. };
  252. struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
  253. .max_width = 4,
  254. .host_caps = (MMC_CAP_4_BIT_DATA |
  255. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  256. };
  257. struct platform_device s3c_device_hsmmc3 = {
  258. .name = "s3c-sdhci",
  259. .id = 3,
  260. .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
  261. .resource = s3c_hsmmc3_resource,
  262. .dev = {
  263. .dma_mask = &samsung_device_dma_mask,
  264. .coherent_dma_mask = DMA_BIT_MASK(32),
  265. .platform_data = &s3c_hsmmc3_def_platdata,
  266. },
  267. };
  268. void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
  269. {
  270. s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
  271. }
  272. #endif /* CONFIG_S3C_DEV_HSMMC3 */
  273. /* I2C */
  274. static struct resource s3c_i2c0_resource[] = {
  275. [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
  276. [1] = DEFINE_RES_IRQ(IRQ_IIC),
  277. };
  278. struct platform_device s3c_device_i2c0 = {
  279. .name = "s3c2410-i2c",
  280. .id = 0,
  281. .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
  282. .resource = s3c_i2c0_resource,
  283. };
  284. struct s3c2410_platform_i2c default_i2c_data __initdata = {
  285. .flags = 0,
  286. .slave_addr = 0x10,
  287. .frequency = 100*1000,
  288. .sda_delay = 100,
  289. };
  290. void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
  291. {
  292. struct s3c2410_platform_i2c *npd;
  293. if (!pd) {
  294. pd = &default_i2c_data;
  295. pd->bus_num = 0;
  296. }
  297. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  298. &s3c_device_i2c0);
  299. if (!npd->cfg_gpio)
  300. npd->cfg_gpio = s3c_i2c0_cfg_gpio;
  301. }
  302. #ifdef CONFIG_S3C_DEV_I2C1
  303. static struct resource s3c_i2c1_resource[] = {
  304. [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
  305. [1] = DEFINE_RES_IRQ(IRQ_IIC1),
  306. };
  307. struct platform_device s3c_device_i2c1 = {
  308. .name = "s3c2410-i2c",
  309. .id = 1,
  310. .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
  311. .resource = s3c_i2c1_resource,
  312. };
  313. void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
  314. {
  315. struct s3c2410_platform_i2c *npd;
  316. if (!pd) {
  317. pd = &default_i2c_data;
  318. pd->bus_num = 1;
  319. }
  320. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  321. &s3c_device_i2c1);
  322. if (!npd->cfg_gpio)
  323. npd->cfg_gpio = s3c_i2c1_cfg_gpio;
  324. }
  325. #endif /* CONFIG_S3C_DEV_I2C1 */
  326. #ifdef CONFIG_S3C_DEV_I2C2
  327. static struct resource s3c_i2c2_resource[] = {
  328. [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
  329. [1] = DEFINE_RES_IRQ(IRQ_IIC2),
  330. };
  331. struct platform_device s3c_device_i2c2 = {
  332. .name = "s3c2410-i2c",
  333. .id = 2,
  334. .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
  335. .resource = s3c_i2c2_resource,
  336. };
  337. void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
  338. {
  339. struct s3c2410_platform_i2c *npd;
  340. if (!pd) {
  341. pd = &default_i2c_data;
  342. pd->bus_num = 2;
  343. }
  344. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  345. &s3c_device_i2c2);
  346. if (!npd->cfg_gpio)
  347. npd->cfg_gpio = s3c_i2c2_cfg_gpio;
  348. }
  349. #endif /* CONFIG_S3C_DEV_I2C2 */
  350. #ifdef CONFIG_S3C_DEV_I2C3
  351. static struct resource s3c_i2c3_resource[] = {
  352. [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
  353. [1] = DEFINE_RES_IRQ(IRQ_IIC3),
  354. };
  355. struct platform_device s3c_device_i2c3 = {
  356. .name = "s3c2440-i2c",
  357. .id = 3,
  358. .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
  359. .resource = s3c_i2c3_resource,
  360. };
  361. void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
  362. {
  363. struct s3c2410_platform_i2c *npd;
  364. if (!pd) {
  365. pd = &default_i2c_data;
  366. pd->bus_num = 3;
  367. }
  368. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  369. &s3c_device_i2c3);
  370. if (!npd->cfg_gpio)
  371. npd->cfg_gpio = s3c_i2c3_cfg_gpio;
  372. }
  373. #endif /*CONFIG_S3C_DEV_I2C3 */
  374. #ifdef CONFIG_S3C_DEV_I2C4
  375. static struct resource s3c_i2c4_resource[] = {
  376. [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
  377. [1] = DEFINE_RES_IRQ(IRQ_IIC4),
  378. };
  379. struct platform_device s3c_device_i2c4 = {
  380. .name = "s3c2440-i2c",
  381. .id = 4,
  382. .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
  383. .resource = s3c_i2c4_resource,
  384. };
  385. void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
  386. {
  387. struct s3c2410_platform_i2c *npd;
  388. if (!pd) {
  389. pd = &default_i2c_data;
  390. pd->bus_num = 4;
  391. }
  392. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  393. &s3c_device_i2c4);
  394. if (!npd->cfg_gpio)
  395. npd->cfg_gpio = s3c_i2c4_cfg_gpio;
  396. }
  397. #endif /*CONFIG_S3C_DEV_I2C4 */
  398. #ifdef CONFIG_S3C_DEV_I2C5
  399. static struct resource s3c_i2c5_resource[] = {
  400. [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
  401. [1] = DEFINE_RES_IRQ(IRQ_IIC5),
  402. };
  403. struct platform_device s3c_device_i2c5 = {
  404. .name = "s3c2440-i2c",
  405. .id = 5,
  406. .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
  407. .resource = s3c_i2c5_resource,
  408. };
  409. void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
  410. {
  411. struct s3c2410_platform_i2c *npd;
  412. if (!pd) {
  413. pd = &default_i2c_data;
  414. pd->bus_num = 5;
  415. }
  416. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  417. &s3c_device_i2c5);
  418. if (!npd->cfg_gpio)
  419. npd->cfg_gpio = s3c_i2c5_cfg_gpio;
  420. }
  421. #endif /*CONFIG_S3C_DEV_I2C5 */
  422. #ifdef CONFIG_S3C_DEV_I2C6
  423. static struct resource s3c_i2c6_resource[] = {
  424. [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
  425. [1] = DEFINE_RES_IRQ(IRQ_IIC6),
  426. };
  427. struct platform_device s3c_device_i2c6 = {
  428. .name = "s3c2440-i2c",
  429. .id = 6,
  430. .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
  431. .resource = s3c_i2c6_resource,
  432. };
  433. void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
  434. {
  435. struct s3c2410_platform_i2c *npd;
  436. if (!pd) {
  437. pd = &default_i2c_data;
  438. pd->bus_num = 6;
  439. }
  440. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  441. &s3c_device_i2c6);
  442. if (!npd->cfg_gpio)
  443. npd->cfg_gpio = s3c_i2c6_cfg_gpio;
  444. }
  445. #endif /* CONFIG_S3C_DEV_I2C6 */
  446. #ifdef CONFIG_S3C_DEV_I2C7
  447. static struct resource s3c_i2c7_resource[] = {
  448. [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
  449. [1] = DEFINE_RES_IRQ(IRQ_IIC7),
  450. };
  451. struct platform_device s3c_device_i2c7 = {
  452. .name = "s3c2440-i2c",
  453. .id = 7,
  454. .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
  455. .resource = s3c_i2c7_resource,
  456. };
  457. void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
  458. {
  459. struct s3c2410_platform_i2c *npd;
  460. if (!pd) {
  461. pd = &default_i2c_data;
  462. pd->bus_num = 7;
  463. }
  464. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  465. &s3c_device_i2c7);
  466. if (!npd->cfg_gpio)
  467. npd->cfg_gpio = s3c_i2c7_cfg_gpio;
  468. }
  469. #endif /* CONFIG_S3C_DEV_I2C7 */
  470. /* I2S */
  471. #ifdef CONFIG_PLAT_S3C24XX
  472. static struct resource s3c_iis_resource[] = {
  473. [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
  474. };
  475. struct platform_device s3c_device_iis = {
  476. .name = "s3c24xx-iis",
  477. .id = -1,
  478. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  479. .resource = s3c_iis_resource,
  480. .dev = {
  481. .dma_mask = &samsung_device_dma_mask,
  482. .coherent_dma_mask = DMA_BIT_MASK(32),
  483. }
  484. };
  485. #endif /* CONFIG_PLAT_S3C24XX */
  486. /* IDE CFCON */
  487. #ifdef CONFIG_SAMSUNG_DEV_IDE
  488. static struct resource s3c_cfcon_resource[] = {
  489. [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
  490. [1] = DEFINE_RES_IRQ(IRQ_CFCON),
  491. };
  492. struct platform_device s3c_device_cfcon = {
  493. .id = 0,
  494. .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
  495. .resource = s3c_cfcon_resource,
  496. };
  497. void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
  498. {
  499. s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
  500. &s3c_device_cfcon);
  501. }
  502. #endif /* CONFIG_SAMSUNG_DEV_IDE */
  503. /* KEYPAD */
  504. #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
  505. static struct resource samsung_keypad_resources[] = {
  506. [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
  507. [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
  508. };
  509. struct platform_device samsung_device_keypad = {
  510. .name = "samsung-keypad",
  511. .id = -1,
  512. .num_resources = ARRAY_SIZE(samsung_keypad_resources),
  513. .resource = samsung_keypad_resources,
  514. };
  515. void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
  516. {
  517. struct samsung_keypad_platdata *npd;
  518. npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
  519. &samsung_device_keypad);
  520. if (!npd->cfg_gpio)
  521. npd->cfg_gpio = samsung_keypad_cfg_gpio;
  522. }
  523. #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
  524. /* LCD Controller */
  525. #ifdef CONFIG_PLAT_S3C24XX
  526. static struct resource s3c_lcd_resource[] = {
  527. [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
  528. [1] = DEFINE_RES_IRQ(IRQ_LCD),
  529. };
  530. struct platform_device s3c_device_lcd = {
  531. .name = "s3c2410-lcd",
  532. .id = -1,
  533. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  534. .resource = s3c_lcd_resource,
  535. .dev = {
  536. .dma_mask = &samsung_device_dma_mask,
  537. .coherent_dma_mask = DMA_BIT_MASK(32),
  538. }
  539. };
  540. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  541. {
  542. struct s3c2410fb_mach_info *npd;
  543. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
  544. if (npd) {
  545. npd->displays = kmemdup(pd->displays,
  546. sizeof(struct s3c2410fb_display) * npd->num_displays,
  547. GFP_KERNEL);
  548. if (!npd->displays)
  549. printk(KERN_ERR "no memory for LCD display data\n");
  550. } else {
  551. printk(KERN_ERR "no memory for LCD platform data\n");
  552. }
  553. }
  554. #endif /* CONFIG_PLAT_S3C24XX */
  555. /* NAND */
  556. #ifdef CONFIG_S3C_DEV_NAND
  557. static struct resource s3c_nand_resource[] = {
  558. [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
  559. };
  560. struct platform_device s3c_device_nand = {
  561. .name = "s3c2410-nand",
  562. .id = -1,
  563. .num_resources = ARRAY_SIZE(s3c_nand_resource),
  564. .resource = s3c_nand_resource,
  565. };
  566. /*
  567. * s3c_nand_copy_set() - copy nand set data
  568. * @set: The new structure, directly copied from the old.
  569. *
  570. * Copy all the fields from the NAND set field from what is probably __initdata
  571. * to new kernel memory. The code returns 0 if the copy happened correctly or
  572. * an error code for the calling function to display.
  573. *
  574. * Note, we currently do not try and look to see if we've already copied the
  575. * data in a previous set.
  576. */
  577. static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
  578. {
  579. void *ptr;
  580. int size;
  581. size = sizeof(struct mtd_partition) * set->nr_partitions;
  582. if (size) {
  583. ptr = kmemdup(set->partitions, size, GFP_KERNEL);
  584. set->partitions = ptr;
  585. if (!ptr)
  586. return -ENOMEM;
  587. }
  588. if (set->nr_map && set->nr_chips) {
  589. size = sizeof(int) * set->nr_chips;
  590. ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
  591. set->nr_map = ptr;
  592. if (!ptr)
  593. return -ENOMEM;
  594. }
  595. if (set->ecc_layout) {
  596. ptr = kmemdup(set->ecc_layout,
  597. sizeof(struct nand_ecclayout), GFP_KERNEL);
  598. set->ecc_layout = ptr;
  599. if (!ptr)
  600. return -ENOMEM;
  601. }
  602. return 0;
  603. }
  604. void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
  605. {
  606. struct s3c2410_platform_nand *npd;
  607. int size;
  608. int ret;
  609. /* note, if we get a failure in allocation, we simply drop out of the
  610. * function. If there is so little memory available at initialisation
  611. * time then there is little chance the system is going to run.
  612. */
  613. npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
  614. &s3c_device_nand);
  615. if (!npd)
  616. return;
  617. /* now see if we need to copy any of the nand set data */
  618. size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
  619. if (size) {
  620. struct s3c2410_nand_set *from = npd->sets;
  621. struct s3c2410_nand_set *to;
  622. int i;
  623. to = kmemdup(from, size, GFP_KERNEL);
  624. npd->sets = to; /* set, even if we failed */
  625. if (!to) {
  626. printk(KERN_ERR "%s: no memory for sets\n", __func__);
  627. return;
  628. }
  629. for (i = 0; i < npd->nr_sets; i++) {
  630. ret = s3c_nand_copy_set(to);
  631. if (ret) {
  632. printk(KERN_ERR "%s: failed to copy set %d\n",
  633. __func__, i);
  634. return;
  635. }
  636. to++;
  637. }
  638. }
  639. }
  640. #endif /* CONFIG_S3C_DEV_NAND */
  641. /* ONENAND */
  642. #ifdef CONFIG_S3C_DEV_ONENAND
  643. static struct resource s3c_onenand_resources[] = {
  644. [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
  645. [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
  646. [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
  647. };
  648. struct platform_device s3c_device_onenand = {
  649. .name = "samsung-onenand",
  650. .id = 0,
  651. .num_resources = ARRAY_SIZE(s3c_onenand_resources),
  652. .resource = s3c_onenand_resources,
  653. };
  654. #endif /* CONFIG_S3C_DEV_ONENAND */
  655. #ifdef CONFIG_S3C64XX_DEV_ONENAND1
  656. static struct resource s3c64xx_onenand1_resources[] = {
  657. [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
  658. [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
  659. [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
  660. };
  661. struct platform_device s3c64xx_device_onenand1 = {
  662. .name = "samsung-onenand",
  663. .id = 1,
  664. .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
  665. .resource = s3c64xx_onenand1_resources,
  666. };
  667. void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
  668. {
  669. s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
  670. &s3c64xx_device_onenand1);
  671. }
  672. #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
  673. /* PWM Timer */
  674. #ifdef CONFIG_SAMSUNG_DEV_PWM
  675. static struct resource samsung_pwm_resource[] = {
  676. DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
  677. };
  678. struct platform_device samsung_device_pwm = {
  679. .name = "samsung-pwm",
  680. .id = -1,
  681. .num_resources = ARRAY_SIZE(samsung_pwm_resource),
  682. .resource = samsung_pwm_resource,
  683. };
  684. void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
  685. {
  686. samsung_device_pwm.dev.platform_data = pd;
  687. }
  688. #endif /* CONFIG_SAMSUNG_DEV_PWM */
  689. /* RTC */
  690. #ifdef CONFIG_PLAT_S3C24XX
  691. static struct resource s3c_rtc_resource[] = {
  692. [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
  693. [1] = DEFINE_RES_IRQ(IRQ_RTC),
  694. [2] = DEFINE_RES_IRQ(IRQ_TICK),
  695. };
  696. struct platform_device s3c_device_rtc = {
  697. .name = "s3c2410-rtc",
  698. .id = -1,
  699. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  700. .resource = s3c_rtc_resource,
  701. };
  702. #endif /* CONFIG_PLAT_S3C24XX */
  703. #ifdef CONFIG_S3C_DEV_RTC
  704. static struct resource s3c_rtc_resource[] = {
  705. [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
  706. [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
  707. [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
  708. };
  709. struct platform_device s3c_device_rtc = {
  710. .name = "s3c64xx-rtc",
  711. .id = -1,
  712. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  713. .resource = s3c_rtc_resource,
  714. };
  715. #endif /* CONFIG_S3C_DEV_RTC */
  716. /* SDI */
  717. #ifdef CONFIG_PLAT_S3C24XX
  718. static struct resource s3c_sdi_resource[] = {
  719. [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
  720. [1] = DEFINE_RES_IRQ(IRQ_SDI),
  721. };
  722. struct platform_device s3c_device_sdi = {
  723. .name = "s3c2410-sdi",
  724. .id = -1,
  725. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  726. .resource = s3c_sdi_resource,
  727. };
  728. void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
  729. {
  730. s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
  731. &s3c_device_sdi);
  732. }
  733. #endif /* CONFIG_PLAT_S3C24XX */
  734. /* SPI */
  735. #ifdef CONFIG_PLAT_S3C24XX
  736. static struct resource s3c_spi0_resource[] = {
  737. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
  738. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  739. };
  740. struct platform_device s3c_device_spi0 = {
  741. .name = "s3c2410-spi",
  742. .id = 0,
  743. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  744. .resource = s3c_spi0_resource,
  745. .dev = {
  746. .dma_mask = &samsung_device_dma_mask,
  747. .coherent_dma_mask = DMA_BIT_MASK(32),
  748. }
  749. };
  750. static struct resource s3c_spi1_resource[] = {
  751. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
  752. [1] = DEFINE_RES_IRQ(IRQ_SPI1),
  753. };
  754. struct platform_device s3c_device_spi1 = {
  755. .name = "s3c2410-spi",
  756. .id = 1,
  757. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  758. .resource = s3c_spi1_resource,
  759. .dev = {
  760. .dma_mask = &samsung_device_dma_mask,
  761. .coherent_dma_mask = DMA_BIT_MASK(32),
  762. }
  763. };
  764. #endif /* CONFIG_PLAT_S3C24XX */
  765. /* Touchscreen */
  766. #ifdef CONFIG_PLAT_S3C24XX
  767. static struct resource s3c_ts_resource[] = {
  768. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  769. [1] = DEFINE_RES_IRQ(IRQ_TC),
  770. };
  771. struct platform_device s3c_device_ts = {
  772. .name = "s3c2410-ts",
  773. .id = -1,
  774. .dev.parent = &s3c_device_adc.dev,
  775. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  776. .resource = s3c_ts_resource,
  777. };
  778. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
  779. {
  780. s3c_set_platdata(hard_s3c2410ts_info,
  781. sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
  782. }
  783. #endif /* CONFIG_PLAT_S3C24XX */
  784. #ifdef CONFIG_SAMSUNG_DEV_TS
  785. static struct resource s3c_ts_resource[] = {
  786. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  787. [1] = DEFINE_RES_IRQ(IRQ_TC),
  788. };
  789. static struct s3c2410_ts_mach_info default_ts_data __initdata = {
  790. .delay = 10000,
  791. .presc = 49,
  792. .oversampling_shift = 2,
  793. };
  794. struct platform_device s3c_device_ts = {
  795. .name = "s3c64xx-ts",
  796. .id = -1,
  797. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  798. .resource = s3c_ts_resource,
  799. };
  800. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
  801. {
  802. if (!pd)
  803. pd = &default_ts_data;
  804. s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
  805. &s3c_device_ts);
  806. }
  807. #endif /* CONFIG_SAMSUNG_DEV_TS */
  808. /* USB */
  809. #ifdef CONFIG_S3C_DEV_USB_HOST
  810. static struct resource s3c_usb_resource[] = {
  811. [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
  812. [1] = DEFINE_RES_IRQ(IRQ_USBH),
  813. };
  814. struct platform_device s3c_device_ohci = {
  815. .name = "s3c2410-ohci",
  816. .id = -1,
  817. .num_resources = ARRAY_SIZE(s3c_usb_resource),
  818. .resource = s3c_usb_resource,
  819. .dev = {
  820. .dma_mask = &samsung_device_dma_mask,
  821. .coherent_dma_mask = DMA_BIT_MASK(32),
  822. }
  823. };
  824. /*
  825. * s3c_ohci_set_platdata - initialise OHCI device platform data
  826. * @info: The platform data.
  827. *
  828. * This call copies the @info passed in and sets the device .platform_data
  829. * field to that copy. The @info is copied so that the original can be marked
  830. * __initdata.
  831. */
  832. void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
  833. {
  834. s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
  835. &s3c_device_ohci);
  836. }
  837. #endif /* CONFIG_S3C_DEV_USB_HOST */
  838. /* USB Device (Gadget) */
  839. #ifdef CONFIG_PLAT_S3C24XX
  840. static struct resource s3c_usbgadget_resource[] = {
  841. [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
  842. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  843. };
  844. struct platform_device s3c_device_usbgadget = {
  845. .name = "s3c2410-usbgadget",
  846. .id = -1,
  847. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  848. .resource = s3c_usbgadget_resource,
  849. };
  850. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  851. {
  852. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
  853. }
  854. #endif /* CONFIG_PLAT_S3C24XX */
  855. /* USB HSOTG */
  856. #ifdef CONFIG_S3C_DEV_USB_HSOTG
  857. static struct resource s3c_usb_hsotg_resources[] = {
  858. [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
  859. [1] = DEFINE_RES_IRQ(IRQ_OTG),
  860. };
  861. struct platform_device s3c_device_usb_hsotg = {
  862. .name = "s3c-hsotg",
  863. .id = -1,
  864. .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
  865. .resource = s3c_usb_hsotg_resources,
  866. .dev = {
  867. .dma_mask = &samsung_device_dma_mask,
  868. .coherent_dma_mask = DMA_BIT_MASK(32),
  869. },
  870. };
  871. void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
  872. {
  873. struct s3c_hsotg_plat *npd;
  874. npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
  875. &s3c_device_usb_hsotg);
  876. if (!npd->phy_init)
  877. npd->phy_init = s5p_usb_phy_init;
  878. if (!npd->phy_exit)
  879. npd->phy_exit = s5p_usb_phy_exit;
  880. }
  881. #endif /* CONFIG_S3C_DEV_USB_HSOTG */
  882. /* USB High Spped 2.0 Device (Gadget) */
  883. #ifdef CONFIG_PLAT_S3C24XX
  884. static struct resource s3c_hsudc_resource[] = {
  885. [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
  886. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  887. };
  888. struct platform_device s3c_device_usb_hsudc = {
  889. .name = "s3c-hsudc",
  890. .id = -1,
  891. .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
  892. .resource = s3c_hsudc_resource,
  893. .dev = {
  894. .dma_mask = &samsung_device_dma_mask,
  895. .coherent_dma_mask = DMA_BIT_MASK(32),
  896. },
  897. };
  898. void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
  899. {
  900. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
  901. }
  902. #endif /* CONFIG_PLAT_S3C24XX */
  903. /* WDT */
  904. #ifdef CONFIG_S3C_DEV_WDT
  905. static struct resource s3c_wdt_resource[] = {
  906. [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
  907. [1] = DEFINE_RES_IRQ(IRQ_WDT),
  908. };
  909. struct platform_device s3c_device_wdt = {
  910. .name = "s3c2410-wdt",
  911. .id = -1,
  912. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  913. .resource = s3c_wdt_resource,
  914. };
  915. #endif /* CONFIG_S3C_DEV_WDT */
  916. #ifdef CONFIG_S3C64XX_DEV_SPI0
  917. static struct resource s3c64xx_spi0_resource[] = {
  918. [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
  919. [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
  920. [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
  921. [3] = DEFINE_RES_IRQ(IRQ_SPI0),
  922. };
  923. struct platform_device s3c64xx_device_spi0 = {
  924. .name = "s3c6410-spi",
  925. .id = 0,
  926. .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
  927. .resource = s3c64xx_spi0_resource,
  928. .dev = {
  929. .dma_mask = &samsung_device_dma_mask,
  930. .coherent_dma_mask = DMA_BIT_MASK(32),
  931. },
  932. };
  933. void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  934. int num_cs)
  935. {
  936. struct s3c64xx_spi_info pd;
  937. /* Reject invalid configuration */
  938. if (!num_cs || src_clk_nr < 0) {
  939. pr_err("%s: Invalid SPI configuration\n", __func__);
  940. return;
  941. }
  942. pd.num_cs = num_cs;
  943. pd.src_clk_nr = src_clk_nr;
  944. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
  945. #if defined(CONFIG_PL330_DMA)
  946. pd.filter = pl330_filter;
  947. #elif defined(CONFIG_S3C64XX_PL080)
  948. pd.filter = pl08x_filter_id;
  949. #elif defined(CONFIG_S3C24XX_DMAC)
  950. pd.filter = s3c24xx_dma_filter;
  951. #endif
  952. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
  953. }
  954. #endif /* CONFIG_S3C64XX_DEV_SPI0 */
  955. #ifdef CONFIG_S3C64XX_DEV_SPI1
  956. static struct resource s3c64xx_spi1_resource[] = {
  957. [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
  958. [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
  959. [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
  960. [3] = DEFINE_RES_IRQ(IRQ_SPI1),
  961. };
  962. struct platform_device s3c64xx_device_spi1 = {
  963. .name = "s3c6410-spi",
  964. .id = 1,
  965. .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
  966. .resource = s3c64xx_spi1_resource,
  967. .dev = {
  968. .dma_mask = &samsung_device_dma_mask,
  969. .coherent_dma_mask = DMA_BIT_MASK(32),
  970. },
  971. };
  972. void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  973. int num_cs)
  974. {
  975. struct s3c64xx_spi_info pd;
  976. /* Reject invalid configuration */
  977. if (!num_cs || src_clk_nr < 0) {
  978. pr_err("%s: Invalid SPI configuration\n", __func__);
  979. return;
  980. }
  981. pd.num_cs = num_cs;
  982. pd.src_clk_nr = src_clk_nr;
  983. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
  984. #if defined(CONFIG_PL330_DMA)
  985. pd.filter = pl330_filter;
  986. #elif defined(CONFIG_S3C64XX_PL080)
  987. pd.filter = pl08x_filter_id;
  988. #endif
  989. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
  990. }
  991. #endif /* CONFIG_S3C64XX_DEV_SPI1 */
  992. #ifdef CONFIG_S3C64XX_DEV_SPI2
  993. static struct resource s3c64xx_spi2_resource[] = {
  994. [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
  995. [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
  996. [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
  997. [3] = DEFINE_RES_IRQ(IRQ_SPI2),
  998. };
  999. struct platform_device s3c64xx_device_spi2 = {
  1000. .name = "s3c6410-spi",
  1001. .id = 2,
  1002. .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
  1003. .resource = s3c64xx_spi2_resource,
  1004. .dev = {
  1005. .dma_mask = &samsung_device_dma_mask,
  1006. .coherent_dma_mask = DMA_BIT_MASK(32),
  1007. },
  1008. };
  1009. void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
  1010. int num_cs)
  1011. {
  1012. struct s3c64xx_spi_info pd;
  1013. /* Reject invalid configuration */
  1014. if (!num_cs || src_clk_nr < 0) {
  1015. pr_err("%s: Invalid SPI configuration\n", __func__);
  1016. return;
  1017. }
  1018. pd.num_cs = num_cs;
  1019. pd.src_clk_nr = src_clk_nr;
  1020. pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
  1021. #if defined(CONFIG_PL330_DMA)
  1022. pd.filter = pl330_filter;
  1023. #elif defined(CONFIG_S3C64XX_PL080)
  1024. pd.filter = pl08x_filter_id;
  1025. #endif
  1026. s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
  1027. }
  1028. #endif /* CONFIG_S3C64XX_DEV_SPI2 */