pm-debug.c 2.4 KB

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  1. /*
  2. * Copyright (C) 2013 Samsung Electronics Co., Ltd.
  3. * Tomasz Figa <t.figa@samsung.com>
  4. * Copyright (C) 2008 Openmoko, Inc.
  5. * Copyright (C) 2004-2008 Simtec Electronics
  6. * Ben Dooks <ben@simtec.co.uk>
  7. * http://armlinux.simtec.co.uk/
  8. *
  9. * Samsung common power management (suspend to RAM) debug support
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/serial_core.h>
  16. #include <linux/serial_s3c.h>
  17. #include <linux/io.h>
  18. #include <asm/mach/map.h>
  19. #include <plat/cpu.h>
  20. #include <plat/pm-common.h>
  21. #ifdef CONFIG_SAMSUNG_ATAGS
  22. #include <mach/pm-core.h>
  23. #else
  24. static inline void s3c_pm_debug_init_uart(void) {}
  25. static inline void s3c_pm_arch_update_uart(void __iomem *regs,
  26. struct pm_uart_save *save) {}
  27. #endif
  28. static struct pm_uart_save uart_save;
  29. extern void printascii(const char *);
  30. void s3c_pm_dbg(const char *fmt, ...)
  31. {
  32. va_list va;
  33. char buff[256];
  34. va_start(va, fmt);
  35. vsnprintf(buff, sizeof(buff), fmt, va);
  36. va_end(va);
  37. printascii(buff);
  38. }
  39. void s3c_pm_debug_init(void)
  40. {
  41. /* restart uart clocks so we can use them to output */
  42. s3c_pm_debug_init_uart();
  43. }
  44. static inline void __iomem *s3c_pm_uart_base(void)
  45. {
  46. unsigned long paddr;
  47. unsigned long vaddr;
  48. debug_ll_addr(&paddr, &vaddr);
  49. return (void __iomem *)vaddr;
  50. }
  51. void s3c_pm_save_uarts(void)
  52. {
  53. void __iomem *regs = s3c_pm_uart_base();
  54. struct pm_uart_save *save = &uart_save;
  55. save->ulcon = __raw_readl(regs + S3C2410_ULCON);
  56. save->ucon = __raw_readl(regs + S3C2410_UCON);
  57. save->ufcon = __raw_readl(regs + S3C2410_UFCON);
  58. save->umcon = __raw_readl(regs + S3C2410_UMCON);
  59. save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);
  60. if (!soc_is_s3c2410())
  61. save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT);
  62. S3C_PMDBG("UART[%p]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n",
  63. regs, save->ulcon, save->ucon, save->ufcon, save->ubrdiv);
  64. }
  65. void s3c_pm_restore_uarts(void)
  66. {
  67. void __iomem *regs = s3c_pm_uart_base();
  68. struct pm_uart_save *save = &uart_save;
  69. s3c_pm_arch_update_uart(regs, save);
  70. __raw_writel(save->ulcon, regs + S3C2410_ULCON);
  71. __raw_writel(save->ucon, regs + S3C2410_UCON);
  72. __raw_writel(save->ufcon, regs + S3C2410_UFCON);
  73. __raw_writel(save->umcon, regs + S3C2410_UMCON);
  74. __raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);
  75. if (!soc_is_s3c2410())
  76. __raw_writel(save->udivslot, regs + S3C2443_DIVSLOT);
  77. }