Kconfig 26 KB

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  1. config ARM64
  2. def_bool y
  3. select ARCH_BINFMT_ELF_RANDOMIZE_PIE
  4. select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
  5. select ARCH_HAS_SG_CHAIN
  6. select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
  7. select ARCH_USE_CMPXCHG_LOCKREF
  8. select ARCH_SUPPORTS_ATOMIC_RMW
  9. select ARCH_WANT_OPTIONAL_GPIOLIB
  10. select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
  11. select ARCH_WANT_FRAME_POINTERS
  12. select ARM_AMBA
  13. select ARM_ARCH_TIMER
  14. select ARM_GIC
  15. select AUDIT_ARCH_COMPAT_GENERIC
  16. select ARM_GIC_V3
  17. select BUILDTIME_EXTABLE_SORT
  18. select CLONE_BACKWARDS
  19. select COMMON_CLK
  20. select CPU_PM if (SUSPEND || CPU_IDLE)
  21. select DCACHE_WORD_ACCESS
  22. select GENERIC_ALLOCATOR
  23. select GENERIC_CLOCKEVENTS
  24. select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  25. select GENERIC_CPU_AUTOPROBE
  26. select GENERIC_EARLY_IOREMAP
  27. select GENERIC_IOMAP
  28. select GENERIC_IRQ_PROBE
  29. select GENERIC_IRQ_SHOW
  30. select GENERIC_SCHED_CLOCK
  31. select GENERIC_SMP_IDLE_THREAD
  32. select GENERIC_STRNCPY_FROM_USER
  33. select GENERIC_STRNLEN_USER
  34. select GENERIC_TIME_VSYSCALL
  35. select HANDLE_DOMAIN_IRQ
  36. select HARDIRQS_SW_RESEND
  37. select HAVE_ARCH_AUDITSYSCALL
  38. select HAVE_ARCH_JUMP_LABEL
  39. select HAVE_ARCH_KGDB
  40. select HAVE_ARCH_SECCOMP_FILTER
  41. select HAVE_ARCH_TRACEHOOK
  42. select HAVE_BPF_JIT
  43. select HAVE_C_RECORDMCOUNT
  44. select HAVE_CC_STACKPROTECTOR
  45. select HAVE_DEBUG_BUGVERBOSE
  46. select HAVE_DEBUG_KMEMLEAK
  47. select HAVE_DMA_API_DEBUG
  48. select HAVE_DMA_ATTRS
  49. select HAVE_DMA_CONTIGUOUS
  50. select HAVE_DYNAMIC_FTRACE
  51. select HAVE_EFFICIENT_UNALIGNED_ACCESS
  52. select HAVE_FTRACE_MCOUNT_RECORD
  53. select HAVE_FUNCTION_TRACER
  54. select HAVE_FUNCTION_GRAPH_TRACER
  55. select HAVE_GENERIC_DMA_COHERENT
  56. select HAVE_HW_BREAKPOINT if PERF_EVENTS
  57. select HAVE_MEMBLOCK
  58. select HAVE_PATA_PLATFORM
  59. select HAVE_PERF_EVENTS
  60. select HAVE_PERF_REGS
  61. select HAVE_PERF_USER_STACK_DUMP
  62. select HAVE_RCU_TABLE_FREE
  63. select HAVE_SYSCALL_TRACEPOINTS
  64. select IRQ_DOMAIN
  65. select MODULES_USE_ELF_RELA
  66. select NO_BOOTMEM
  67. select OF
  68. select OF_EARLY_FLATTREE
  69. select OF_RESERVED_MEM
  70. select PERF_USE_VMALLOC
  71. select POWER_RESET
  72. select POWER_SUPPLY
  73. select RTC_LIB
  74. select SPARSE_IRQ
  75. select SYSCTL_EXCEPTION_TRACE
  76. select HAVE_CONTEXT_TRACKING
  77. select DT_IDLE_STATES
  78. help
  79. ARM 64-bit (AArch64) Linux support.
  80. config 64BIT
  81. def_bool y
  82. config ARCH_PHYS_ADDR_T_64BIT
  83. def_bool y
  84. config MMU
  85. def_bool y
  86. config NO_IOPORT_MAP
  87. def_bool y if !PCI
  88. config STACKTRACE_SUPPORT
  89. def_bool y
  90. config LOCKDEP_SUPPORT
  91. def_bool y
  92. config TRACE_IRQFLAGS_SUPPORT
  93. def_bool y
  94. config RWSEM_XCHGADD_ALGORITHM
  95. def_bool y
  96. config GENERIC_HWEIGHT
  97. def_bool y
  98. config GENERIC_CSUM
  99. def_bool y
  100. config GENERIC_CALIBRATE_DELAY
  101. def_bool y
  102. config ZONE_DMA
  103. def_bool y
  104. config HAVE_GENERIC_RCU_GUP
  105. def_bool y
  106. config ARCH_DMA_ADDR_T_64BIT
  107. def_bool y
  108. config NEED_DMA_MAP_STATE
  109. def_bool y
  110. config NEED_SG_DMA_LENGTH
  111. def_bool y
  112. config SWIOTLB
  113. def_bool y
  114. config IOMMU_HELPER
  115. def_bool SWIOTLB
  116. config KERNEL_MODE_NEON
  117. def_bool y
  118. config FIX_EARLYCON_MEM
  119. def_bool y
  120. config ARM64_ERRATUM_836870
  121. bool "Cortex-A53: 836870: Non-allocating reads might prevent a store exclusive from passing"
  122. depends on ARM64
  123. help
  124. This option enables the workaround for erratum 836870
  125. affecting Cortex-A53 MPCore with two or more processors (r0p0..r0p3).
  126. If a Cortex-A53 processor is executing a load and store exclusive instruction in a loop then there are certain conditions
  127. that are allowed to cause the store exclusive instruction to repeatedly fail. This includes another processor repeatedly
  128. writing to the same cache line. In addition to these allowed conditions, a non-allocating load from another processor migh
  129. also cause the store exclusive instruction to repeatedly fail.
  130. This walkaournd is to ensure system do not use non-allocating load. For 32 bit ATF and 64 bit project,
  131. master cpu's DTAH bit is set to 1 at preloader stage and set to 1 again after suspend through
  132. dormant driver in ATF. Slave cpus's DTAH bit is set to 1 at dormant driver in ATF stage.
  133. For 32 bit non-ATF project, Master cpu's DTAH bit is set to 1 at preloader stage and
  134. set to 1 again after suspend through dormant driver in kernel. Slave cpus's DTAH bit is set to 1
  135. by hotplug driver in kernel.
  136. In 64 bit project, this Kernel config do nothing since all patches are in ATF and preloader. and
  137. ATF and preloader are already default enable these patches.
  138. config ARM64_ERRATUM_845719
  139. bool "Cortex-A53: 845719: a load might read incorrect data"
  140. depends on COMPAT
  141. default y
  142. help
  143. This option enables the workaround for erratum 845719.
  144. When running a compat (AArch32) userspace on an affected Cortex-A53
  145. part, a load at EL0 from a virtual address that matches the bottom 32
  146. bits of the virtual address used by a recent load at (AArch64) EL1
  147. might return incorrect data.
  148. The workaround is to write the contextidr_el1 register on exception
  149. return to a 32-bit task.
  150. Please note that this does not necessarily enable the workaround,
  151. as it depends on the alternative framework, which will only patch
  152. the kernel if an affected CPU is detected.
  153. If unsure, say Y.
  154. source "init/Kconfig"
  155. source "kernel/Kconfig.freezer"
  156. menu "Platform selection"
  157. config ARCH_THUNDER
  158. bool "Cavium Inc. Thunder SoC Family"
  159. help
  160. This enables support for Cavium's Thunder Family of SoCs.
  161. config ARCH_VEXPRESS
  162. bool "ARMv8 software model (Versatile Express)"
  163. select ARCH_REQUIRE_GPIOLIB
  164. select COMMON_CLK_VERSATILE
  165. select POWER_RESET_VEXPRESS
  166. select VEXPRESS_CONFIG
  167. help
  168. This enables support for the ARMv8 software model (Versatile
  169. Express).
  170. config ARCH_MEDIATEK
  171. bool
  172. select GENERIC_TIME
  173. select GENERIC_CLOCKEVENTS
  174. select ARCH_HAS_CPUFREQ
  175. select ARM_AMBA
  176. select CPU_V7
  177. select HAVE_SMP
  178. select NEED_MACH_MEMORY_H
  179. select IRQ_DOMAIN
  180. select IRQ_DOMAIN_DEBUG
  181. select GENERIC_SCHED_CLOCK
  182. select ARMV7_COMPAT
  183. select ARMV7_COMPAT_CPUINFO
  184. select CPU_IDLE
  185. select PINCTRL
  186. select MFD_SYSCON
  187. config ARCH_MT6735
  188. bool "MediaTek MT6735"
  189. select GENERIC_TIME
  190. select GENERIC_CLOCKEVENTS
  191. select ARCH_HAS_CPUFREQ
  192. select ARM_AMBA
  193. select CPU_V7
  194. select HAVE_SMP
  195. select NEED_MACH_MEMORY_H
  196. select IRQ_DOMAIN
  197. select IRQ_DOMAIN_DEBUG
  198. select GENERIC_SCHED_CLOCK
  199. select MTK_SYSTRACKER
  200. select MTK_SYS_CIRQ
  201. select MTK_EIC
  202. select ARMV7_COMPAT
  203. select ARMV7_COMPAT_CPUINFO
  204. select CPU_IDLE
  205. select PINCTRL
  206. select PINCTRL_MT6735
  207. select MFD_SYSCON
  208. select MTK_BASE_POWER
  209. select MTK_GIC
  210. select ARM64_ERRATUM_845719
  211. select ARM64_ERRATUM_836870
  212. select MTK_IRQ_NEW_DESIGN
  213. select MTK_IRQ_NEW_DESIGN_DEBUG
  214. select MTK_POWER_GS
  215. select MTK_CPU_STRESS
  216. help
  217. This enable support for MediaTek MT6735
  218. config ARCH_MT6753
  219. bool "MediaTek MT6753"
  220. select GENERIC_TIME
  221. select GENERIC_CLOCKEVENTS
  222. select ARCH_HAS_CPUFREQ
  223. select ARM_AMBA
  224. select CPU_V7
  225. select HAVE_SMP
  226. select NEED_MACH_MEMORY_H
  227. select IRQ_DOMAIN
  228. select IRQ_DOMAIN_DEBUG
  229. select GENERIC_SCHED_CLOCK
  230. select MTK_SYSTRACKER
  231. select MTK_SYS_CIRQ
  232. select MTK_EIC
  233. select MTK_GIC
  234. select ARMV7_COMPAT
  235. select ARMV7_COMPAT_CPUINFO
  236. select CPU_IDLE
  237. select ARM_MT6735_CPUIDLE
  238. select MTK_BASE_POWER
  239. select PINCTRL
  240. select PINCTRL_MT6735
  241. select MFD_SYSCON
  242. select ARM64_ERRATUM_845719
  243. select ARM64_ERRATUM_836870
  244. select MTK_IRQ_NEW_DESIGN
  245. select MTK_IRQ_NEW_DESIGN_DEBUG
  246. select MTK_POWER_GS
  247. select MTK_CPU_STRESS
  248. help
  249. This enable support for MediaTek MT6753
  250. To enable related drivers
  251. support for k53v1_64 related project
  252. support for k53v1_64_op02 project
  253. config ARCH_MT6755
  254. bool "MediaTek MT6755"
  255. select GENERIC_TIME
  256. select GENERIC_CLOCKEVENTS
  257. select ARCH_HAS_CPUFREQ
  258. select ARM_AMBA
  259. select CPU_V7
  260. select HAVE_SMP
  261. select NEED_MACH_MEMORY_H
  262. select IRQ_DOMAIN
  263. select IRQ_DOMAIN_DEBUG
  264. select GENERIC_SCHED_CLOCK
  265. select MTK_SYS_CIRQ
  266. select MTK_EIC
  267. select ARMV7_COMPAT
  268. select ARMV7_COMPAT_CPUINFO
  269. select CPU_IDLE
  270. select PINCTRL
  271. select PINCTRL_MT6755
  272. select MFD_SYSCON
  273. select MTK_BASE_POWER
  274. select MTK_GIC
  275. select ARM64_ERRATUM_845719
  276. select ARM64_ERRATUM_836870
  277. select MTK_POWER_GS
  278. select MTK_SYSTRACKER_V2
  279. select MTK_LM_MODE
  280. help
  281. This enables support for MediaTek MT6755
  282. Support for aarch64/aarch32 Architecture
  283. Support for evb6755 related projects
  284. Support for k55 related projects
  285. config ARCH_MT6797
  286. bool "MediaTek MT6797"
  287. select GENERIC_TIME
  288. select GENERIC_CLOCKEVENTS
  289. select ARCH_HAS_CPUFREQ
  290. select ARM_AMBA
  291. select CPU_V7
  292. select HAVE_SMP
  293. select NEED_MACH_MEMORY_H
  294. select IRQ_DOMAIN
  295. select IRQ_DOMAIN_DEBUG
  296. select GENERIC_SCHED_CLOCK
  297. select MTK_SYS_CIRQ
  298. select MTK_EIC
  299. select ARMV7_COMPAT
  300. select ARMV7_COMPAT_CPUINFO
  301. select CPU_IDLE
  302. select PINCTRL
  303. select PINCTRL_MT6797
  304. select MFD_SYSCON
  305. select MTK_BASE_POWER
  306. select MTK_POWER_GS
  307. select MTK_SYSTRACKER_V2
  308. select MTK_GIC_V3_EXT
  309. help
  310. This enables support for MediaTek MT6797
  311. Support for aarch64/aarch32 Architecture
  312. Support for fpga6797_64 related projects
  313. Support for evb6797_64 related projects
  314. Support for k97_64 related projects
  315. config ARCH_MT8163
  316. bool "MediaTek MT8163"
  317. select ARCH_MEDIATEK
  318. select MTK_BASE_POWER
  319. select MTK_SYS_CIRQ
  320. select MTK_GIC_EXT
  321. help
  322. This enable support for MediaTek MT8163. If you need support
  323. for MediaTek MT8163, say Y here.
  324. Please note this also select ARCH_MEDIATEK, so driver depends
  325. on it can be selected.
  326. config ARCH_MT8173
  327. bool "MediaTek MT8173"
  328. select ARCH_MEDIATEK
  329. select MTK_BASE_POWER
  330. select MTK_SYS_CIRQ
  331. select MTK_GIC_EXT
  332. help
  333. This enable support for MediaTek MT8173. If you need support
  334. for MediaTek MT8173, say Y here.
  335. Please note this also select ARCH_MEDIATEK, so driver depends
  336. on it can be selected.
  337. config ARCH_MT6735M
  338. bool "MediaTek MT6735M"
  339. select GENERIC_TIME
  340. select GENERIC_CLOCKEVENTS
  341. select ARCH_HAS_CPUFREQ
  342. select ARM_AMBA
  343. select CPU_V7
  344. select HAVE_SMP
  345. select NEED_MACH_MEMORY_H
  346. select IRQ_DOMAIN
  347. select IRQ_DOMAIN_DEBUG
  348. select GENERIC_SCHED_CLOCK
  349. select MTK_SYSTRACKER
  350. select MTK_SYS_CIRQ
  351. select MTK_EIC
  352. select ARMV7_COMPAT
  353. select ARMV7_COMPAT_CPUINFO
  354. select CPU_IDLE
  355. select ARM_MT6735_CPUIDLE
  356. select MTK_GIC
  357. select MTK_IRQ_NEW_DESIGN
  358. select MTK_IRQ_NEW_DESIGN_DEBUG
  359. select PINCTRL
  360. select PINCTRL_MT6735
  361. select MFD_SYSCON
  362. select MTK_BASE_POWER
  363. select MTK_POWER_GS
  364. select MTK_CPU_STRESS
  365. help
  366. This enable support for MediaTek MT6735M
  367. Support for k35mv1_64
  368. Support for k35mv1_64_op01
  369. Support for k35mv1_64_op02
  370. config ARCH_XGENE
  371. bool "AppliedMicro X-Gene SOC Family"
  372. help
  373. This enables support for AppliedMicro X-Gene SOC Family
  374. endmenu
  375. source "drivers/misc/mediatek/mach/Kconfig"
  376. menu "Bus support"
  377. config ARM_AMBA
  378. bool
  379. config PCI
  380. bool "PCI support"
  381. help
  382. This feature enables support for PCI bus system. If you say Y
  383. here, the kernel will include drivers and infrastructure code
  384. to support PCI bus devices.
  385. config PCI_DOMAINS
  386. def_bool PCI
  387. config PCI_DOMAINS_GENERIC
  388. def_bool PCI
  389. config PCI_SYSCALL
  390. def_bool PCI
  391. source "drivers/pci/Kconfig"
  392. source "drivers/pci/pcie/Kconfig"
  393. source "drivers/pci/hotplug/Kconfig"
  394. endmenu
  395. menu "Kernel Features"
  396. menu "ARM errata workarounds via the alternatives framework"
  397. config ARM64_ERRATUM_826319
  398. bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
  399. default y
  400. help
  401. This option adds an alternative code sequence to work around ARM
  402. erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
  403. AXI master interface and an L2 cache.
  404. If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
  405. and is unable to accept a certain write via this interface, it will
  406. not progress on read data presented on the read data channel and the
  407. system can deadlock.
  408. The workaround promotes data cache clean instructions to
  409. data cache clean-and-invalidate.
  410. Please note that this does not necessarily enable the workaround,
  411. as it depends on the alternative framework, which will only patch
  412. the kernel if an affected CPU is detected.
  413. If unsure, say Y.
  414. config ARM64_ERRATUM_827319
  415. bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
  416. default y
  417. help
  418. This option adds an alternative code sequence to work around ARM
  419. erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
  420. master interface and an L2 cache.
  421. Under certain conditions this erratum can cause a clean line eviction
  422. to occur at the same time as another transaction to the same address
  423. on the AMBA 5 CHI interface, which can cause data corruption if the
  424. interconnect reorders the two transactions.
  425. The workaround promotes data cache clean instructions to
  426. data cache clean-and-invalidate.
  427. Please note that this does not necessarily enable the workaround,
  428. as it depends on the alternative framework, which will only patch
  429. the kernel if an affected CPU is detected.
  430. If unsure, say Y.
  431. config ARM64_ERRATUM_824069
  432. bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
  433. default y
  434. help
  435. This option adds an alternative code sequence to work around ARM
  436. erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
  437. to a coherent interconnect.
  438. If a Cortex-A53 processor is executing a store or prefetch for
  439. write instruction at the same time as a processor in another
  440. cluster is executing a cache maintenance operation to the same
  441. address, then this erratum might cause a clean cache line to be
  442. incorrectly marked as dirty.
  443. The workaround promotes data cache clean instructions to
  444. data cache clean-and-invalidate.
  445. Please note that this option does not necessarily enable the
  446. workaround, as it depends on the alternative framework, which will
  447. only patch the kernel if an affected CPU is detected.
  448. If unsure, say Y.
  449. config ARM64_ERRATUM_819472
  450. bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
  451. default y
  452. help
  453. This option adds an alternative code sequence to work around ARM
  454. erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
  455. present when it is connected to a coherent interconnect.
  456. If the processor is executing a load and store exclusive sequence at
  457. the same time as a processor in another cluster is executing a cache
  458. maintenance operation to the same address, then this erratum might
  459. cause data corruption.
  460. The workaround promotes data cache clean instructions to
  461. data cache clean-and-invalidate.
  462. Please note that this does not necessarily enable the workaround,
  463. as it depends on the alternative framework, which will only patch
  464. the kernel if an affected CPU is detected.
  465. If unsure, say Y.
  466. config ARM64_ERRATUM_832075
  467. bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
  468. default y
  469. help
  470. This option adds an alternative code sequence to work around ARM
  471. erratum 832075 on Cortex-A57 parts up to r1p2.
  472. Affected Cortex-A57 parts might deadlock when exclusive load/store
  473. instructions to Write-Back memory are mixed with Device loads.
  474. The workaround is to promote device loads to use Load-Acquire
  475. semantics.
  476. Please note that this does not necessarily enable the workaround,
  477. as it depends on the alternative framework, which will only patch
  478. the kernel if an affected CPU is detected.
  479. If unsure, say Y.
  480. config ARM64_ERRATUM_845719
  481. bool "Cortex-A53: 845719: a load might read incorrect data"
  482. depends on COMPAT
  483. default y
  484. help
  485. This option adds an alternative code sequence to work around ARM
  486. erratum 845719 on Cortex-A53 parts up to r0p4.
  487. When running a compat (AArch32) userspace on an affected Cortex-A53
  488. part, a load at EL0 from a virtual address that matches the bottom 32
  489. bits of the virtual address used by a recent load at (AArch64) EL1
  490. might return incorrect data.
  491. The workaround is to write the contextidr_el1 register on exception
  492. return to a 32-bit task.
  493. Please note that this does not necessarily enable the workaround,
  494. as it depends on the alternative framework, which will only patch
  495. the kernel if an affected CPU is detected.
  496. If unsure, say Y.
  497. endmenu
  498. choice
  499. prompt "Page size"
  500. default ARM64_4K_PAGES
  501. help
  502. Page size (translation granule) configuration.
  503. config ARM64_4K_PAGES
  504. bool "4KB"
  505. help
  506. This feature enables 4KB pages support.
  507. config ARM64_64K_PAGES
  508. bool "64KB"
  509. help
  510. This feature enables 64KB pages support (4KB by default)
  511. allowing only two levels of page tables and faster TLB
  512. look-up. AArch32 emulation is not available when this feature
  513. is enabled.
  514. endchoice
  515. choice
  516. prompt "Virtual address space size"
  517. default ARM64_VA_BITS_39 if ARM64_4K_PAGES
  518. default ARM64_VA_BITS_42 if ARM64_64K_PAGES
  519. help
  520. Allows choosing one of multiple possible virtual address
  521. space sizes. The level of translation table is determined by
  522. a combination of page size and virtual address space size.
  523. config ARM64_VA_BITS_39
  524. bool "39-bit"
  525. depends on ARM64_4K_PAGES
  526. config ARM64_VA_BITS_42
  527. bool "42-bit"
  528. depends on ARM64_64K_PAGES
  529. config ARM64_VA_BITS_48
  530. bool "48-bit"
  531. depends on !ARM_SMMU
  532. endchoice
  533. config ARM64_VA_BITS
  534. int
  535. default 39 if ARM64_VA_BITS_39
  536. default 42 if ARM64_VA_BITS_42
  537. default 48 if ARM64_VA_BITS_48
  538. config ARM64_PGTABLE_LEVELS
  539. int
  540. default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
  541. default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
  542. default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
  543. default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
  544. config CPU_BIG_ENDIAN
  545. bool "Build big-endian kernel"
  546. help
  547. Say Y if you plan on running a kernel in big-endian mode.
  548. config SMP
  549. bool "Symmetric Multi-Processing"
  550. help
  551. This enables support for systems with more than one CPU. If
  552. you say N here, the kernel will run on single and
  553. multiprocessor machines, but will use only one CPU of a
  554. multiprocessor machine. If you say Y here, the kernel will run
  555. on many, but not all, single processor machines. On a single
  556. processor machine, the kernel will run faster if you say N
  557. here.
  558. If you don't know what to do here, say N.
  559. config SCHED_MC
  560. bool "Multi-core scheduler support"
  561. depends on SMP
  562. help
  563. Multi-core scheduler support improves the CPU scheduler's decision
  564. making when dealing with multi-core CPU chips at a cost of slightly
  565. increased overhead in some places. If unsure say N here.
  566. config SCHED_SMT
  567. bool "SMT scheduler support"
  568. depends on SMP
  569. help
  570. Improves the CPU scheduler's decision making when dealing with
  571. MultiThreading at a cost of slightly increased overhead in some
  572. places. If unsure say N here.
  573. config NR_CPUS
  574. int "Maximum number of CPUs (2-64)"
  575. range 2 64
  576. depends on SMP
  577. # These have to remain sorted largest to smallest
  578. default "64"
  579. config HOTPLUG_CPU
  580. bool "Support for hot-pluggable CPUs"
  581. depends on SMP
  582. help
  583. Say Y here to experiment with turning CPUs off and on. CPUs
  584. can be controlled through /sys/devices/system/cpu.
  585. source kernel/Kconfig.preempt
  586. config HZ
  587. int
  588. default 100
  589. config ARCH_HAS_HOLES_MEMORYMODEL
  590. def_bool y if SPARSEMEM
  591. config ARCH_SPARSEMEM_ENABLE
  592. def_bool y
  593. select SPARSEMEM_VMEMMAP_ENABLE
  594. config ARCH_SPARSEMEM_DEFAULT
  595. def_bool ARCH_SPARSEMEM_ENABLE
  596. config ARCH_SELECT_MEMORY_MODEL
  597. def_bool ARCH_SPARSEMEM_ENABLE
  598. config HAVE_ARCH_PFN_VALID
  599. def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
  600. config HW_PERF_EVENTS
  601. bool "Enable hardware performance counter support for perf events"
  602. depends on PERF_EVENTS
  603. default y
  604. help
  605. Enable hardware performance counter support for perf events. If
  606. disabled, perf events will use software events only.
  607. config SYS_SUPPORTS_HUGETLBFS
  608. def_bool y
  609. config ARCH_WANT_GENERAL_HUGETLB
  610. def_bool y
  611. config ARCH_WANT_HUGE_PMD_SHARE
  612. def_bool y if !ARM64_64K_PAGES
  613. config HAVE_ARCH_TRANSPARENT_HUGEPAGE
  614. def_bool y
  615. config ARCH_HAS_CACHE_LINE_SIZE
  616. def_bool y
  617. source "mm/Kconfig"
  618. config SECCOMP
  619. bool "Enable seccomp to safely compute untrusted bytecode"
  620. ---help---
  621. This kernel feature is useful for number crunching applications
  622. that may need to compute untrusted bytecode during their
  623. execution. By using pipes or other transports made available to
  624. the process as file descriptors supporting the read/write
  625. syscalls, it's possible to isolate those applications in
  626. their own address space using seccomp. Once seccomp is
  627. enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
  628. and the task is only allowed to execute a few safe syscalls
  629. defined by each seccomp mode.
  630. config XEN_DOM0
  631. def_bool y
  632. depends on XEN
  633. config XEN
  634. bool "Xen guest support on ARM64"
  635. depends on ARM64 && OF
  636. select SWIOTLB_XEN
  637. help
  638. Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
  639. config FORCE_MAX_ZONEORDER
  640. int
  641. default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
  642. default "11"
  643. menuconfig ARMV8_DEPRECATED
  644. bool "Emulate deprecated/obsolete ARMv8 instructions"
  645. depends on COMPAT
  646. help
  647. Legacy software support may require certain instructions
  648. that have been deprecated or obsoleted in the architecture.
  649. Enable this config to enable selective emulation of these
  650. features.
  651. If unsure, say Y
  652. if ARMV8_DEPRECATED
  653. config SWP_EMULATION
  654. bool "Emulate SWP/SWPB instructions"
  655. help
  656. ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
  657. they are always undefined. Say Y here to enable software
  658. emulation of these instructions for userspace using LDXR/STXR.
  659. In some older versions of glibc [<=2.8] SWP is used during futex
  660. trylock() operations with the assumption that the code will not
  661. be preempted. This invalid assumption may be more likely to fail
  662. with SWP emulation enabled, leading to deadlock of the user
  663. application.
  664. NOTE: when accessing uncached shared regions, LDXR/STXR rely
  665. on an external transaction monitoring block called a global
  666. monitor to maintain update atomicity. If your system does not
  667. implement a global monitor, this option can cause programs that
  668. perform SWP operations to uncached memory to deadlock.
  669. If unsure, say Y
  670. config CP15_BARRIER_EMULATION
  671. bool "Emulate CP15 Barrier instructions"
  672. help
  673. The CP15 barrier instructions - CP15ISB, CP15DSB, and
  674. CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
  675. strongly recommended to use the ISB, DSB, and DMB
  676. instructions instead.
  677. Say Y here to enable software emulation of these
  678. instructions for AArch32 userspace code. When this option is
  679. enabled, CP15 barrier usage is traced which can help
  680. identify software that needs updating.
  681. If unsure, say Y
  682. config SETEND_EMULATION
  683. bool "Emulate SETEND instruction"
  684. help
  685. The SETEND instruction alters the data-endianness of the
  686. AArch32 EL0, and is deprecated in ARMv8.
  687. Say Y here to enable software emulation of the instruction
  688. for AArch32 userspace code.
  689. Note: All the cpus on the system must have mixed endian support at EL0
  690. for this feature to be enabled. If a new CPU - which doesn't support mixed
  691. endian - is hotplugged in after this feature has been enabled, there could
  692. be unexpected results in the applications.
  693. If unsure, say Y
  694. endif
  695. endmenu
  696. menu "Boot options"
  697. config CMDLINE
  698. string "Default kernel command string"
  699. default ""
  700. help
  701. Provide a set of default command-line options at build time by
  702. entering them here. As a minimum, you should specify the the
  703. root device (e.g. root=/dev/nfs).
  704. choice
  705. prompt "Kernel command line type" if CMDLINE != ""
  706. default CMDLINE_FROM_BOOTLOADER
  707. config CMDLINE_FROM_BOOTLOADER
  708. bool "Use bootloader kernel arguments if available"
  709. help
  710. Uses the command-line options passed by the boot loader. If
  711. the boot loader doesn't provide any, the default kernel command
  712. string provided in CMDLINE will be used.
  713. config CMDLINE_EXTEND
  714. bool "Extend bootloader kernel arguments"
  715. help
  716. The command-line arguments provided by the boot loader will be
  717. appended to the default kernel command string.
  718. config CMDLINE_FORCE
  719. bool "Always use the default kernel command string"
  720. help
  721. Always use the default kernel command string, even if the boot
  722. loader passes other arguments to the kernel.
  723. This is useful if you cannot or don't want to change the
  724. command-line options your boot loader passes to the kernel.
  725. endchoice
  726. config EFI_STUB
  727. bool
  728. config EFI
  729. bool "UEFI runtime support"
  730. depends on OF && !CPU_BIG_ENDIAN
  731. select LIBFDT
  732. select UCS2_STRING
  733. select EFI_PARAMS_FROM_FDT
  734. select EFI_RUNTIME_WRAPPERS
  735. select EFI_STUB
  736. select EFI_ARMSTUB
  737. default y
  738. help
  739. This option provides support for runtime services provided
  740. by UEFI firmware (such as non-volatile variables, realtime
  741. clock, and platform reset). A UEFI stub is also provided to
  742. allow the kernel to be booted as an EFI application. This
  743. is only useful on systems that have UEFI firmware.
  744. config BUILD_ARM64_APPENDED_DTB_IMAGE
  745. bool "Build a concatenated Image.gz/dtb by default"
  746. depends on OF
  747. help
  748. Enabling this option will cause a concatenated Image.gz and list of
  749. DTBs to be built by default (instead of a standalone Image.gz.)
  750. The image will built in arch/arm64/boot/Image.gz-dtb
  751. config BUILD_ARM64_APPENDED_DTB_IMAGE_NAMES
  752. string "Default dtb names"
  753. depends on BUILD_ARM64_APPENDED_DTB_IMAGE
  754. help
  755. Space separated list of names of dtbs to append when
  756. building a concatenated Image.gz-dtb.
  757. endmenu
  758. menu "Userspace binary formats"
  759. source "fs/Kconfig.binfmt"
  760. config COMPAT
  761. bool "Kernel support for 32-bit EL0"
  762. depends on !ARM64_64K_PAGES
  763. select COMPAT_BINFMT_ELF
  764. select HAVE_UID16
  765. select OLD_SIGSUSPEND3
  766. select COMPAT_OLD_SIGACTION
  767. help
  768. This option enables support for a 32-bit EL0 running under a 64-bit
  769. kernel at EL1. AArch32-specific components such as system calls,
  770. the user helper functions, VFP support and the ptrace interface are
  771. handled appropriately by the kernel.
  772. If you want to execute 32-bit userspace applications, say Y.
  773. config SYSVIPC_COMPAT
  774. def_bool y
  775. depends on COMPAT && SYSVIPC
  776. endmenu
  777. menu "Power management options"
  778. source "kernel/power/Kconfig"
  779. config ARCH_SUSPEND_POSSIBLE
  780. def_bool y
  781. config ARM64_CPU_SUSPEND
  782. def_bool PM_SLEEP
  783. config ARCH_HIBERNATION_POSSIBLE
  784. bool
  785. depends on MMU
  786. default y if ARCH_SUSPEND_POSSIBLE
  787. endmenu
  788. menu "CPU Power Management"
  789. source "drivers/cpuidle/Kconfig"
  790. source "drivers/cpufreq/Kconfig"
  791. endmenu
  792. source "net/Kconfig"
  793. source "drivers/Kconfig"
  794. source "drivers/firmware/Kconfig"
  795. source "fs/Kconfig"
  796. source "arch/arm64/kvm/Kconfig"
  797. source "arch/arm64/Kconfig.debug"
  798. source "security/Kconfig"
  799. source "crypto/Kconfig"
  800. if CRYPTO
  801. source "arch/arm64/crypto/Kconfig"
  802. endif
  803. source "lib/Kconfig"