dma-mapping.c 12 KB

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  1. /*
  2. * SWIOTLB-based DMA API implementation
  3. *
  4. * Copyright (C) 2012 ARM Ltd.
  5. * Author: Catalin Marinas <catalin.marinas@arm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/gfp.h>
  20. #include <linux/export.h>
  21. #include <linux/slab.h>
  22. #include <linux/genalloc.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/dma-contiguous.h>
  25. #include <linux/vmalloc.h>
  26. #include <linux/swiotlb.h>
  27. #include <asm/cacheflush.h>
  28. struct dma_map_ops *dma_ops;
  29. EXPORT_SYMBOL(dma_ops);
  30. static pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot,
  31. bool coherent)
  32. {
  33. if (!coherent || dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs))
  34. return pgprot_writecombine(prot);
  35. return prot;
  36. }
  37. static struct gen_pool *atomic_pool;
  38. #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
  39. static size_t atomic_pool_size = DEFAULT_DMA_COHERENT_POOL_SIZE;
  40. static int __init early_coherent_pool(char *p)
  41. {
  42. atomic_pool_size = memparse(p, &p);
  43. return 0;
  44. }
  45. early_param("coherent_pool", early_coherent_pool);
  46. static void *__alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags)
  47. {
  48. unsigned long val;
  49. void *ptr = NULL;
  50. if (!atomic_pool) {
  51. WARN(1, "coherent pool not initialised!\n");
  52. return NULL;
  53. }
  54. val = gen_pool_alloc(atomic_pool, size);
  55. if (val) {
  56. phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
  57. *ret_page = phys_to_page(phys);
  58. ptr = (void *)val;
  59. memset(ptr, 0, size);
  60. }
  61. return ptr;
  62. }
  63. static bool __in_atomic_pool(void *start, size_t size)
  64. {
  65. return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
  66. }
  67. static int __free_from_pool(void *start, size_t size)
  68. {
  69. if (!__in_atomic_pool(start, size))
  70. return 0;
  71. gen_pool_free(atomic_pool, (unsigned long)start, size);
  72. return 1;
  73. }
  74. static void *__dma_alloc_coherent(struct device *dev, size_t size,
  75. dma_addr_t *dma_handle, gfp_t flags,
  76. struct dma_attrs *attrs)
  77. {
  78. if (dev == NULL) {
  79. WARN_ONCE(1, "Use an actual device structure for DMA allocation\n");
  80. return NULL;
  81. }
  82. if (IS_ENABLED(CONFIG_ZONE_DMA) &&
  83. dev->coherent_dma_mask <= DMA_BIT_MASK(32))
  84. flags |= GFP_DMA;
  85. if (IS_ENABLED(CONFIG_DMA_CMA) && (flags & __GFP_WAIT)) {
  86. struct page *page;
  87. void *addr;
  88. size = PAGE_ALIGN(size);
  89. page = dma_alloc_from_contiguous(dev, size >> PAGE_SHIFT,
  90. get_order(size));
  91. if (!page)
  92. return NULL;
  93. *dma_handle = phys_to_dma(dev, page_to_phys(page));
  94. addr = page_address(page);
  95. memset(addr, 0, size);
  96. return addr;
  97. } else {
  98. return swiotlb_alloc_coherent(dev, size, dma_handle, flags);
  99. }
  100. }
  101. static void __dma_free_coherent(struct device *dev, size_t size,
  102. void *vaddr, dma_addr_t dma_handle,
  103. struct dma_attrs *attrs)
  104. {
  105. bool freed;
  106. phys_addr_t paddr = dma_to_phys(dev, dma_handle);
  107. if (dev == NULL) {
  108. WARN_ONCE(1, "Use an actual device structure for DMA allocation\n");
  109. return;
  110. }
  111. freed = dma_release_from_contiguous(dev,
  112. phys_to_page(paddr),
  113. size >> PAGE_SHIFT);
  114. if (!freed)
  115. swiotlb_free_coherent(dev, size, vaddr, dma_handle);
  116. }
  117. static void *__dma_alloc_noncoherent(struct device *dev, size_t size,
  118. dma_addr_t *dma_handle, gfp_t flags,
  119. struct dma_attrs *attrs)
  120. {
  121. struct page *page;
  122. void *ptr, *coherent_ptr;
  123. size = PAGE_ALIGN(size);
  124. if (!(flags & __GFP_WAIT)) {
  125. struct page *page = NULL;
  126. void *addr = __alloc_from_pool(size, &page, flags);
  127. if (addr)
  128. *dma_handle = phys_to_dma(dev, page_to_phys(page));
  129. return addr;
  130. }
  131. ptr = __dma_alloc_coherent(dev, size, dma_handle, flags, attrs);
  132. if (!ptr)
  133. goto no_mem;
  134. /* remove any dirty cache lines on the kernel alias */
  135. __dma_flush_range(ptr, ptr + size);
  136. /* create a coherent mapping */
  137. page = virt_to_page(ptr);
  138. coherent_ptr = dma_common_contiguous_remap(page, size, VM_USERMAP,
  139. __get_dma_pgprot(attrs,
  140. __pgprot(PROT_NORMAL_NC), false),
  141. __builtin_return_address(0));
  142. if (!coherent_ptr)
  143. goto no_map;
  144. return coherent_ptr;
  145. no_map:
  146. __dma_free_coherent(dev, size, ptr, *dma_handle, attrs);
  147. no_mem:
  148. *dma_handle = DMA_ERROR_CODE;
  149. return NULL;
  150. }
  151. static void __dma_free_noncoherent(struct device *dev, size_t size,
  152. void *vaddr, dma_addr_t dma_handle,
  153. struct dma_attrs *attrs)
  154. {
  155. void *swiotlb_addr = phys_to_virt(dma_to_phys(dev, dma_handle));
  156. if (__free_from_pool(vaddr, size))
  157. return;
  158. vunmap(vaddr);
  159. __dma_free_coherent(dev, size, swiotlb_addr, dma_handle, attrs);
  160. }
  161. static dma_addr_t __swiotlb_map_page(struct device *dev, struct page *page,
  162. unsigned long offset, size_t size,
  163. enum dma_data_direction dir,
  164. struct dma_attrs *attrs)
  165. {
  166. dma_addr_t dev_addr;
  167. dev_addr = swiotlb_map_page(dev, page, offset, size, dir, attrs);
  168. __dma_map_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
  169. return dev_addr;
  170. }
  171. static void __swiotlb_unmap_page(struct device *dev, dma_addr_t dev_addr,
  172. size_t size, enum dma_data_direction dir,
  173. struct dma_attrs *attrs)
  174. {
  175. __dma_unmap_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
  176. swiotlb_unmap_page(dev, dev_addr, size, dir, attrs);
  177. }
  178. static int __swiotlb_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
  179. int nelems, enum dma_data_direction dir,
  180. struct dma_attrs *attrs)
  181. {
  182. struct scatterlist *sg;
  183. int i, ret;
  184. ret = swiotlb_map_sg_attrs(dev, sgl, nelems, dir, attrs);
  185. for_each_sg(sgl, sg, ret, i)
  186. __dma_map_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
  187. sg->length, dir);
  188. return ret;
  189. }
  190. static void __swiotlb_unmap_sg_attrs(struct device *dev,
  191. struct scatterlist *sgl, int nelems,
  192. enum dma_data_direction dir,
  193. struct dma_attrs *attrs)
  194. {
  195. struct scatterlist *sg;
  196. int i;
  197. for_each_sg(sgl, sg, nelems, i)
  198. __dma_unmap_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
  199. sg->length, dir);
  200. swiotlb_unmap_sg_attrs(dev, sgl, nelems, dir, attrs);
  201. }
  202. static void __swiotlb_sync_single_for_cpu(struct device *dev,
  203. dma_addr_t dev_addr, size_t size,
  204. enum dma_data_direction dir)
  205. {
  206. __dma_unmap_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
  207. swiotlb_sync_single_for_cpu(dev, dev_addr, size, dir);
  208. }
  209. static void __swiotlb_sync_single_for_device(struct device *dev,
  210. dma_addr_t dev_addr, size_t size,
  211. enum dma_data_direction dir)
  212. {
  213. swiotlb_sync_single_for_device(dev, dev_addr, size, dir);
  214. __dma_map_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
  215. }
  216. static void __swiotlb_sync_sg_for_cpu(struct device *dev,
  217. struct scatterlist *sgl, int nelems,
  218. enum dma_data_direction dir)
  219. {
  220. struct scatterlist *sg;
  221. int i;
  222. for_each_sg(sgl, sg, nelems, i)
  223. __dma_unmap_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
  224. sg->length, dir);
  225. swiotlb_sync_sg_for_cpu(dev, sgl, nelems, dir);
  226. }
  227. static void __swiotlb_sync_sg_for_device(struct device *dev,
  228. struct scatterlist *sgl, int nelems,
  229. enum dma_data_direction dir)
  230. {
  231. struct scatterlist *sg;
  232. int i;
  233. swiotlb_sync_sg_for_device(dev, sgl, nelems, dir);
  234. for_each_sg(sgl, sg, nelems, i)
  235. __dma_map_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
  236. sg->length, dir);
  237. }
  238. /* vma->vm_page_prot must be set appropriately before calling this function */
  239. static int __dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
  240. void *cpu_addr, dma_addr_t dma_addr, size_t size)
  241. {
  242. int ret = -ENXIO;
  243. unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >>
  244. PAGE_SHIFT;
  245. unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
  246. unsigned long pfn = dma_to_phys(dev, dma_addr) >> PAGE_SHIFT;
  247. unsigned long off = vma->vm_pgoff;
  248. if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
  249. return ret;
  250. if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
  251. ret = remap_pfn_range(vma, vma->vm_start,
  252. pfn + off,
  253. vma->vm_end - vma->vm_start,
  254. vma->vm_page_prot);
  255. }
  256. return ret;
  257. }
  258. static int __swiotlb_mmap_noncoherent(struct device *dev,
  259. struct vm_area_struct *vma,
  260. void *cpu_addr, dma_addr_t dma_addr, size_t size,
  261. struct dma_attrs *attrs)
  262. {
  263. vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot, false);
  264. return __dma_common_mmap(dev, vma, cpu_addr, dma_addr, size);
  265. }
  266. static int __swiotlb_mmap_coherent(struct device *dev,
  267. struct vm_area_struct *vma,
  268. void *cpu_addr, dma_addr_t dma_addr, size_t size,
  269. struct dma_attrs *attrs)
  270. {
  271. /* Just use whatever page_prot attributes were specified */
  272. return __dma_common_mmap(dev, vma, cpu_addr, dma_addr, size);
  273. }
  274. struct dma_map_ops noncoherent_swiotlb_dma_ops = {
  275. .alloc = __dma_alloc_noncoherent,
  276. .free = __dma_free_noncoherent,
  277. .mmap = __swiotlb_mmap_noncoherent,
  278. .map_page = __swiotlb_map_page,
  279. .unmap_page = __swiotlb_unmap_page,
  280. .map_sg = __swiotlb_map_sg_attrs,
  281. .unmap_sg = __swiotlb_unmap_sg_attrs,
  282. .sync_single_for_cpu = __swiotlb_sync_single_for_cpu,
  283. .sync_single_for_device = __swiotlb_sync_single_for_device,
  284. .sync_sg_for_cpu = __swiotlb_sync_sg_for_cpu,
  285. .sync_sg_for_device = __swiotlb_sync_sg_for_device,
  286. .dma_supported = swiotlb_dma_supported,
  287. .mapping_error = swiotlb_dma_mapping_error,
  288. };
  289. EXPORT_SYMBOL(noncoherent_swiotlb_dma_ops);
  290. struct dma_map_ops coherent_swiotlb_dma_ops = {
  291. .alloc = __dma_alloc_coherent,
  292. .free = __dma_free_coherent,
  293. .mmap = __swiotlb_mmap_coherent,
  294. .map_page = swiotlb_map_page,
  295. .unmap_page = swiotlb_unmap_page,
  296. .map_sg = swiotlb_map_sg_attrs,
  297. .unmap_sg = swiotlb_unmap_sg_attrs,
  298. .sync_single_for_cpu = swiotlb_sync_single_for_cpu,
  299. .sync_single_for_device = swiotlb_sync_single_for_device,
  300. .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
  301. .sync_sg_for_device = swiotlb_sync_sg_for_device,
  302. .dma_supported = swiotlb_dma_supported,
  303. .mapping_error = swiotlb_dma_mapping_error,
  304. };
  305. EXPORT_SYMBOL(coherent_swiotlb_dma_ops);
  306. extern int swiotlb_late_init_with_default_size(size_t default_size);
  307. static int __init atomic_pool_init(void)
  308. {
  309. pgprot_t prot = __pgprot(PROT_NORMAL_NC);
  310. unsigned long nr_pages = atomic_pool_size >> PAGE_SHIFT;
  311. struct page *page;
  312. void *addr;
  313. unsigned int pool_size_order = get_order(atomic_pool_size);
  314. if (dev_get_cma_area(NULL))
  315. page = dma_alloc_from_contiguous(NULL, nr_pages,
  316. pool_size_order);
  317. else
  318. page = alloc_pages(GFP_DMA, pool_size_order);
  319. if (page) {
  320. int ret;
  321. void *page_addr = page_address(page);
  322. memset(page_addr, 0, atomic_pool_size);
  323. __dma_flush_range(page_addr, page_addr + atomic_pool_size);
  324. atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
  325. if (!atomic_pool)
  326. goto free_page;
  327. addr = dma_common_contiguous_remap(page, atomic_pool_size,
  328. VM_USERMAP, prot, atomic_pool_init);
  329. if (!addr)
  330. goto destroy_genpool;
  331. ret = gen_pool_add_virt(atomic_pool, (unsigned long)addr,
  332. page_to_phys(page),
  333. atomic_pool_size, -1);
  334. if (ret)
  335. goto remove_mapping;
  336. gen_pool_set_algo(atomic_pool,
  337. gen_pool_first_fit_order_align,
  338. (void *)PAGE_SHIFT);
  339. pr_info("DMA: preallocated %zu KiB pool for atomic allocations\n",
  340. atomic_pool_size / 1024);
  341. return 0;
  342. }
  343. goto out;
  344. remove_mapping:
  345. dma_common_free_remap(addr, atomic_pool_size, VM_USERMAP);
  346. destroy_genpool:
  347. gen_pool_destroy(atomic_pool);
  348. atomic_pool = NULL;
  349. free_page:
  350. if (!dma_release_from_contiguous(NULL, page, nr_pages))
  351. __free_pages(page, pool_size_order);
  352. out:
  353. pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
  354. atomic_pool_size / 1024);
  355. return -ENOMEM;
  356. }
  357. static int __init swiotlb_late_init(void)
  358. {
  359. size_t swiotlb_size = min(SZ_64M, MAX_ORDER_NR_PAGES << PAGE_SHIFT);
  360. dma_ops = &noncoherent_swiotlb_dma_ops;
  361. return swiotlb_late_init_with_default_size(swiotlb_size);
  362. }
  363. static int __init arm64_dma_init(void)
  364. {
  365. int ret = 0;
  366. ret |= swiotlb_late_init();
  367. ret |= atomic_pool_init();
  368. return ret;
  369. }
  370. arch_initcall(arm64_dma_init);
  371. #define PREALLOC_DMA_DEBUG_ENTRIES 4096
  372. static int __init dma_debug_do_init(void)
  373. {
  374. dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
  375. return 0;
  376. }
  377. fs_initcall(dma_debug_do_init);