stamp.c 19 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/spi/mmc_spi.h>
  16. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  17. #include <linux/usb/isp1362.h>
  18. #endif
  19. #include <linux/gpio.h>
  20. #include <linux/irq.h>
  21. #include <linux/i2c.h>
  22. #include <asm/dma.h>
  23. #include <asm/bfin5xx_spi.h>
  24. #include <asm/reboot.h>
  25. #include <asm/portmux.h>
  26. #include <asm/dpmc.h>
  27. /*
  28. * Name the Board for the /proc/cpuinfo
  29. */
  30. const char bfin_board_name[] = "ADI BF533-STAMP";
  31. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  32. static struct platform_device rtc_device = {
  33. .name = "rtc-bfin",
  34. .id = -1,
  35. };
  36. #endif
  37. /*
  38. * Driver needs to know address, irq and flag pin.
  39. */
  40. #if IS_ENABLED(CONFIG_SMC91X)
  41. #include <linux/smc91x.h>
  42. static struct smc91x_platdata smc91x_info = {
  43. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  44. .leda = RPC_LED_100_10,
  45. .ledb = RPC_LED_TX_RX,
  46. };
  47. static struct resource smc91x_resources[] = {
  48. {
  49. .name = "smc91x-regs",
  50. .start = 0x20300300,
  51. .end = 0x20300300 + 16,
  52. .flags = IORESOURCE_MEM,
  53. }, {
  54. .start = IRQ_PF7,
  55. .end = IRQ_PF7,
  56. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  57. },
  58. };
  59. static struct platform_device smc91x_device = {
  60. .name = "smc91x",
  61. .id = 0,
  62. .num_resources = ARRAY_SIZE(smc91x_resources),
  63. .resource = smc91x_resources,
  64. .dev = {
  65. .platform_data = &smc91x_info,
  66. },
  67. };
  68. #endif
  69. #if IS_ENABLED(CONFIG_USB_NET2272)
  70. static struct resource net2272_bfin_resources[] = {
  71. {
  72. .start = 0x20300000,
  73. .end = 0x20300000 + 0x100,
  74. .flags = IORESOURCE_MEM,
  75. }, {
  76. .start = 1,
  77. .flags = IORESOURCE_BUS,
  78. }, {
  79. .start = IRQ_PF10,
  80. .end = IRQ_PF10,
  81. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  82. },
  83. };
  84. static struct platform_device net2272_bfin_device = {
  85. .name = "net2272",
  86. .id = -1,
  87. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  88. .resource = net2272_bfin_resources,
  89. };
  90. #endif
  91. #if IS_ENABLED(CONFIG_MTD_BFIN_ASYNC)
  92. static struct mtd_partition stamp_partitions[] = {
  93. {
  94. .name = "bootloader(nor)",
  95. .size = 0x40000,
  96. .offset = 0,
  97. }, {
  98. .name = "linux kernel(nor)",
  99. .size = 0x180000,
  100. .offset = MTDPART_OFS_APPEND,
  101. }, {
  102. .name = "file system(nor)",
  103. .size = MTDPART_SIZ_FULL,
  104. .offset = MTDPART_OFS_APPEND,
  105. }
  106. };
  107. static struct physmap_flash_data stamp_flash_data = {
  108. .width = 2,
  109. .parts = stamp_partitions,
  110. .nr_parts = ARRAY_SIZE(stamp_partitions),
  111. };
  112. static struct resource stamp_flash_resource[] = {
  113. {
  114. .name = "cfi_probe",
  115. .start = 0x20000000,
  116. .end = 0x203fffff,
  117. .flags = IORESOURCE_MEM,
  118. }, {
  119. .start = 0x7BB07BB0, /* AMBCTL0 setting when accessing flash */
  120. .end = 0x7BB07BB0, /* AMBCTL1 setting when accessing flash */
  121. .flags = IORESOURCE_MEM,
  122. }, {
  123. .start = GPIO_PF0,
  124. .flags = IORESOURCE_IRQ,
  125. }
  126. };
  127. static struct platform_device stamp_flash_device = {
  128. .name = "bfin-async-flash",
  129. .id = 0,
  130. .dev = {
  131. .platform_data = &stamp_flash_data,
  132. },
  133. .num_resources = ARRAY_SIZE(stamp_flash_resource),
  134. .resource = stamp_flash_resource,
  135. };
  136. #endif
  137. #if IS_ENABLED(CONFIG_MTD_M25P80)
  138. static struct mtd_partition bfin_spi_flash_partitions[] = {
  139. {
  140. .name = "bootloader(spi)",
  141. .size = 0x00040000,
  142. .offset = 0,
  143. .mask_flags = MTD_CAP_ROM
  144. }, {
  145. .name = "linux kernel(spi)",
  146. .size = 0x180000,
  147. .offset = MTDPART_OFS_APPEND,
  148. }, {
  149. .name = "file system(spi)",
  150. .size = MTDPART_SIZ_FULL,
  151. .offset = MTDPART_OFS_APPEND,
  152. }
  153. };
  154. static struct flash_platform_data bfin_spi_flash_data = {
  155. .name = "m25p80",
  156. .parts = bfin_spi_flash_partitions,
  157. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  158. .type = "m25p64",
  159. };
  160. /* SPI flash chip (m25p64) */
  161. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  162. .enable_dma = 0, /* use dma transfer with this chip*/
  163. };
  164. #endif
  165. #if IS_ENABLED(CONFIG_MMC_SPI)
  166. #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
  167. static int bfin_mmc_spi_init(struct device *dev,
  168. irqreturn_t (*detect_int)(int, void *), void *data)
  169. {
  170. return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
  171. IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
  172. "mmc-spi-detect", data);
  173. }
  174. static void bfin_mmc_spi_exit(struct device *dev, void *data)
  175. {
  176. free_irq(MMC_SPI_CARD_DETECT_INT, data);
  177. }
  178. static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
  179. .init = bfin_mmc_spi_init,
  180. .exit = bfin_mmc_spi_exit,
  181. .detect_delay = 100, /* msecs */
  182. };
  183. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  184. .enable_dma = 0,
  185. .pio_interrupt = 0,
  186. };
  187. #endif
  188. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  189. #if IS_ENABLED(CONFIG_MTD_M25P80)
  190. {
  191. /* the modalias must be the same as spi device driver name */
  192. .modalias = "m25p80", /* Name of spi_driver for this device */
  193. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  194. .bus_num = 0, /* Framework bus number */
  195. .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
  196. .platform_data = &bfin_spi_flash_data,
  197. .controller_data = &spi_flash_chip_info,
  198. .mode = SPI_MODE_3,
  199. },
  200. #endif
  201. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
  202. {
  203. .modalias = "ad1836",
  204. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  205. .bus_num = 0,
  206. .chip_select = 4,
  207. .platform_data = "ad1836", /* only includes chip name for the moment */
  208. .mode = SPI_MODE_3,
  209. },
  210. #endif
  211. #if IS_ENABLED(CONFIG_SPI_SPIDEV)
  212. {
  213. .modalias = "spidev",
  214. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  215. .bus_num = 0,
  216. .chip_select = 1,
  217. },
  218. #endif
  219. #if IS_ENABLED(CONFIG_MMC_SPI)
  220. {
  221. .modalias = "mmc_spi",
  222. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  223. .bus_num = 0,
  224. .chip_select = 4,
  225. .platform_data = &bfin_mmc_spi_pdata,
  226. .controller_data = &mmc_spi_chip_info,
  227. .mode = SPI_MODE_3,
  228. },
  229. #endif
  230. };
  231. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  232. /* SPI (0) */
  233. static struct resource bfin_spi0_resource[] = {
  234. [0] = {
  235. .start = SPI0_REGBASE,
  236. .end = SPI0_REGBASE + 0xFF,
  237. .flags = IORESOURCE_MEM,
  238. },
  239. [1] = {
  240. .start = CH_SPI,
  241. .end = CH_SPI,
  242. .flags = IORESOURCE_DMA,
  243. },
  244. [2] = {
  245. .start = IRQ_SPI,
  246. .end = IRQ_SPI,
  247. .flags = IORESOURCE_IRQ,
  248. }
  249. };
  250. /* SPI controller data */
  251. static struct bfin5xx_spi_master bfin_spi0_info = {
  252. .num_chipselect = 8,
  253. .enable_dma = 1, /* master has the ability to do dma transfer */
  254. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  255. };
  256. static struct platform_device bfin_spi0_device = {
  257. .name = "bfin-spi",
  258. .id = 0, /* Bus number */
  259. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  260. .resource = bfin_spi0_resource,
  261. .dev = {
  262. .platform_data = &bfin_spi0_info, /* Passed to driver */
  263. },
  264. };
  265. #endif /* spi master and devices */
  266. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  267. #ifdef CONFIG_SERIAL_BFIN_UART0
  268. static struct resource bfin_uart0_resources[] = {
  269. {
  270. .start = BFIN_UART_THR,
  271. .end = BFIN_UART_GCTL+2,
  272. .flags = IORESOURCE_MEM,
  273. },
  274. {
  275. .start = IRQ_UART0_TX,
  276. .end = IRQ_UART0_TX,
  277. .flags = IORESOURCE_IRQ,
  278. },
  279. {
  280. .start = IRQ_UART0_RX,
  281. .end = IRQ_UART0_RX,
  282. .flags = IORESOURCE_IRQ,
  283. },
  284. {
  285. .start = IRQ_UART0_ERROR,
  286. .end = IRQ_UART0_ERROR,
  287. .flags = IORESOURCE_IRQ,
  288. },
  289. {
  290. .start = CH_UART0_TX,
  291. .end = CH_UART0_TX,
  292. .flags = IORESOURCE_DMA,
  293. },
  294. {
  295. .start = CH_UART0_RX,
  296. .end = CH_UART0_RX,
  297. .flags = IORESOURCE_DMA,
  298. },
  299. };
  300. static unsigned short bfin_uart0_peripherals[] = {
  301. P_UART0_TX, P_UART0_RX, 0
  302. };
  303. static struct platform_device bfin_uart0_device = {
  304. .name = "bfin-uart",
  305. .id = 0,
  306. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  307. .resource = bfin_uart0_resources,
  308. .dev = {
  309. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  310. },
  311. };
  312. #endif
  313. #endif
  314. #if IS_ENABLED(CONFIG_BFIN_SIR)
  315. #ifdef CONFIG_BFIN_SIR0
  316. static struct resource bfin_sir0_resources[] = {
  317. {
  318. .start = 0xFFC00400,
  319. .end = 0xFFC004FF,
  320. .flags = IORESOURCE_MEM,
  321. },
  322. {
  323. .start = IRQ_UART0_RX,
  324. .end = IRQ_UART0_RX+1,
  325. .flags = IORESOURCE_IRQ,
  326. },
  327. {
  328. .start = CH_UART0_RX,
  329. .end = CH_UART0_RX+1,
  330. .flags = IORESOURCE_DMA,
  331. },
  332. };
  333. static struct platform_device bfin_sir0_device = {
  334. .name = "bfin_sir",
  335. .id = 0,
  336. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  337. .resource = bfin_sir0_resources,
  338. };
  339. #endif
  340. #endif
  341. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  342. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  343. static struct resource bfin_sport0_uart_resources[] = {
  344. {
  345. .start = SPORT0_TCR1,
  346. .end = SPORT0_MRCS3+4,
  347. .flags = IORESOURCE_MEM,
  348. },
  349. {
  350. .start = IRQ_SPORT0_RX,
  351. .end = IRQ_SPORT0_RX+1,
  352. .flags = IORESOURCE_IRQ,
  353. },
  354. {
  355. .start = IRQ_SPORT0_ERROR,
  356. .end = IRQ_SPORT0_ERROR,
  357. .flags = IORESOURCE_IRQ,
  358. },
  359. };
  360. static unsigned short bfin_sport0_peripherals[] = {
  361. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  362. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  363. };
  364. static struct platform_device bfin_sport0_uart_device = {
  365. .name = "bfin-sport-uart",
  366. .id = 0,
  367. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  368. .resource = bfin_sport0_uart_resources,
  369. .dev = {
  370. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  371. },
  372. };
  373. #endif
  374. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  375. static struct resource bfin_sport1_uart_resources[] = {
  376. {
  377. .start = SPORT1_TCR1,
  378. .end = SPORT1_MRCS3+4,
  379. .flags = IORESOURCE_MEM,
  380. },
  381. {
  382. .start = IRQ_SPORT1_RX,
  383. .end = IRQ_SPORT1_RX+1,
  384. .flags = IORESOURCE_IRQ,
  385. },
  386. {
  387. .start = IRQ_SPORT1_ERROR,
  388. .end = IRQ_SPORT1_ERROR,
  389. .flags = IORESOURCE_IRQ,
  390. },
  391. };
  392. static unsigned short bfin_sport1_peripherals[] = {
  393. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  394. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  395. };
  396. static struct platform_device bfin_sport1_uart_device = {
  397. .name = "bfin-sport-uart",
  398. .id = 1,
  399. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  400. .resource = bfin_sport1_uart_resources,
  401. .dev = {
  402. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  403. },
  404. };
  405. #endif
  406. #endif
  407. #if IS_ENABLED(CONFIG_BFIN_SPORT)
  408. static struct resource bfin_sport0_resources[] = {
  409. {
  410. .start = SPORT0_TCR1,
  411. .end = SPORT0_MRCS3+4,
  412. .flags = IORESOURCE_MEM,
  413. },
  414. {
  415. .start = IRQ_SPORT0_TX,
  416. .end = IRQ_SPORT0_TX+1,
  417. .flags = IORESOURCE_IRQ,
  418. },
  419. {
  420. .start = IRQ_SPORT0_RX,
  421. .end = IRQ_SPORT0_RX+1,
  422. .flags = IORESOURCE_IRQ,
  423. },
  424. {
  425. .start = IRQ_SPORT0_ERROR,
  426. .end = IRQ_SPORT0_ERROR,
  427. .flags = IORESOURCE_IRQ,
  428. },
  429. {
  430. .start = CH_SPORT0_TX,
  431. .end = CH_SPORT0_TX,
  432. .flags = IORESOURCE_DMA,
  433. },
  434. {
  435. .start = CH_SPORT0_RX,
  436. .end = CH_SPORT0_RX,
  437. .flags = IORESOURCE_DMA,
  438. },
  439. };
  440. static struct platform_device bfin_sport0_device = {
  441. .name = "bfin_sport_raw",
  442. .id = 0,
  443. .num_resources = ARRAY_SIZE(bfin_sport0_resources),
  444. .resource = bfin_sport0_resources,
  445. .dev = {
  446. .platform_data = &bfin_sport0_peripherals,
  447. },
  448. };
  449. #endif
  450. #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
  451. #include <linux/input.h>
  452. #include <linux/gpio_keys.h>
  453. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  454. {BTN_0, GPIO_PF5, 0, "gpio-keys: BTN0"},
  455. {BTN_1, GPIO_PF6, 0, "gpio-keys: BTN1"},
  456. {BTN_2, GPIO_PF8, 0, "gpio-keys: BTN2"},
  457. };
  458. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  459. .buttons = bfin_gpio_keys_table,
  460. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  461. };
  462. static struct platform_device bfin_device_gpiokeys = {
  463. .name = "gpio-keys",
  464. .dev = {
  465. .platform_data = &bfin_gpio_keys_data,
  466. },
  467. };
  468. #endif
  469. #if IS_ENABLED(CONFIG_I2C_GPIO)
  470. #include <linux/i2c-gpio.h>
  471. static struct i2c_gpio_platform_data i2c_gpio_data = {
  472. .sda_pin = GPIO_PF2,
  473. .scl_pin = GPIO_PF3,
  474. .sda_is_open_drain = 0,
  475. .scl_is_open_drain = 0,
  476. .udelay = 10,
  477. };
  478. static struct platform_device i2c_gpio_device = {
  479. .name = "i2c-gpio",
  480. .id = 0,
  481. .dev = {
  482. .platform_data = &i2c_gpio_data,
  483. },
  484. };
  485. #endif
  486. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  487. #if IS_ENABLED(CONFIG_JOYSTICK_AD7142)
  488. {
  489. I2C_BOARD_INFO("ad7142_joystick", 0x2C),
  490. .irq = 39,
  491. },
  492. #endif
  493. #if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
  494. {
  495. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  496. },
  497. #endif
  498. #if IS_ENABLED(CONFIG_INPUT_PCF8574)
  499. {
  500. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  501. .irq = 39,
  502. },
  503. #endif
  504. #if IS_ENABLED(CONFIG_FB_BFIN_7393)
  505. {
  506. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  507. },
  508. #endif
  509. #if IS_ENABLED(CONFIG_BFIN_TWI_LCD)
  510. {
  511. I2C_BOARD_INFO("ad5252", 0x2f),
  512. },
  513. #endif
  514. };
  515. static const unsigned int cclk_vlev_datasheet[] =
  516. {
  517. VRPAIR(VLEV_085, 250000000),
  518. VRPAIR(VLEV_090, 376000000),
  519. VRPAIR(VLEV_095, 426000000),
  520. VRPAIR(VLEV_100, 426000000),
  521. VRPAIR(VLEV_105, 476000000),
  522. VRPAIR(VLEV_110, 476000000),
  523. VRPAIR(VLEV_115, 476000000),
  524. VRPAIR(VLEV_120, 600000000),
  525. VRPAIR(VLEV_125, 600000000),
  526. VRPAIR(VLEV_130, 600000000),
  527. };
  528. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  529. .tuple_tab = cclk_vlev_datasheet,
  530. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  531. .vr_settling_time = 25 /* us */,
  532. };
  533. static struct platform_device bfin_dpmc = {
  534. .name = "bfin dpmc",
  535. .dev = {
  536. .platform_data = &bfin_dmpc_vreg_data,
  537. },
  538. };
  539. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S) || \
  540. IS_ENABLED(CONFIG_SND_BF5XX_AC97)
  541. #include <asm/bfin_sport.h>
  542. #define SPORT_REQ(x) \
  543. [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
  544. P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
  545. static const u16 bfin_snd_pin[][7] = {
  546. SPORT_REQ(0),
  547. SPORT_REQ(1),
  548. };
  549. static struct bfin_snd_platform_data bfin_snd_data[] = {
  550. {
  551. .pin_req = &bfin_snd_pin[0][0],
  552. },
  553. {
  554. .pin_req = &bfin_snd_pin[1][0],
  555. },
  556. };
  557. #define BFIN_SND_RES(x) \
  558. [x] = { \
  559. { \
  560. .start = SPORT##x##_TCR1, \
  561. .end = SPORT##x##_TCR1, \
  562. .flags = IORESOURCE_MEM \
  563. }, \
  564. { \
  565. .start = CH_SPORT##x##_RX, \
  566. .end = CH_SPORT##x##_RX, \
  567. .flags = IORESOURCE_DMA, \
  568. }, \
  569. { \
  570. .start = CH_SPORT##x##_TX, \
  571. .end = CH_SPORT##x##_TX, \
  572. .flags = IORESOURCE_DMA, \
  573. }, \
  574. { \
  575. .start = IRQ_SPORT##x##_ERROR, \
  576. .end = IRQ_SPORT##x##_ERROR, \
  577. .flags = IORESOURCE_IRQ, \
  578. } \
  579. }
  580. static struct resource bfin_snd_resources[][4] = {
  581. BFIN_SND_RES(0),
  582. BFIN_SND_RES(1),
  583. };
  584. #endif
  585. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
  586. static struct platform_device bfin_i2s_pcm = {
  587. .name = "bfin-i2s-pcm-audio",
  588. .id = -1,
  589. };
  590. #endif
  591. #if IS_ENABLED(CONFIG_SND_BF5XX_AC97)
  592. static struct platform_device bfin_ac97_pcm = {
  593. .name = "bfin-ac97-pcm-audio",
  594. .id = -1,
  595. };
  596. #endif
  597. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
  598. static const char * const ad1836_link[] = {
  599. "bfin-i2s.0",
  600. "spi0.4",
  601. };
  602. static struct platform_device bfin_ad1836_machine = {
  603. .name = "bfin-snd-ad1836",
  604. .id = -1,
  605. .dev = {
  606. .platform_data = (void *)ad1836_link,
  607. },
  608. };
  609. #endif
  610. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD73311)
  611. static const unsigned ad73311_gpio[] = {
  612. GPIO_PF4,
  613. };
  614. static struct platform_device bfin_ad73311_machine = {
  615. .name = "bfin-snd-ad73311",
  616. .id = 1,
  617. .dev = {
  618. .platform_data = (void *)ad73311_gpio,
  619. },
  620. };
  621. #endif
  622. #if IS_ENABLED(CONFIG_SND_SOC_AD73311)
  623. static struct platform_device bfin_ad73311_codec_device = {
  624. .name = "ad73311",
  625. .id = -1,
  626. };
  627. #endif
  628. #if IS_ENABLED(CONFIG_SND_SOC_AD74111)
  629. static struct platform_device bfin_ad74111_codec_device = {
  630. .name = "ad74111",
  631. .id = -1,
  632. };
  633. #endif
  634. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_I2S)
  635. static struct platform_device bfin_i2s = {
  636. .name = "bfin-i2s",
  637. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  638. .num_resources =
  639. ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  640. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  641. .dev = {
  642. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  643. },
  644. };
  645. #endif
  646. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AC97)
  647. static struct platform_device bfin_ac97 = {
  648. .name = "bfin-ac97",
  649. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  650. .num_resources =
  651. ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  652. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  653. .dev = {
  654. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  655. },
  656. };
  657. #endif
  658. static struct platform_device *stamp_devices[] __initdata = {
  659. &bfin_dpmc,
  660. #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
  661. &rtc_device,
  662. #endif
  663. #if IS_ENABLED(CONFIG_SMC91X)
  664. &smc91x_device,
  665. #endif
  666. #if IS_ENABLED(CONFIG_USB_NET2272)
  667. &net2272_bfin_device,
  668. #endif
  669. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  670. &bfin_spi0_device,
  671. #endif
  672. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  673. #ifdef CONFIG_SERIAL_BFIN_UART0
  674. &bfin_uart0_device,
  675. #endif
  676. #endif
  677. #if IS_ENABLED(CONFIG_BFIN_SIR)
  678. #ifdef CONFIG_BFIN_SIR0
  679. &bfin_sir0_device,
  680. #endif
  681. #endif
  682. #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
  683. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  684. &bfin_sport0_uart_device,
  685. #endif
  686. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  687. &bfin_sport1_uart_device,
  688. #endif
  689. #endif
  690. #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
  691. &bfin_device_gpiokeys,
  692. #endif
  693. #if IS_ENABLED(CONFIG_I2C_GPIO)
  694. &i2c_gpio_device,
  695. #endif
  696. #if IS_ENABLED(CONFIG_MTD_BFIN_ASYNC)
  697. &stamp_flash_device,
  698. #endif
  699. #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
  700. &bfin_i2s_pcm,
  701. #endif
  702. #if IS_ENABLED(CONFIG_SND_BF5XX_AC97)
  703. &bfin_ac97_pcm,
  704. #endif
  705. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
  706. &bfin_ad1836_machine,
  707. #endif
  708. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD73311)
  709. &bfin_ad73311_machine,
  710. #endif
  711. #if IS_ENABLED(CONFIG_SND_SOC_AD73311)
  712. &bfin_ad73311_codec_device,
  713. #endif
  714. #if IS_ENABLED(CONFIG_SND_SOC_AD74111)
  715. &bfin_ad74111_codec_device,
  716. #endif
  717. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_I2S)
  718. &bfin_i2s,
  719. #endif
  720. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AC97)
  721. &bfin_ac97,
  722. #endif
  723. };
  724. static int __init net2272_init(void)
  725. {
  726. #if IS_ENABLED(CONFIG_USB_NET2272)
  727. int ret;
  728. /* Set PF0 to 0, PF1 to 1 make /AMS3 work properly */
  729. ret = gpio_request(GPIO_PF0, "net2272");
  730. if (ret)
  731. return ret;
  732. ret = gpio_request(GPIO_PF1, "net2272");
  733. if (ret) {
  734. gpio_free(GPIO_PF0);
  735. return ret;
  736. }
  737. ret = gpio_request(GPIO_PF11, "net2272");
  738. if (ret) {
  739. gpio_free(GPIO_PF0);
  740. gpio_free(GPIO_PF1);
  741. return ret;
  742. }
  743. gpio_direction_output(GPIO_PF0, 0);
  744. gpio_direction_output(GPIO_PF1, 1);
  745. /* Reset the USB chip */
  746. gpio_direction_output(GPIO_PF11, 0);
  747. mdelay(2);
  748. gpio_set_value(GPIO_PF11, 1);
  749. #endif
  750. return 0;
  751. }
  752. static int __init stamp_init(void)
  753. {
  754. int ret;
  755. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  756. i2c_register_board_info(0, bfin_i2c_board_info,
  757. ARRAY_SIZE(bfin_i2c_board_info));
  758. ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  759. if (ret < 0)
  760. return ret;
  761. #if IS_ENABLED(CONFIG_SMC91X)
  762. /*
  763. * setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC.
  764. * the bfin-async-map driver takes care of flipping between
  765. * flash and ethernet when necessary.
  766. */
  767. ret = gpio_request(GPIO_PF0, "enet_cpld");
  768. if (!ret) {
  769. gpio_direction_output(GPIO_PF0, 1);
  770. gpio_free(GPIO_PF0);
  771. }
  772. #endif
  773. if (net2272_init())
  774. pr_warning("unable to configure net2272; it probably won't work\n");
  775. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  776. return 0;
  777. }
  778. arch_initcall(stamp_init);
  779. static struct platform_device *stamp_early_devices[] __initdata = {
  780. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  781. #ifdef CONFIG_SERIAL_BFIN_UART0
  782. &bfin_uart0_device,
  783. #endif
  784. #endif
  785. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  786. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  787. &bfin_sport0_uart_device,
  788. #endif
  789. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  790. &bfin_sport1_uart_device,
  791. #endif
  792. #endif
  793. };
  794. void __init native_machine_early_platform_add_devices(void)
  795. {
  796. printk(KERN_INFO "register early platform devices\n");
  797. early_platform_add_devices(stamp_early_devices,
  798. ARRAY_SIZE(stamp_early_devices));
  799. }
  800. void native_machine_restart(char *cmd)
  801. {
  802. /* workaround pull up on cpld / flash pin not being strong enough */
  803. gpio_request(GPIO_PF0, "flash_cpld");
  804. gpio_direction_output(GPIO_PF0, 0);
  805. }