cm_bf561.c 12 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  16. #include <linux/usb/isp1362.h>
  17. #endif
  18. #include <linux/ata_platform.h>
  19. #include <linux/irq.h>
  20. #include <linux/gpio.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/portmux.h>
  24. #include <asm/dpmc.h>
  25. #include <linux/mtd/physmap.h>
  26. /*
  27. * Name the Board for the /proc/cpuinfo
  28. */
  29. const char bfin_board_name[] = "Bluetechnix CM BF561";
  30. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  31. /* all SPI peripherals info goes here */
  32. #if IS_ENABLED(CONFIG_MTD_M25P80)
  33. static struct mtd_partition bfin_spi_flash_partitions[] = {
  34. {
  35. .name = "bootloader(spi)",
  36. .size = 0x00020000,
  37. .offset = 0,
  38. .mask_flags = MTD_CAP_ROM
  39. }, {
  40. .name = "linux kernel(spi)",
  41. .size = 0xe0000,
  42. .offset = 0x20000
  43. }, {
  44. .name = "file system(spi)",
  45. .size = 0x700000,
  46. .offset = 0x00100000,
  47. }
  48. };
  49. static struct flash_platform_data bfin_spi_flash_data = {
  50. .name = "m25p80",
  51. .parts = bfin_spi_flash_partitions,
  52. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  53. .type = "m25p64",
  54. };
  55. /* SPI flash chip (m25p64) */
  56. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  57. .enable_dma = 0, /* use dma transfer with this chip*/
  58. };
  59. #endif
  60. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  61. #if IS_ENABLED(CONFIG_MTD_M25P80)
  62. {
  63. /* the modalias must be the same as spi device driver name */
  64. .modalias = "m25p80", /* Name of spi_driver for this device */
  65. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  66. .bus_num = 0, /* Framework bus number */
  67. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  68. .platform_data = &bfin_spi_flash_data,
  69. .controller_data = &spi_flash_chip_info,
  70. .mode = SPI_MODE_3,
  71. },
  72. #endif
  73. #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
  74. {
  75. .modalias = "ad183x",
  76. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  77. .bus_num = 0,
  78. .chip_select = 4,
  79. },
  80. #endif
  81. #if IS_ENABLED(CONFIG_MMC_SPI)
  82. {
  83. .modalias = "mmc_spi",
  84. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  85. .bus_num = 0,
  86. .chip_select = 1,
  87. .mode = SPI_MODE_3,
  88. },
  89. #endif
  90. };
  91. /* SPI (0) */
  92. static struct resource bfin_spi0_resource[] = {
  93. [0] = {
  94. .start = SPI0_REGBASE,
  95. .end = SPI0_REGBASE + 0xFF,
  96. .flags = IORESOURCE_MEM,
  97. },
  98. [1] = {
  99. .start = CH_SPI,
  100. .end = CH_SPI,
  101. .flags = IORESOURCE_DMA,
  102. },
  103. [2] = {
  104. .start = IRQ_SPI,
  105. .end = IRQ_SPI,
  106. .flags = IORESOURCE_IRQ,
  107. },
  108. };
  109. /* SPI controller data */
  110. static struct bfin5xx_spi_master bfin_spi0_info = {
  111. .num_chipselect = 8,
  112. .enable_dma = 1, /* master has the ability to do dma transfer */
  113. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  114. };
  115. static struct platform_device bfin_spi0_device = {
  116. .name = "bfin-spi",
  117. .id = 0, /* Bus number */
  118. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  119. .resource = bfin_spi0_resource,
  120. .dev = {
  121. .platform_data = &bfin_spi0_info, /* Passed to driver */
  122. },
  123. };
  124. #endif /* spi master and devices */
  125. #if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
  126. static struct platform_device hitachi_fb_device = {
  127. .name = "hitachi-tx09",
  128. };
  129. #endif
  130. #if IS_ENABLED(CONFIG_SMC91X)
  131. #include <linux/smc91x.h>
  132. static struct smc91x_platdata smc91x_info = {
  133. .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT,
  134. .leda = RPC_LED_100_10,
  135. .ledb = RPC_LED_TX_RX,
  136. };
  137. static struct resource smc91x_resources[] = {
  138. {
  139. .name = "smc91x-regs",
  140. .start = 0x28000300,
  141. .end = 0x28000300 + 16,
  142. .flags = IORESOURCE_MEM,
  143. }, {
  144. .start = IRQ_PF0,
  145. .end = IRQ_PF0,
  146. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  147. },
  148. };
  149. static struct platform_device smc91x_device = {
  150. .name = "smc91x",
  151. .id = 0,
  152. .num_resources = ARRAY_SIZE(smc91x_resources),
  153. .resource = smc91x_resources,
  154. .dev = {
  155. .platform_data = &smc91x_info,
  156. },
  157. };
  158. #endif
  159. #if IS_ENABLED(CONFIG_SMSC911X)
  160. #include <linux/smsc911x.h>
  161. static struct resource smsc911x_resources[] = {
  162. {
  163. .name = "smsc911x-memory",
  164. .start = 0x24008000,
  165. .end = 0x24008000 + 0xFF,
  166. .flags = IORESOURCE_MEM,
  167. },
  168. {
  169. .start = IRQ_PF43,
  170. .end = IRQ_PF43,
  171. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  172. },
  173. };
  174. static struct smsc911x_platform_config smsc911x_config = {
  175. .flags = SMSC911X_USE_16BIT,
  176. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  177. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  178. .phy_interface = PHY_INTERFACE_MODE_MII,
  179. };
  180. static struct platform_device smsc911x_device = {
  181. .name = "smsc911x",
  182. .id = 0,
  183. .num_resources = ARRAY_SIZE(smsc911x_resources),
  184. .resource = smsc911x_resources,
  185. .dev = {
  186. .platform_data = &smsc911x_config,
  187. },
  188. };
  189. #endif
  190. #if IS_ENABLED(CONFIG_USB_NET2272)
  191. static struct resource net2272_bfin_resources[] = {
  192. {
  193. .start = 0x24000000,
  194. .end = 0x24000000 + 0x100,
  195. .flags = IORESOURCE_MEM,
  196. }, {
  197. .start = IRQ_PF45,
  198. .end = IRQ_PF45,
  199. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  200. },
  201. };
  202. static struct platform_device net2272_bfin_device = {
  203. .name = "net2272",
  204. .id = -1,
  205. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  206. .resource = net2272_bfin_resources,
  207. };
  208. #endif
  209. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  210. static struct resource isp1362_hcd_resources[] = {
  211. {
  212. .start = 0x24008000,
  213. .end = 0x24008000,
  214. .flags = IORESOURCE_MEM,
  215. }, {
  216. .start = 0x24008004,
  217. .end = 0x24008004,
  218. .flags = IORESOURCE_MEM,
  219. }, {
  220. .start = IRQ_PF47,
  221. .end = IRQ_PF47,
  222. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  223. },
  224. };
  225. static struct isp1362_platform_data isp1362_priv = {
  226. .sel15Kres = 1,
  227. .clknotstop = 0,
  228. .oc_enable = 0,
  229. .int_act_high = 0,
  230. .int_edge_triggered = 0,
  231. .remote_wakeup_connected = 0,
  232. .no_power_switching = 1,
  233. .power_switching_mode = 0,
  234. };
  235. static struct platform_device isp1362_hcd_device = {
  236. .name = "isp1362-hcd",
  237. .id = 0,
  238. .dev = {
  239. .platform_data = &isp1362_priv,
  240. },
  241. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  242. .resource = isp1362_hcd_resources,
  243. };
  244. #endif
  245. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  246. #ifdef CONFIG_SERIAL_BFIN_UART0
  247. static struct resource bfin_uart0_resources[] = {
  248. {
  249. .start = BFIN_UART_THR,
  250. .end = BFIN_UART_GCTL+2,
  251. .flags = IORESOURCE_MEM,
  252. },
  253. {
  254. .start = IRQ_UART_TX,
  255. .end = IRQ_UART_TX,
  256. .flags = IORESOURCE_IRQ,
  257. },
  258. {
  259. .start = IRQ_UART_RX,
  260. .end = IRQ_UART_RX,
  261. .flags = IORESOURCE_IRQ,
  262. },
  263. {
  264. .start = IRQ_UART_ERROR,
  265. .end = IRQ_UART_ERROR,
  266. .flags = IORESOURCE_IRQ,
  267. },
  268. {
  269. .start = CH_UART_TX,
  270. .end = CH_UART_TX,
  271. .flags = IORESOURCE_DMA,
  272. },
  273. {
  274. .start = CH_UART_RX,
  275. .end = CH_UART_RX,
  276. .flags = IORESOURCE_DMA,
  277. },
  278. };
  279. static unsigned short bfin_uart0_peripherals[] = {
  280. P_UART0_TX, P_UART0_RX, 0
  281. };
  282. static struct platform_device bfin_uart0_device = {
  283. .name = "bfin-uart",
  284. .id = 0,
  285. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  286. .resource = bfin_uart0_resources,
  287. .dev = {
  288. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  289. },
  290. };
  291. #endif
  292. #endif
  293. #if IS_ENABLED(CONFIG_BFIN_SIR)
  294. #ifdef CONFIG_BFIN_SIR0
  295. static struct resource bfin_sir0_resources[] = {
  296. {
  297. .start = 0xFFC00400,
  298. .end = 0xFFC004FF,
  299. .flags = IORESOURCE_MEM,
  300. },
  301. {
  302. .start = IRQ_UART0_RX,
  303. .end = IRQ_UART0_RX+1,
  304. .flags = IORESOURCE_IRQ,
  305. },
  306. {
  307. .start = CH_UART0_RX,
  308. .end = CH_UART0_RX+1,
  309. .flags = IORESOURCE_DMA,
  310. },
  311. };
  312. static struct platform_device bfin_sir0_device = {
  313. .name = "bfin_sir",
  314. .id = 0,
  315. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  316. .resource = bfin_sir0_resources,
  317. };
  318. #endif
  319. #endif
  320. #if IS_ENABLED(CONFIG_PATA_PLATFORM)
  321. #define PATA_INT IRQ_PF46
  322. static struct pata_platform_info bfin_pata_platform_data = {
  323. .ioport_shift = 2,
  324. };
  325. static struct resource bfin_pata_resources[] = {
  326. {
  327. .start = 0x2400C000,
  328. .end = 0x2400C001F,
  329. .flags = IORESOURCE_MEM,
  330. },
  331. {
  332. .start = 0x2400D018,
  333. .end = 0x2400D01B,
  334. .flags = IORESOURCE_MEM,
  335. },
  336. {
  337. .start = PATA_INT,
  338. .end = PATA_INT,
  339. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  340. },
  341. };
  342. static struct platform_device bfin_pata_device = {
  343. .name = "pata_platform",
  344. .id = -1,
  345. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  346. .resource = bfin_pata_resources,
  347. .dev = {
  348. .platform_data = &bfin_pata_platform_data,
  349. }
  350. };
  351. #endif
  352. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  353. static struct mtd_partition para_partitions[] = {
  354. {
  355. .name = "bootloader(nor)",
  356. .size = 0x40000,
  357. .offset = 0,
  358. }, {
  359. .name = "linux kernel(nor)",
  360. .size = 0x100000,
  361. .offset = MTDPART_OFS_APPEND,
  362. }, {
  363. .name = "file system(nor)",
  364. .size = MTDPART_SIZ_FULL,
  365. .offset = MTDPART_OFS_APPEND,
  366. }
  367. };
  368. static struct physmap_flash_data para_flash_data = {
  369. .width = 2,
  370. .parts = para_partitions,
  371. .nr_parts = ARRAY_SIZE(para_partitions),
  372. };
  373. static struct resource para_flash_resource = {
  374. .start = 0x20000000,
  375. .end = 0x207fffff,
  376. .flags = IORESOURCE_MEM,
  377. };
  378. static struct platform_device para_flash_device = {
  379. .name = "physmap-flash",
  380. .id = 0,
  381. .dev = {
  382. .platform_data = &para_flash_data,
  383. },
  384. .num_resources = 1,
  385. .resource = &para_flash_resource,
  386. };
  387. #endif
  388. static const unsigned int cclk_vlev_datasheet[] =
  389. {
  390. VRPAIR(VLEV_085, 250000000),
  391. VRPAIR(VLEV_090, 300000000),
  392. VRPAIR(VLEV_095, 313000000),
  393. VRPAIR(VLEV_100, 350000000),
  394. VRPAIR(VLEV_105, 400000000),
  395. VRPAIR(VLEV_110, 444000000),
  396. VRPAIR(VLEV_115, 450000000),
  397. VRPAIR(VLEV_120, 475000000),
  398. VRPAIR(VLEV_125, 500000000),
  399. VRPAIR(VLEV_130, 600000000),
  400. };
  401. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  402. .tuple_tab = cclk_vlev_datasheet,
  403. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  404. .vr_settling_time = 25 /* us */,
  405. };
  406. static struct platform_device bfin_dpmc = {
  407. .name = "bfin dpmc",
  408. .dev = {
  409. .platform_data = &bfin_dmpc_vreg_data,
  410. },
  411. };
  412. static struct platform_device *cm_bf561_devices[] __initdata = {
  413. &bfin_dpmc,
  414. #if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
  415. &hitachi_fb_device,
  416. #endif
  417. #if IS_ENABLED(CONFIG_SERIAL_BFIN)
  418. #ifdef CONFIG_SERIAL_BFIN_UART0
  419. &bfin_uart0_device,
  420. #endif
  421. #endif
  422. #if IS_ENABLED(CONFIG_BFIN_SIR)
  423. #ifdef CONFIG_BFIN_SIR0
  424. &bfin_sir0_device,
  425. #endif
  426. #endif
  427. #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  428. &isp1362_hcd_device,
  429. #endif
  430. #if IS_ENABLED(CONFIG_SMC91X)
  431. &smc91x_device,
  432. #endif
  433. #if IS_ENABLED(CONFIG_SMSC911X)
  434. &smsc911x_device,
  435. #endif
  436. #if IS_ENABLED(CONFIG_USB_NET2272)
  437. &net2272_bfin_device,
  438. #endif
  439. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  440. &bfin_spi0_device,
  441. #endif
  442. #if IS_ENABLED(CONFIG_PATA_PLATFORM)
  443. &bfin_pata_device,
  444. #endif
  445. #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
  446. &para_flash_device,
  447. #endif
  448. };
  449. static int __init net2272_init(void)
  450. {
  451. #if IS_ENABLED(CONFIG_USB_NET2272)
  452. int ret;
  453. ret = gpio_request(GPIO_PF46, "net2272");
  454. if (ret)
  455. return ret;
  456. /* Reset USB Chip, PF46 */
  457. gpio_direction_output(GPIO_PF46, 0);
  458. mdelay(2);
  459. gpio_set_value(GPIO_PF46, 1);
  460. #endif
  461. return 0;
  462. }
  463. static int __init cm_bf561_init(void)
  464. {
  465. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  466. platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
  467. #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
  468. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  469. #endif
  470. #if IS_ENABLED(CONFIG_PATA_PLATFORM)
  471. irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
  472. #endif
  473. if (net2272_init())
  474. pr_warning("unable to configure net2272; it probably won't work\n");
  475. return 0;
  476. }
  477. arch_initcall(cm_bf561_init);
  478. static struct platform_device *cm_bf561_early_devices[] __initdata = {
  479. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  480. #ifdef CONFIG_SERIAL_BFIN_UART0
  481. &bfin_uart0_device,
  482. #endif
  483. #endif
  484. };
  485. void __init native_machine_early_platform_add_devices(void)
  486. {
  487. printk(KERN_INFO "register early platform devices\n");
  488. early_platform_add_devices(cm_bf561_early_devices,
  489. ARRAY_SIZE(cm_bf561_early_devices));
  490. }