p1020rdb-pc_camp_core0.dts 1.4 KB

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  1. /*
  2. * P1020 RDB-PC Core0 Device Tree Source in CAMP mode.
  3. *
  4. * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
  5. * can be shared, all the other devices must be assigned to one core only.
  6. * This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb,
  7. * eth1, eth2, sdhc, crypto, global-util, message, pci0, pci1, msi.
  8. *
  9. * Please note to add "-b 0" for core0's dts compiling.
  10. *
  11. * Copyright 2012 Freescale Semiconductor Inc.
  12. *
  13. * This program is free software; you can redistribute it and/or modify it
  14. * under the terms of the GNU General Public License as published by the
  15. * Free Software Foundation; either version 2 of the License, or (at your
  16. * option) any later version.
  17. */
  18. /include/ "p1020rdb-pc_32b.dts"
  19. / {
  20. model = "fsl,P1020RDB-PC";
  21. compatible = "fsl,P1020RDB-PC";
  22. aliases {
  23. ethernet1 = &enet1;
  24. ethernet2 = &enet2;
  25. serial0 = &serial0;
  26. pci0 = &pci0;
  27. pci1 = &pci1;
  28. };
  29. cpus {
  30. PowerPC,P1020@1 {
  31. status = "disabled";
  32. };
  33. };
  34. memory {
  35. device_type = "memory";
  36. };
  37. localbus@ffe05000 {
  38. status = "disabled";
  39. };
  40. soc@ffe00000 {
  41. serial1: serial@4600 {
  42. status = "disabled";
  43. };
  44. enet0: ethernet@b0000 {
  45. status = "disabled";
  46. };
  47. mpic: pic@40000 {
  48. protected-sources = <
  49. 42 29 30 34 /* serial1, enet0-queue-group0 */
  50. 17 18 24 45 /* enet0-queue-group1, crypto */
  51. >;
  52. pic-no-reset;
  53. };
  54. };
  55. };