time.h 4.8 KB

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  1. /*
  2. * Common time prototypes and such for all ppc machines.
  3. *
  4. * Written by Cort Dougan (cort@cs.nmt.edu) to merge
  5. * Paul Mackerras' version and mine for PReP and Pmac.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #ifndef __POWERPC_TIME_H
  13. #define __POWERPC_TIME_H
  14. #ifdef __KERNEL__
  15. #include <linux/types.h>
  16. #include <linux/percpu.h>
  17. #include <asm/processor.h>
  18. /* time.c */
  19. extern unsigned long tb_ticks_per_jiffy;
  20. extern unsigned long tb_ticks_per_usec;
  21. extern unsigned long tb_ticks_per_sec;
  22. extern struct clock_event_device decrementer_clockevent;
  23. struct rtc_time;
  24. extern void to_tm(int tim, struct rtc_time * tm);
  25. extern void GregorianDay(struct rtc_time *tm);
  26. extern void tick_broadcast_ipi_handler(void);
  27. extern void generic_calibrate_decr(void);
  28. extern void set_dec_cpu6(unsigned int val);
  29. /* Some sane defaults: 125 MHz timebase, 1GHz processor */
  30. extern unsigned long ppc_proc_freq;
  31. #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8)
  32. extern unsigned long ppc_tb_freq;
  33. #define DEFAULT_TB_FREQ 125000000UL
  34. struct div_result {
  35. u64 result_high;
  36. u64 result_low;
  37. };
  38. /* Accessor functions for the timebase (RTC on 601) registers. */
  39. /* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
  40. #ifdef CONFIG_6xx
  41. #define __USE_RTC() (!cpu_has_feature(CPU_FTR_USE_TB))
  42. #else
  43. #define __USE_RTC() 0
  44. #endif
  45. #ifdef CONFIG_PPC64
  46. /* For compatibility, get_tbl() is defined as get_tb() on ppc64 */
  47. #define get_tbl get_tb
  48. #else
  49. static inline unsigned long get_tbl(void)
  50. {
  51. #if defined(CONFIG_403GCX)
  52. unsigned long tbl;
  53. asm volatile("mfspr %0, 0x3dd" : "=r" (tbl));
  54. return tbl;
  55. #else
  56. return mftbl();
  57. #endif
  58. }
  59. static inline unsigned int get_tbu(void)
  60. {
  61. #ifdef CONFIG_403GCX
  62. unsigned int tbu;
  63. asm volatile("mfspr %0, 0x3dc" : "=r" (tbu));
  64. return tbu;
  65. #else
  66. return mftbu();
  67. #endif
  68. }
  69. #endif /* !CONFIG_PPC64 */
  70. static inline unsigned int get_rtcl(void)
  71. {
  72. unsigned int rtcl;
  73. asm volatile("mfrtcl %0" : "=r" (rtcl));
  74. return rtcl;
  75. }
  76. static inline u64 get_rtc(void)
  77. {
  78. unsigned int hi, lo, hi2;
  79. do {
  80. asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2"
  81. : "=r" (hi), "=r" (lo), "=r" (hi2));
  82. } while (hi2 != hi);
  83. return (u64)hi * 1000000000 + lo;
  84. }
  85. static inline u64 get_vtb(void)
  86. {
  87. #ifdef CONFIG_PPC_BOOK3S_64
  88. if (cpu_has_feature(CPU_FTR_ARCH_207S))
  89. return mfvtb();
  90. #endif
  91. return 0;
  92. }
  93. #ifdef CONFIG_PPC64
  94. static inline u64 get_tb(void)
  95. {
  96. return mftb();
  97. }
  98. #else /* CONFIG_PPC64 */
  99. static inline u64 get_tb(void)
  100. {
  101. unsigned int tbhi, tblo, tbhi2;
  102. do {
  103. tbhi = get_tbu();
  104. tblo = get_tbl();
  105. tbhi2 = get_tbu();
  106. } while (tbhi != tbhi2);
  107. return ((u64)tbhi << 32) | tblo;
  108. }
  109. #endif /* !CONFIG_PPC64 */
  110. static inline u64 get_tb_or_rtc(void)
  111. {
  112. return __USE_RTC() ? get_rtc() : get_tb();
  113. }
  114. static inline void set_tb(unsigned int upper, unsigned int lower)
  115. {
  116. mtspr(SPRN_TBWL, 0);
  117. mtspr(SPRN_TBWU, upper);
  118. mtspr(SPRN_TBWL, lower);
  119. }
  120. /* Accessor functions for the decrementer register.
  121. * The 4xx doesn't even have a decrementer. I tried to use the
  122. * generic timer interrupt code, which seems OK, with the 4xx PIT
  123. * in auto-reload mode. The problem is PIT stops counting when it
  124. * hits zero. If it would wrap, we could use it just like a decrementer.
  125. */
  126. static inline unsigned int get_dec(void)
  127. {
  128. #if defined(CONFIG_40x)
  129. return (mfspr(SPRN_PIT));
  130. #else
  131. return (mfspr(SPRN_DEC));
  132. #endif
  133. }
  134. /*
  135. * Note: Book E and 4xx processors differ from other PowerPC processors
  136. * in when the decrementer generates its interrupt: on the 1 to 0
  137. * transition for Book E/4xx, but on the 0 to -1 transition for others.
  138. */
  139. static inline void set_dec(int val)
  140. {
  141. #if defined(CONFIG_40x)
  142. mtspr(SPRN_PIT, val);
  143. #elif defined(CONFIG_8xx_CPU6)
  144. set_dec_cpu6(val - 1);
  145. #else
  146. #ifndef CONFIG_BOOKE
  147. --val;
  148. #endif
  149. mtspr(SPRN_DEC, val);
  150. #endif /* not 40x or 8xx_CPU6 */
  151. }
  152. static inline unsigned long tb_ticks_since(unsigned long tstamp)
  153. {
  154. if (__USE_RTC()) {
  155. int delta = get_rtcl() - (unsigned int) tstamp;
  156. return delta < 0 ? delta + 1000000000 : delta;
  157. }
  158. return get_tbl() - tstamp;
  159. }
  160. #define mulhwu(x,y) \
  161. ({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
  162. #ifdef CONFIG_PPC64
  163. #define mulhdu(x,y) \
  164. ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
  165. #else
  166. extern u64 mulhdu(u64, u64);
  167. #endif
  168. extern void div128_by_32(u64 dividend_high, u64 dividend_low,
  169. unsigned divisor, struct div_result *dr);
  170. /* Used to store Processor Utilization register (purr) values */
  171. struct cpu_usage {
  172. u64 current_tb; /* Holds the current purr register values */
  173. };
  174. DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array);
  175. extern void secondary_cpu_time_init(void);
  176. DECLARE_PER_CPU(u64, decrementers_next_tb);
  177. #endif /* __KERNEL__ */
  178. #endif /* __POWERPC_TIME_H */