clk-mtk-v1.c 2.1 KB

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  1. /*
  2. * Copyright (c) 2014 MediaTek Inc.
  3. * Author: James Liao <jamesjj.liao@mediatek.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/of.h>
  15. #include <linux/of_address.h>
  16. #include <linux/io.h>
  17. #include <linux/slab.h>
  18. #include <linux/delay.h>
  19. #include <linux/clkdev.h>
  20. #include "clk-mtk-v1.h"
  21. #if !defined(MT_CCF_DEBUG) || !defined(MT_CCF_BRINGUP)
  22. #define MT_CCF_DEBUG 0
  23. #define MT_CCF_BRINGUP 0
  24. #endif
  25. static DEFINE_SPINLOCK(clk_ops_lock);
  26. spinlock_t *get_mtk_clk_lock(void)
  27. {
  28. return &clk_ops_lock;
  29. }
  30. /*
  31. * clk_mux
  32. */
  33. struct clk *mtk_clk_register_mux(
  34. const char *name,
  35. const char **parent_names,
  36. u8 num_parents,
  37. void __iomem *base_addr,
  38. u8 shift,
  39. u8 width,
  40. u8 gate_bit)
  41. {
  42. struct clk *clk;
  43. struct clk_mux *mux;
  44. struct clk_gate *gate = NULL;
  45. struct clk_hw *gate_hw = NULL;
  46. const struct clk_ops *gate_ops = NULL;
  47. u32 mask = BIT(width) - 1;
  48. #if MT_CCF_DEBUG
  49. pr_debug("name: %s, num_parents: %d, gate_bit: %d\n",
  50. name, (int)num_parents, (int)gate_bit);
  51. #endif /* MT_CCF_DEBUG */
  52. mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL);
  53. if (!mux)
  54. return ERR_PTR(-ENOMEM);
  55. mux->reg = base_addr;
  56. mux->mask = mask;
  57. mux->shift = shift;
  58. mux->flags = 0;
  59. mux->lock = &clk_ops_lock;
  60. if (gate_bit <= MAX_MUX_GATE_BIT) {
  61. gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL);
  62. if (!gate) {
  63. kfree(mux);
  64. return ERR_PTR(-ENOMEM);
  65. }
  66. gate->reg = base_addr;
  67. gate->bit_idx = gate_bit;
  68. gate->flags = CLK_GATE_SET_TO_DISABLE;
  69. gate->lock = &clk_ops_lock;
  70. gate_hw = &gate->hw;
  71. gate_ops = &clk_gate_ops;
  72. }
  73. clk = clk_register_composite(NULL, name, parent_names, num_parents,
  74. &mux->hw, &clk_mux_ops,
  75. NULL, NULL,
  76. gate_hw, gate_ops,
  77. CLK_IGNORE_UNUSED);
  78. if (IS_ERR(clk)) {
  79. kfree(gate);
  80. kfree(mux);
  81. }
  82. return clk;
  83. }