kxcjk-1013.c 33 KB

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  1. /*
  2. * KXCJK-1013 3-axis accelerometer driver
  3. * Copyright (c) 2014, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/i2c.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/delay.h>
  18. #include <linux/bitops.h>
  19. #include <linux/slab.h>
  20. #include <linux/string.h>
  21. #include <linux/acpi.h>
  22. #include <linux/gpio/consumer.h>
  23. #include <linux/pm.h>
  24. #include <linux/pm_runtime.h>
  25. #include <linux/iio/iio.h>
  26. #include <linux/iio/sysfs.h>
  27. #include <linux/iio/buffer.h>
  28. #include <linux/iio/trigger.h>
  29. #include <linux/iio/events.h>
  30. #include <linux/iio/trigger_consumer.h>
  31. #include <linux/iio/triggered_buffer.h>
  32. #include <linux/iio/accel/kxcjk_1013.h>
  33. #define KXCJK1013_DRV_NAME "kxcjk1013"
  34. #define KXCJK1013_IRQ_NAME "kxcjk1013_event"
  35. #define KXCJK1013_REG_XOUT_L 0x06
  36. /*
  37. * From low byte X axis register, all the other addresses of Y and Z can be
  38. * obtained by just applying axis offset. The following axis defines are just
  39. * provide clarity, but not used.
  40. */
  41. #define KXCJK1013_REG_XOUT_H 0x07
  42. #define KXCJK1013_REG_YOUT_L 0x08
  43. #define KXCJK1013_REG_YOUT_H 0x09
  44. #define KXCJK1013_REG_ZOUT_L 0x0A
  45. #define KXCJK1013_REG_ZOUT_H 0x0B
  46. #define KXCJK1013_REG_DCST_RESP 0x0C
  47. #define KXCJK1013_REG_WHO_AM_I 0x0F
  48. #define KXCJK1013_REG_INT_SRC1 0x16
  49. #define KXCJK1013_REG_INT_SRC2 0x17
  50. #define KXCJK1013_REG_STATUS_REG 0x18
  51. #define KXCJK1013_REG_INT_REL 0x1A
  52. #define KXCJK1013_REG_CTRL1 0x1B
  53. #define KXCJK1013_REG_CTRL2 0x1D
  54. #define KXCJK1013_REG_INT_CTRL1 0x1E
  55. #define KXCJK1013_REG_INT_CTRL2 0x1F
  56. #define KXCJK1013_REG_DATA_CTRL 0x21
  57. #define KXCJK1013_REG_WAKE_TIMER 0x29
  58. #define KXCJK1013_REG_SELF_TEST 0x3A
  59. #define KXCJK1013_REG_WAKE_THRES 0x6A
  60. #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7)
  61. #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6)
  62. #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5)
  63. #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4)
  64. #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3)
  65. #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1)
  66. #define KXCJK1013_REG_INT_REG1_BIT_IEA BIT(4)
  67. #define KXCJK1013_REG_INT_REG1_BIT_IEN BIT(5)
  68. #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF
  69. #define KXCJK1013_MAX_STARTUP_TIME_US 100000
  70. #define KXCJK1013_SLEEP_DELAY_MS 2000
  71. #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0)
  72. #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1)
  73. #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2)
  74. #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3)
  75. #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4)
  76. #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5)
  77. #define KXCJK1013_DEFAULT_WAKE_THRES 1
  78. enum kx_chipset {
  79. KXCJK1013,
  80. KXCJ91008,
  81. KXTJ21009,
  82. KX_MAX_CHIPS /* this must be last */
  83. };
  84. struct kxcjk1013_data {
  85. struct i2c_client *client;
  86. struct iio_trigger *dready_trig;
  87. struct iio_trigger *motion_trig;
  88. struct mutex mutex;
  89. s16 buffer[8];
  90. u8 odr_bits;
  91. u8 range;
  92. int wake_thres;
  93. int wake_dur;
  94. bool active_high_intr;
  95. bool dready_trigger_on;
  96. int ev_enable_state;
  97. bool motion_trigger_on;
  98. int64_t timestamp;
  99. enum kx_chipset chipset;
  100. };
  101. enum kxcjk1013_axis {
  102. AXIS_X,
  103. AXIS_Y,
  104. AXIS_Z,
  105. };
  106. enum kxcjk1013_mode {
  107. STANDBY,
  108. OPERATION,
  109. };
  110. enum kxcjk1013_range {
  111. KXCJK1013_RANGE_2G,
  112. KXCJK1013_RANGE_4G,
  113. KXCJK1013_RANGE_8G,
  114. };
  115. static const struct {
  116. int val;
  117. int val2;
  118. int odr_bits;
  119. } samp_freq_table[] = { {0, 781000, 0x08}, {1, 563000, 0x09},
  120. {3, 125000, 0x0A}, {6, 250000, 0x0B}, {12, 500000, 0},
  121. {25, 0, 0x01}, {50, 0, 0x02}, {100, 0, 0x03},
  122. {200, 0, 0x04}, {400, 0, 0x05}, {800, 0, 0x06},
  123. {1600, 0, 0x07} };
  124. /* Refer to section 4 of the specification */
  125. static const struct {
  126. int odr_bits;
  127. int usec;
  128. } odr_start_up_times[KX_MAX_CHIPS][12] = {
  129. /* KXCJK-1013 */
  130. {
  131. {0x08, 100000},
  132. {0x09, 100000},
  133. {0x0A, 100000},
  134. {0x0B, 100000},
  135. {0, 80000},
  136. {0x01, 41000},
  137. {0x02, 21000},
  138. {0x03, 11000},
  139. {0x04, 6400},
  140. {0x05, 3900},
  141. {0x06, 2700},
  142. {0x07, 2100},
  143. },
  144. /* KXCJ9-1008 */
  145. {
  146. {0x08, 100000},
  147. {0x09, 100000},
  148. {0x0A, 100000},
  149. {0x0B, 100000},
  150. {0, 80000},
  151. {0x01, 41000},
  152. {0x02, 21000},
  153. {0x03, 11000},
  154. {0x04, 6400},
  155. {0x05, 3900},
  156. {0x06, 2700},
  157. {0x07, 2100},
  158. },
  159. /* KXCTJ2-1009 */
  160. {
  161. {0x08, 1240000},
  162. {0x09, 621000},
  163. {0x0A, 309000},
  164. {0x0B, 151000},
  165. {0, 80000},
  166. {0x01, 41000},
  167. {0x02, 21000},
  168. {0x03, 11000},
  169. {0x04, 6000},
  170. {0x05, 4000},
  171. {0x06, 3000},
  172. {0x07, 2000},
  173. },
  174. };
  175. static const struct {
  176. u16 scale;
  177. u8 gsel_0;
  178. u8 gsel_1;
  179. } KXCJK1013_scale_table[] = { {9582, 0, 0},
  180. {19163, 1, 0},
  181. {38326, 0, 1} };
  182. static const struct {
  183. int val;
  184. int val2;
  185. int odr_bits;
  186. } wake_odr_data_rate_table[] = { {0, 781000, 0x00},
  187. {1, 563000, 0x01},
  188. {3, 125000, 0x02},
  189. {6, 250000, 0x03},
  190. {12, 500000, 0x04},
  191. {25, 0, 0x05},
  192. {50, 0, 0x06},
  193. {100, 0, 0x06},
  194. {200, 0, 0x06},
  195. {400, 0, 0x06},
  196. {800, 0, 0x06},
  197. {1600, 0, 0x06} };
  198. static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
  199. enum kxcjk1013_mode mode)
  200. {
  201. int ret;
  202. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
  203. if (ret < 0) {
  204. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  205. return ret;
  206. }
  207. if (mode == STANDBY)
  208. ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1;
  209. else
  210. ret |= KXCJK1013_REG_CTRL1_BIT_PC1;
  211. ret = i2c_smbus_write_byte_data(data->client,
  212. KXCJK1013_REG_CTRL1, ret);
  213. if (ret < 0) {
  214. dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
  215. return ret;
  216. }
  217. return 0;
  218. }
  219. static int kxcjk1013_get_mode(struct kxcjk1013_data *data,
  220. enum kxcjk1013_mode *mode)
  221. {
  222. int ret;
  223. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
  224. if (ret < 0) {
  225. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  226. return ret;
  227. }
  228. if (ret & KXCJK1013_REG_CTRL1_BIT_PC1)
  229. *mode = OPERATION;
  230. else
  231. *mode = STANDBY;
  232. return 0;
  233. }
  234. static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index)
  235. {
  236. int ret;
  237. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
  238. if (ret < 0) {
  239. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  240. return ret;
  241. }
  242. ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 |
  243. KXCJK1013_REG_CTRL1_BIT_GSEL1);
  244. ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3);
  245. ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4);
  246. ret = i2c_smbus_write_byte_data(data->client,
  247. KXCJK1013_REG_CTRL1,
  248. ret);
  249. if (ret < 0) {
  250. dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
  251. return ret;
  252. }
  253. data->range = range_index;
  254. return 0;
  255. }
  256. static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
  257. {
  258. int ret;
  259. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I);
  260. if (ret < 0) {
  261. dev_err(&data->client->dev, "Error reading who_am_i\n");
  262. return ret;
  263. }
  264. dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret);
  265. ret = kxcjk1013_set_mode(data, STANDBY);
  266. if (ret < 0)
  267. return ret;
  268. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
  269. if (ret < 0) {
  270. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  271. return ret;
  272. }
  273. /* Set 12 bit mode */
  274. ret |= KXCJK1013_REG_CTRL1_BIT_RES;
  275. ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL1,
  276. ret);
  277. if (ret < 0) {
  278. dev_err(&data->client->dev, "Error reading reg_ctrl\n");
  279. return ret;
  280. }
  281. /* Setting range to 4G */
  282. ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G);
  283. if (ret < 0)
  284. return ret;
  285. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_DATA_CTRL);
  286. if (ret < 0) {
  287. dev_err(&data->client->dev, "Error reading reg_data_ctrl\n");
  288. return ret;
  289. }
  290. data->odr_bits = ret;
  291. /* Set up INT polarity */
  292. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
  293. if (ret < 0) {
  294. dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
  295. return ret;
  296. }
  297. if (data->active_high_intr)
  298. ret |= KXCJK1013_REG_INT_REG1_BIT_IEA;
  299. else
  300. ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEA;
  301. ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
  302. ret);
  303. if (ret < 0) {
  304. dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
  305. return ret;
  306. }
  307. ret = kxcjk1013_set_mode(data, OPERATION);
  308. if (ret < 0)
  309. return ret;
  310. data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES;
  311. return 0;
  312. }
  313. #ifdef CONFIG_PM_RUNTIME
  314. static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data)
  315. {
  316. int i;
  317. int idx = data->chipset;
  318. for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) {
  319. if (odr_start_up_times[idx][i].odr_bits == data->odr_bits)
  320. return odr_start_up_times[idx][i].usec;
  321. }
  322. return KXCJK1013_MAX_STARTUP_TIME_US;
  323. }
  324. #endif
  325. static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on)
  326. {
  327. int ret;
  328. if (on)
  329. ret = pm_runtime_get_sync(&data->client->dev);
  330. else {
  331. pm_runtime_mark_last_busy(&data->client->dev);
  332. ret = pm_runtime_put_autosuspend(&data->client->dev);
  333. }
  334. if (ret < 0) {
  335. dev_err(&data->client->dev,
  336. "Failed: kxcjk1013_set_power_state for %d\n", on);
  337. return ret;
  338. }
  339. return 0;
  340. }
  341. static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data)
  342. {
  343. int ret;
  344. ret = i2c_smbus_write_byte_data(data->client,
  345. KXCJK1013_REG_WAKE_TIMER,
  346. data->wake_dur);
  347. if (ret < 0) {
  348. dev_err(&data->client->dev,
  349. "Error writing reg_wake_timer\n");
  350. return ret;
  351. }
  352. ret = i2c_smbus_write_byte_data(data->client,
  353. KXCJK1013_REG_WAKE_THRES,
  354. data->wake_thres);
  355. if (ret < 0) {
  356. dev_err(&data->client->dev, "Error writing reg_wake_thres\n");
  357. return ret;
  358. }
  359. return 0;
  360. }
  361. static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data,
  362. bool status)
  363. {
  364. int ret;
  365. enum kxcjk1013_mode store_mode;
  366. ret = kxcjk1013_get_mode(data, &store_mode);
  367. if (ret < 0)
  368. return ret;
  369. /* This is requirement by spec to change state to STANDBY */
  370. ret = kxcjk1013_set_mode(data, STANDBY);
  371. if (ret < 0)
  372. return ret;
  373. ret = kxcjk1013_chip_update_thresholds(data);
  374. if (ret < 0)
  375. return ret;
  376. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
  377. if (ret < 0) {
  378. dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
  379. return ret;
  380. }
  381. if (status)
  382. ret |= KXCJK1013_REG_INT_REG1_BIT_IEN;
  383. else
  384. ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEN;
  385. ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
  386. ret);
  387. if (ret < 0) {
  388. dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
  389. return ret;
  390. }
  391. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
  392. if (ret < 0) {
  393. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  394. return ret;
  395. }
  396. if (status)
  397. ret |= KXCJK1013_REG_CTRL1_BIT_WUFE;
  398. else
  399. ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE;
  400. ret = i2c_smbus_write_byte_data(data->client,
  401. KXCJK1013_REG_CTRL1, ret);
  402. if (ret < 0) {
  403. dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
  404. return ret;
  405. }
  406. if (store_mode == OPERATION) {
  407. ret = kxcjk1013_set_mode(data, OPERATION);
  408. if (ret < 0)
  409. return ret;
  410. }
  411. return 0;
  412. }
  413. static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data,
  414. bool status)
  415. {
  416. int ret;
  417. enum kxcjk1013_mode store_mode;
  418. ret = kxcjk1013_get_mode(data, &store_mode);
  419. if (ret < 0)
  420. return ret;
  421. /* This is requirement by spec to change state to STANDBY */
  422. ret = kxcjk1013_set_mode(data, STANDBY);
  423. if (ret < 0)
  424. return ret;
  425. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1);
  426. if (ret < 0) {
  427. dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
  428. return ret;
  429. }
  430. if (status)
  431. ret |= KXCJK1013_REG_INT_REG1_BIT_IEN;
  432. else
  433. ret &= ~KXCJK1013_REG_INT_REG1_BIT_IEN;
  434. ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1,
  435. ret);
  436. if (ret < 0) {
  437. dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
  438. return ret;
  439. }
  440. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1);
  441. if (ret < 0) {
  442. dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
  443. return ret;
  444. }
  445. if (status)
  446. ret |= KXCJK1013_REG_CTRL1_BIT_DRDY;
  447. else
  448. ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY;
  449. ret = i2c_smbus_write_byte_data(data->client,
  450. KXCJK1013_REG_CTRL1, ret);
  451. if (ret < 0) {
  452. dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
  453. return ret;
  454. }
  455. if (store_mode == OPERATION) {
  456. ret = kxcjk1013_set_mode(data, OPERATION);
  457. if (ret < 0)
  458. return ret;
  459. }
  460. return 0;
  461. }
  462. static int kxcjk1013_convert_freq_to_bit(int val, int val2)
  463. {
  464. int i;
  465. for (i = 0; i < ARRAY_SIZE(samp_freq_table); ++i) {
  466. if (samp_freq_table[i].val == val &&
  467. samp_freq_table[i].val2 == val2) {
  468. return samp_freq_table[i].odr_bits;
  469. }
  470. }
  471. return -EINVAL;
  472. }
  473. static int kxcjk1013_convert_wake_odr_to_bit(int val, int val2)
  474. {
  475. int i;
  476. for (i = 0; i < ARRAY_SIZE(wake_odr_data_rate_table); ++i) {
  477. if (wake_odr_data_rate_table[i].val == val &&
  478. wake_odr_data_rate_table[i].val2 == val2) {
  479. return wake_odr_data_rate_table[i].odr_bits;
  480. }
  481. }
  482. return -EINVAL;
  483. }
  484. static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
  485. {
  486. int ret;
  487. int odr_bits;
  488. enum kxcjk1013_mode store_mode;
  489. ret = kxcjk1013_get_mode(data, &store_mode);
  490. if (ret < 0)
  491. return ret;
  492. odr_bits = kxcjk1013_convert_freq_to_bit(val, val2);
  493. if (odr_bits < 0)
  494. return odr_bits;
  495. /* To change ODR, the chip must be set to STANDBY as per spec */
  496. ret = kxcjk1013_set_mode(data, STANDBY);
  497. if (ret < 0)
  498. return ret;
  499. ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_DATA_CTRL,
  500. odr_bits);
  501. if (ret < 0) {
  502. dev_err(&data->client->dev, "Error writing data_ctrl\n");
  503. return ret;
  504. }
  505. data->odr_bits = odr_bits;
  506. odr_bits = kxcjk1013_convert_wake_odr_to_bit(val, val2);
  507. if (odr_bits < 0)
  508. return odr_bits;
  509. ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL2,
  510. odr_bits);
  511. if (ret < 0) {
  512. dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
  513. return ret;
  514. }
  515. if (store_mode == OPERATION) {
  516. ret = kxcjk1013_set_mode(data, OPERATION);
  517. if (ret < 0)
  518. return ret;
  519. }
  520. return 0;
  521. }
  522. static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2)
  523. {
  524. int i;
  525. for (i = 0; i < ARRAY_SIZE(samp_freq_table); ++i) {
  526. if (samp_freq_table[i].odr_bits == data->odr_bits) {
  527. *val = samp_freq_table[i].val;
  528. *val2 = samp_freq_table[i].val2;
  529. return IIO_VAL_INT_PLUS_MICRO;
  530. }
  531. }
  532. return -EINVAL;
  533. }
  534. static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis)
  535. {
  536. u8 reg = KXCJK1013_REG_XOUT_L + axis * 2;
  537. int ret;
  538. ret = i2c_smbus_read_word_data(data->client, reg);
  539. if (ret < 0) {
  540. dev_err(&data->client->dev,
  541. "failed to read accel_%c registers\n", 'x' + axis);
  542. return ret;
  543. }
  544. return ret;
  545. }
  546. static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val)
  547. {
  548. int ret, i;
  549. enum kxcjk1013_mode store_mode;
  550. for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) {
  551. if (KXCJK1013_scale_table[i].scale == val) {
  552. ret = kxcjk1013_get_mode(data, &store_mode);
  553. if (ret < 0)
  554. return ret;
  555. ret = kxcjk1013_set_mode(data, STANDBY);
  556. if (ret < 0)
  557. return ret;
  558. ret = kxcjk1013_set_range(data, i);
  559. if (ret < 0)
  560. return ret;
  561. if (store_mode == OPERATION) {
  562. ret = kxcjk1013_set_mode(data, OPERATION);
  563. if (ret)
  564. return ret;
  565. }
  566. return 0;
  567. }
  568. }
  569. return -EINVAL;
  570. }
  571. static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
  572. struct iio_chan_spec const *chan, int *val,
  573. int *val2, long mask)
  574. {
  575. struct kxcjk1013_data *data = iio_priv(indio_dev);
  576. int ret;
  577. switch (mask) {
  578. case IIO_CHAN_INFO_RAW:
  579. mutex_lock(&data->mutex);
  580. if (iio_buffer_enabled(indio_dev))
  581. ret = -EBUSY;
  582. else {
  583. ret = kxcjk1013_set_power_state(data, true);
  584. if (ret < 0) {
  585. mutex_unlock(&data->mutex);
  586. return ret;
  587. }
  588. ret = kxcjk1013_get_acc_reg(data, chan->scan_index);
  589. if (ret < 0) {
  590. kxcjk1013_set_power_state(data, false);
  591. mutex_unlock(&data->mutex);
  592. return ret;
  593. }
  594. *val = sign_extend32(ret >> 4, 11);
  595. ret = kxcjk1013_set_power_state(data, false);
  596. }
  597. mutex_unlock(&data->mutex);
  598. if (ret < 0)
  599. return ret;
  600. return IIO_VAL_INT;
  601. case IIO_CHAN_INFO_SCALE:
  602. *val = 0;
  603. *val2 = KXCJK1013_scale_table[data->range].scale;
  604. return IIO_VAL_INT_PLUS_MICRO;
  605. case IIO_CHAN_INFO_SAMP_FREQ:
  606. mutex_lock(&data->mutex);
  607. ret = kxcjk1013_get_odr(data, val, val2);
  608. mutex_unlock(&data->mutex);
  609. return ret;
  610. default:
  611. return -EINVAL;
  612. }
  613. }
  614. static int kxcjk1013_write_raw(struct iio_dev *indio_dev,
  615. struct iio_chan_spec const *chan, int val,
  616. int val2, long mask)
  617. {
  618. struct kxcjk1013_data *data = iio_priv(indio_dev);
  619. int ret;
  620. switch (mask) {
  621. case IIO_CHAN_INFO_SAMP_FREQ:
  622. mutex_lock(&data->mutex);
  623. ret = kxcjk1013_set_odr(data, val, val2);
  624. mutex_unlock(&data->mutex);
  625. break;
  626. case IIO_CHAN_INFO_SCALE:
  627. if (val)
  628. return -EINVAL;
  629. mutex_lock(&data->mutex);
  630. ret = kxcjk1013_set_scale(data, val2);
  631. mutex_unlock(&data->mutex);
  632. break;
  633. default:
  634. ret = -EINVAL;
  635. }
  636. return ret;
  637. }
  638. static int kxcjk1013_read_event(struct iio_dev *indio_dev,
  639. const struct iio_chan_spec *chan,
  640. enum iio_event_type type,
  641. enum iio_event_direction dir,
  642. enum iio_event_info info,
  643. int *val, int *val2)
  644. {
  645. struct kxcjk1013_data *data = iio_priv(indio_dev);
  646. *val2 = 0;
  647. switch (info) {
  648. case IIO_EV_INFO_VALUE:
  649. *val = data->wake_thres;
  650. break;
  651. case IIO_EV_INFO_PERIOD:
  652. *val = data->wake_dur;
  653. break;
  654. default:
  655. return -EINVAL;
  656. }
  657. return IIO_VAL_INT;
  658. }
  659. static int kxcjk1013_write_event(struct iio_dev *indio_dev,
  660. const struct iio_chan_spec *chan,
  661. enum iio_event_type type,
  662. enum iio_event_direction dir,
  663. enum iio_event_info info,
  664. int val, int val2)
  665. {
  666. struct kxcjk1013_data *data = iio_priv(indio_dev);
  667. if (data->ev_enable_state)
  668. return -EBUSY;
  669. switch (info) {
  670. case IIO_EV_INFO_VALUE:
  671. data->wake_thres = val;
  672. break;
  673. case IIO_EV_INFO_PERIOD:
  674. data->wake_dur = val;
  675. break;
  676. default:
  677. return -EINVAL;
  678. }
  679. return 0;
  680. }
  681. static int kxcjk1013_read_event_config(struct iio_dev *indio_dev,
  682. const struct iio_chan_spec *chan,
  683. enum iio_event_type type,
  684. enum iio_event_direction dir)
  685. {
  686. struct kxcjk1013_data *data = iio_priv(indio_dev);
  687. return data->ev_enable_state;
  688. }
  689. static int kxcjk1013_write_event_config(struct iio_dev *indio_dev,
  690. const struct iio_chan_spec *chan,
  691. enum iio_event_type type,
  692. enum iio_event_direction dir,
  693. int state)
  694. {
  695. struct kxcjk1013_data *data = iio_priv(indio_dev);
  696. int ret;
  697. if (state && data->ev_enable_state)
  698. return 0;
  699. mutex_lock(&data->mutex);
  700. if (!state && data->motion_trigger_on) {
  701. data->ev_enable_state = 0;
  702. mutex_unlock(&data->mutex);
  703. return 0;
  704. }
  705. /*
  706. * We will expect the enable and disable to do operation in
  707. * in reverse order. This will happen here anyway as our
  708. * resume operation uses sync mode runtime pm calls, the
  709. * suspend operation will be delayed by autosuspend delay
  710. * So the disable operation will still happen in reverse of
  711. * enable operation. When runtime pm is disabled the mode
  712. * is always on so sequence doesn't matter
  713. */
  714. ret = kxcjk1013_set_power_state(data, state);
  715. if (ret < 0) {
  716. mutex_unlock(&data->mutex);
  717. return ret;
  718. }
  719. ret = kxcjk1013_setup_any_motion_interrupt(data, state);
  720. if (ret < 0) {
  721. mutex_unlock(&data->mutex);
  722. return ret;
  723. }
  724. data->ev_enable_state = state;
  725. mutex_unlock(&data->mutex);
  726. return 0;
  727. }
  728. static int kxcjk1013_validate_trigger(struct iio_dev *indio_dev,
  729. struct iio_trigger *trig)
  730. {
  731. struct kxcjk1013_data *data = iio_priv(indio_dev);
  732. if (data->dready_trig != trig && data->motion_trig != trig)
  733. return -EINVAL;
  734. return 0;
  735. }
  736. static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
  737. "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600");
  738. static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326");
  739. static struct attribute *kxcjk1013_attributes[] = {
  740. &iio_const_attr_sampling_frequency_available.dev_attr.attr,
  741. &iio_const_attr_in_accel_scale_available.dev_attr.attr,
  742. NULL,
  743. };
  744. static const struct attribute_group kxcjk1013_attrs_group = {
  745. .attrs = kxcjk1013_attributes,
  746. };
  747. static const struct iio_event_spec kxcjk1013_event = {
  748. .type = IIO_EV_TYPE_THRESH,
  749. .dir = IIO_EV_DIR_EITHER,
  750. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  751. BIT(IIO_EV_INFO_ENABLE) |
  752. BIT(IIO_EV_INFO_PERIOD)
  753. };
  754. #define KXCJK1013_CHANNEL(_axis) { \
  755. .type = IIO_ACCEL, \
  756. .modified = 1, \
  757. .channel2 = IIO_MOD_##_axis, \
  758. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  759. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
  760. BIT(IIO_CHAN_INFO_SAMP_FREQ), \
  761. .scan_index = AXIS_##_axis, \
  762. .scan_type = { \
  763. .sign = 's', \
  764. .realbits = 12, \
  765. .storagebits = 16, \
  766. .shift = 4, \
  767. .endianness = IIO_CPU, \
  768. }, \
  769. .event_spec = &kxcjk1013_event, \
  770. .num_event_specs = 1 \
  771. }
  772. static const struct iio_chan_spec kxcjk1013_channels[] = {
  773. KXCJK1013_CHANNEL(X),
  774. KXCJK1013_CHANNEL(Y),
  775. KXCJK1013_CHANNEL(Z),
  776. IIO_CHAN_SOFT_TIMESTAMP(3),
  777. };
  778. static const struct iio_info kxcjk1013_info = {
  779. .attrs = &kxcjk1013_attrs_group,
  780. .read_raw = kxcjk1013_read_raw,
  781. .write_raw = kxcjk1013_write_raw,
  782. .read_event_value = kxcjk1013_read_event,
  783. .write_event_value = kxcjk1013_write_event,
  784. .write_event_config = kxcjk1013_write_event_config,
  785. .read_event_config = kxcjk1013_read_event_config,
  786. .validate_trigger = kxcjk1013_validate_trigger,
  787. .driver_module = THIS_MODULE,
  788. };
  789. static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p)
  790. {
  791. struct iio_poll_func *pf = p;
  792. struct iio_dev *indio_dev = pf->indio_dev;
  793. struct kxcjk1013_data *data = iio_priv(indio_dev);
  794. int bit, ret, i = 0;
  795. mutex_lock(&data->mutex);
  796. for_each_set_bit(bit, indio_dev->buffer->scan_mask,
  797. indio_dev->masklength) {
  798. ret = kxcjk1013_get_acc_reg(data, bit);
  799. if (ret < 0) {
  800. mutex_unlock(&data->mutex);
  801. goto err;
  802. }
  803. data->buffer[i++] = ret;
  804. }
  805. mutex_unlock(&data->mutex);
  806. iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
  807. data->timestamp);
  808. err:
  809. iio_trigger_notify_done(indio_dev->trig);
  810. return IRQ_HANDLED;
  811. }
  812. static int kxcjk1013_trig_try_reen(struct iio_trigger *trig)
  813. {
  814. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  815. struct kxcjk1013_data *data = iio_priv(indio_dev);
  816. int ret;
  817. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL);
  818. if (ret < 0) {
  819. dev_err(&data->client->dev, "Error reading reg_int_rel\n");
  820. return ret;
  821. }
  822. return 0;
  823. }
  824. static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig,
  825. bool state)
  826. {
  827. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  828. struct kxcjk1013_data *data = iio_priv(indio_dev);
  829. int ret;
  830. mutex_lock(&data->mutex);
  831. if (!state && data->ev_enable_state && data->motion_trigger_on) {
  832. data->motion_trigger_on = false;
  833. mutex_unlock(&data->mutex);
  834. return 0;
  835. }
  836. ret = kxcjk1013_set_power_state(data, state);
  837. if (ret < 0) {
  838. mutex_unlock(&data->mutex);
  839. return ret;
  840. }
  841. if (data->motion_trig == trig)
  842. ret = kxcjk1013_setup_any_motion_interrupt(data, state);
  843. else
  844. ret = kxcjk1013_setup_new_data_interrupt(data, state);
  845. if (ret < 0) {
  846. mutex_unlock(&data->mutex);
  847. return ret;
  848. }
  849. if (data->motion_trig == trig)
  850. data->motion_trigger_on = state;
  851. else
  852. data->dready_trigger_on = state;
  853. mutex_unlock(&data->mutex);
  854. return 0;
  855. }
  856. static const struct iio_trigger_ops kxcjk1013_trigger_ops = {
  857. .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state,
  858. .try_reenable = kxcjk1013_trig_try_reen,
  859. .owner = THIS_MODULE,
  860. };
  861. static irqreturn_t kxcjk1013_event_handler(int irq, void *private)
  862. {
  863. struct iio_dev *indio_dev = private;
  864. struct kxcjk1013_data *data = iio_priv(indio_dev);
  865. int ret;
  866. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_SRC1);
  867. if (ret < 0) {
  868. dev_err(&data->client->dev, "Error reading reg_int_src1\n");
  869. goto ack_intr;
  870. }
  871. if (ret & 0x02) {
  872. ret = i2c_smbus_read_byte_data(data->client,
  873. KXCJK1013_REG_INT_SRC2);
  874. if (ret < 0) {
  875. dev_err(&data->client->dev,
  876. "Error reading reg_int_src2\n");
  877. goto ack_intr;
  878. }
  879. if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN)
  880. iio_push_event(indio_dev,
  881. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  882. 0,
  883. IIO_MOD_X,
  884. IIO_EV_TYPE_THRESH,
  885. IIO_EV_DIR_FALLING),
  886. data->timestamp);
  887. if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP)
  888. iio_push_event(indio_dev,
  889. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  890. 0,
  891. IIO_MOD_X,
  892. IIO_EV_TYPE_THRESH,
  893. IIO_EV_DIR_RISING),
  894. data->timestamp);
  895. if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN)
  896. iio_push_event(indio_dev,
  897. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  898. 0,
  899. IIO_MOD_Y,
  900. IIO_EV_TYPE_THRESH,
  901. IIO_EV_DIR_FALLING),
  902. data->timestamp);
  903. if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP)
  904. iio_push_event(indio_dev,
  905. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  906. 0,
  907. IIO_MOD_Y,
  908. IIO_EV_TYPE_THRESH,
  909. IIO_EV_DIR_RISING),
  910. data->timestamp);
  911. if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN)
  912. iio_push_event(indio_dev,
  913. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  914. 0,
  915. IIO_MOD_Z,
  916. IIO_EV_TYPE_THRESH,
  917. IIO_EV_DIR_FALLING),
  918. data->timestamp);
  919. if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP)
  920. iio_push_event(indio_dev,
  921. IIO_MOD_EVENT_CODE(IIO_ACCEL,
  922. 0,
  923. IIO_MOD_Z,
  924. IIO_EV_TYPE_THRESH,
  925. IIO_EV_DIR_RISING),
  926. data->timestamp);
  927. }
  928. ack_intr:
  929. if (data->dready_trigger_on)
  930. return IRQ_HANDLED;
  931. ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL);
  932. if (ret < 0)
  933. dev_err(&data->client->dev, "Error reading reg_int_rel\n");
  934. return IRQ_HANDLED;
  935. }
  936. static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private)
  937. {
  938. struct iio_dev *indio_dev = private;
  939. struct kxcjk1013_data *data = iio_priv(indio_dev);
  940. data->timestamp = iio_get_time_ns();
  941. if (data->dready_trigger_on)
  942. iio_trigger_poll(data->dready_trig);
  943. else if (data->motion_trigger_on)
  944. iio_trigger_poll(data->motion_trig);
  945. if (data->ev_enable_state)
  946. return IRQ_WAKE_THREAD;
  947. else
  948. return IRQ_HANDLED;
  949. }
  950. static const char *kxcjk1013_match_acpi_device(struct device *dev,
  951. enum kx_chipset *chipset)
  952. {
  953. const struct acpi_device_id *id;
  954. id = acpi_match_device(dev->driver->acpi_match_table, dev);
  955. if (!id)
  956. return NULL;
  957. *chipset = (enum kx_chipset)id->driver_data;
  958. return dev_name(dev);
  959. }
  960. static int kxcjk1013_gpio_probe(struct i2c_client *client,
  961. struct kxcjk1013_data *data)
  962. {
  963. struct device *dev;
  964. struct gpio_desc *gpio;
  965. int ret;
  966. if (!client)
  967. return -EINVAL;
  968. dev = &client->dev;
  969. /* data ready gpio interrupt pin */
  970. gpio = devm_gpiod_get_index(dev, "kxcjk1013_int", 0);
  971. if (IS_ERR(gpio)) {
  972. dev_err(dev, "acpi gpio get index failed\n");
  973. return PTR_ERR(gpio);
  974. }
  975. ret = gpiod_direction_input(gpio);
  976. if (ret)
  977. return ret;
  978. ret = gpiod_to_irq(gpio);
  979. dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
  980. return ret;
  981. }
  982. static int kxcjk1013_probe(struct i2c_client *client,
  983. const struct i2c_device_id *id)
  984. {
  985. struct kxcjk1013_data *data;
  986. struct iio_dev *indio_dev;
  987. struct kxcjk_1013_platform_data *pdata;
  988. const char *name;
  989. int ret;
  990. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  991. if (!indio_dev)
  992. return -ENOMEM;
  993. data = iio_priv(indio_dev);
  994. i2c_set_clientdata(client, indio_dev);
  995. data->client = client;
  996. pdata = dev_get_platdata(&client->dev);
  997. if (pdata)
  998. data->active_high_intr = pdata->active_high_intr;
  999. else
  1000. data->active_high_intr = true; /* default polarity */
  1001. if (id) {
  1002. data->chipset = (enum kx_chipset)(id->driver_data);
  1003. name = id->name;
  1004. } else if (ACPI_HANDLE(&client->dev)) {
  1005. name = kxcjk1013_match_acpi_device(&client->dev,
  1006. &data->chipset);
  1007. } else
  1008. return -ENODEV;
  1009. ret = kxcjk1013_chip_init(data);
  1010. if (ret < 0)
  1011. return ret;
  1012. mutex_init(&data->mutex);
  1013. indio_dev->dev.parent = &client->dev;
  1014. indio_dev->channels = kxcjk1013_channels;
  1015. indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels);
  1016. indio_dev->name = name;
  1017. indio_dev->modes = INDIO_DIRECT_MODE;
  1018. indio_dev->info = &kxcjk1013_info;
  1019. if (client->irq < 0)
  1020. client->irq = kxcjk1013_gpio_probe(client, data);
  1021. if (client->irq >= 0) {
  1022. ret = devm_request_threaded_irq(&client->dev, client->irq,
  1023. kxcjk1013_data_rdy_trig_poll,
  1024. kxcjk1013_event_handler,
  1025. IRQF_TRIGGER_RISING,
  1026. KXCJK1013_IRQ_NAME,
  1027. indio_dev);
  1028. if (ret)
  1029. return ret;
  1030. data->dready_trig = devm_iio_trigger_alloc(&client->dev,
  1031. "%s-dev%d",
  1032. indio_dev->name,
  1033. indio_dev->id);
  1034. if (!data->dready_trig)
  1035. return -ENOMEM;
  1036. data->motion_trig = devm_iio_trigger_alloc(&client->dev,
  1037. "%s-any-motion-dev%d",
  1038. indio_dev->name,
  1039. indio_dev->id);
  1040. if (!data->motion_trig)
  1041. return -ENOMEM;
  1042. data->dready_trig->dev.parent = &client->dev;
  1043. data->dready_trig->ops = &kxcjk1013_trigger_ops;
  1044. iio_trigger_set_drvdata(data->dready_trig, indio_dev);
  1045. indio_dev->trig = data->dready_trig;
  1046. iio_trigger_get(indio_dev->trig);
  1047. ret = iio_trigger_register(data->dready_trig);
  1048. if (ret)
  1049. return ret;
  1050. data->motion_trig->dev.parent = &client->dev;
  1051. data->motion_trig->ops = &kxcjk1013_trigger_ops;
  1052. iio_trigger_set_drvdata(data->motion_trig, indio_dev);
  1053. ret = iio_trigger_register(data->motion_trig);
  1054. if (ret) {
  1055. data->motion_trig = NULL;
  1056. goto err_trigger_unregister;
  1057. }
  1058. ret = iio_triggered_buffer_setup(indio_dev,
  1059. &iio_pollfunc_store_time,
  1060. kxcjk1013_trigger_handler,
  1061. NULL);
  1062. if (ret < 0) {
  1063. dev_err(&client->dev,
  1064. "iio triggered buffer setup failed\n");
  1065. goto err_trigger_unregister;
  1066. }
  1067. }
  1068. ret = iio_device_register(indio_dev);
  1069. if (ret < 0) {
  1070. dev_err(&client->dev, "unable to register iio device\n");
  1071. goto err_buffer_cleanup;
  1072. }
  1073. ret = pm_runtime_set_active(&client->dev);
  1074. if (ret)
  1075. goto err_iio_unregister;
  1076. pm_runtime_enable(&client->dev);
  1077. pm_runtime_set_autosuspend_delay(&client->dev,
  1078. KXCJK1013_SLEEP_DELAY_MS);
  1079. pm_runtime_use_autosuspend(&client->dev);
  1080. return 0;
  1081. err_iio_unregister:
  1082. iio_device_unregister(indio_dev);
  1083. err_buffer_cleanup:
  1084. if (data->dready_trig)
  1085. iio_triggered_buffer_cleanup(indio_dev);
  1086. err_trigger_unregister:
  1087. if (data->dready_trig)
  1088. iio_trigger_unregister(data->dready_trig);
  1089. if (data->motion_trig)
  1090. iio_trigger_unregister(data->motion_trig);
  1091. return ret;
  1092. }
  1093. static int kxcjk1013_remove(struct i2c_client *client)
  1094. {
  1095. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  1096. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1097. pm_runtime_disable(&client->dev);
  1098. pm_runtime_set_suspended(&client->dev);
  1099. pm_runtime_put_noidle(&client->dev);
  1100. iio_device_unregister(indio_dev);
  1101. if (data->dready_trig) {
  1102. iio_triggered_buffer_cleanup(indio_dev);
  1103. iio_trigger_unregister(data->dready_trig);
  1104. iio_trigger_unregister(data->motion_trig);
  1105. }
  1106. mutex_lock(&data->mutex);
  1107. kxcjk1013_set_mode(data, STANDBY);
  1108. mutex_unlock(&data->mutex);
  1109. return 0;
  1110. }
  1111. #ifdef CONFIG_PM_SLEEP
  1112. static int kxcjk1013_suspend(struct device *dev)
  1113. {
  1114. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1115. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1116. int ret;
  1117. mutex_lock(&data->mutex);
  1118. ret = kxcjk1013_set_mode(data, STANDBY);
  1119. mutex_unlock(&data->mutex);
  1120. return ret;
  1121. }
  1122. static int kxcjk1013_resume(struct device *dev)
  1123. {
  1124. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1125. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1126. int ret = 0;
  1127. mutex_lock(&data->mutex);
  1128. /* Check, if the suspend occured while active */
  1129. if (data->dready_trigger_on || data->motion_trigger_on ||
  1130. data->ev_enable_state)
  1131. ret = kxcjk1013_set_mode(data, OPERATION);
  1132. mutex_unlock(&data->mutex);
  1133. return ret;
  1134. }
  1135. #endif
  1136. #ifdef CONFIG_PM_RUNTIME
  1137. static int kxcjk1013_runtime_suspend(struct device *dev)
  1138. {
  1139. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1140. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1141. return kxcjk1013_set_mode(data, STANDBY);
  1142. }
  1143. static int kxcjk1013_runtime_resume(struct device *dev)
  1144. {
  1145. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  1146. struct kxcjk1013_data *data = iio_priv(indio_dev);
  1147. int ret;
  1148. int sleep_val;
  1149. ret = kxcjk1013_set_mode(data, OPERATION);
  1150. if (ret < 0)
  1151. return ret;
  1152. sleep_val = kxcjk1013_get_startup_times(data);
  1153. if (sleep_val < 20000)
  1154. usleep_range(sleep_val, 20000);
  1155. else
  1156. msleep_interruptible(sleep_val/1000);
  1157. return 0;
  1158. }
  1159. #endif
  1160. static const struct dev_pm_ops kxcjk1013_pm_ops = {
  1161. SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume)
  1162. SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend,
  1163. kxcjk1013_runtime_resume, NULL)
  1164. };
  1165. static const struct acpi_device_id kx_acpi_match[] = {
  1166. {"KXCJ1013", KXCJK1013},
  1167. {"KXCJ1008", KXCJ91008},
  1168. {"KXTJ1009", KXTJ21009},
  1169. { },
  1170. };
  1171. MODULE_DEVICE_TABLE(acpi, kx_acpi_match);
  1172. static const struct i2c_device_id kxcjk1013_id[] = {
  1173. {"kxcjk1013", KXCJK1013},
  1174. {"kxcj91008", KXCJ91008},
  1175. {"kxtj21009", KXTJ21009},
  1176. {}
  1177. };
  1178. MODULE_DEVICE_TABLE(i2c, kxcjk1013_id);
  1179. static struct i2c_driver kxcjk1013_driver = {
  1180. .driver = {
  1181. .name = KXCJK1013_DRV_NAME,
  1182. .acpi_match_table = ACPI_PTR(kx_acpi_match),
  1183. .pm = &kxcjk1013_pm_ops,
  1184. },
  1185. .probe = kxcjk1013_probe,
  1186. .remove = kxcjk1013_remove,
  1187. .id_table = kxcjk1013_id,
  1188. };
  1189. module_i2c_driver(kxcjk1013_driver);
  1190. MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
  1191. MODULE_LICENSE("GPL v2");
  1192. MODULE_DESCRIPTION("KXCJK1013 accelerometer driver");